Network Device Component

Abstract: In one example embodiment, a system and method are illustrated that includes defining an interface that is independent of a management interface associated with a management agent. This interface is configured to instrument a network device component. The system and method also includes generating an API from the interface. The system and method further includes binding the management agent and the API to implement the management interface associated with the management agent.

Abstract: A network device component receives traffic, determines whether the traffic is host bound traffic or non-host bound traffic, and classifies, based on a user-defined classification scheme, the traffic when the traffic is host bound traffic. The network device component also assigns, based on the classification, the classified host bound traffic to a queue associated with network device component for forwarding the classified host bound traffic to a host component of the network device.

Abstract: A network device includes an execution engine having an implementation of a network device component to process data received by the network device, and a compiler to dynamically generate the implementation of the network device component through compilation of a general representation using network device data for compiler optimization.

Abstract: Approaches, techniques, and mechanisms are disclosed for efficiently buffering data units within a network device. A traffic manager or other network device component receives Transport Data Units (“TDUs”), which are sub-portions of Protocol Data Units (“PDUs”). Rather than buffer an entire TDU together, the component divides the TDU into multiple Storage Data Units (“SDUs”) that can fit in SDU buffer entries within physical memory banks. A TDU-to-SDU Mapping (“TSM”) memory stores TSM lists that indicate which SDU entries store SDUs for a given TDU. Physical memory banks in which the SDUs are stored may be grouped together into logical SDU banks that are accessed together as if a single bank. The TSM memory may include a number of distinct TSM banks, with each logical SDU bank having a corresponding TSM bank. Techniques for maintaining inter-packet and intra-packet linking data compatible with such buffers are also disclosed.