Abstract: In one embodiment, an apparatus includes a package that encompasses at least a first integrated circuit die and a second integrated circuit die. The first integrated circuit die is attached to the package and includes one or more electrical overstress/electrostatic discharge (EOS/ESD) protection circuits. The second integrated circuit die is attached to the package and electrically coupled to the first integrated circuit die such that at least one component of the second integrated circuit die is protected from EOS/ESD by the first integrated circuit die.

Abstract: The invention provides a multilayer interconnection packaging structure of an embedded microwave multi chip with a silicon chip as a substrate and a manufacturing method The invention is characterized by utilizing the low-cost silicone chip as the chip embedded substrate and using wire bonding and ball mounting technology to prepare gold bumps, realizing short-distance interconnection between microwave chips, using a low-k liquid or colloidal polymer as a dielectric layer, realizing the multilayer interconnection structure of a metal/organic polymer by combining wafer level processing technics such as photoetching, electroplating, chemical mechanical polishing and the like and realizing system integration of active and passive devices The whole packaging structure has higher packaging integration and lower high-frequency transmission loss The structure can effectively integrate varied function device units, reduce the interconnection loss among the devices and improve the properties of the whole module while improving the density and integration of packaging and reducing the cost of packaging

Abstract: A multi chip module having a current sensing circuit and a semiconductor half bridge configuration having two vertically stacked field effect transistor dies that are connected by horizontally extending tap clips at respective opposite sides of their channels, wherein the current sensing circuit is coupled to two checkpoints, at least one being located on one of the tap clips so as to measure a voltage drop over a predetermined portion of the tap clip acting as a shunt resistor for sensing a current that is provided to a switching node of the half bridge configuration.

Abstract: A multi-chip module includes a first die having a control processor to generate a signal to control an industrial process and an input/output interface. The multi-chip module also includes a second die having a supervisory processor and an input/output interface. A processor failure of one of the control processor and the supervisory processor is detected by the other of the control processor and the supervisory processor, and the processor that detects the failure is configured to assert a signal through its input/output interface to cause the industrial process to transition to a safe state in response to the failure. Additionally, the first and second dies are created using different process technologies.

Abstract: Apparatuses, multi-chip modules, capacitive chips, and methods of providing capacitance to a power supply voltage in a multi-chip module are disclosed. In an example multi-chip module, a signal distribution component may be configured to provide a power supply voltage. A capacitive chip may be coupled to the signal distribution component and include a plurality of capacitive units. The capacitive chip may be configured to provide a capacitance to the power supply voltage. The plurality of capacitive units may be formed from memory cell capacitors.

Abstract: A packaged device includes a first die, a second die, and specially spaced and positioned sets of package terminals. The first die includes a pulse-width modulator (PWM), a processor, a timer, high-side drivers, low-side drivers, and a fault protection circuit. The second die includes ultra-high voltage high-side drivers. In an ultra-high voltage application, the PWM and external circuitry together form a switching power supply that generates a high voltage. The high voltage powers external high-side transistors. The processor and timer control the ultra-high voltage high-side drivers, that in turn supply drive signals to the external high-side transistors through the package terminals. External low-side transistors are driven directly by low-side drivers of the first die. If the fault protection circuit detects an excessive current, then the fault protection circuit supplies a disable signal to high-side and low-side drivers of both dice. The disable signal is generated without execution of processor instructions.

Abstract: The multi-chip leadless module 200 has integrated circuit (IC) 150 , dual n-channel mosfet 110 , IC leads 210, 211, 212 , gate leads 213, 213 , and source leads 217 - 220 encapsulated in resin 250 . The IC 150 and the dual n-channel mosfet 110 are mounted face down on the leads. IC leads 210, 211, 212 are made of planar metal and connect, respectively, to the electrodes TEST, VDD and VM on the IC 150 using a flip chip technique to assemble the leads on copper pillars or copper studs.

Abstract: In this paper, a LED multi-chip module with a heat pipe was designed for automotive headlights, which took advantages of the relative air flow during vehicle travelling for forced convection to keep the junction temperature of LED chips below 60°C. The Structure is compact enough to be suitable for placement in a small space for automotive lighting. The influence of paraments on the junction temperature of LED chips, such as the distance of LED arrangement and dimensions of both DBC substrates and sinks, has also been discussed by numerical simulation using ANSYS software. Then, the structure of the module was optimized. The junction temperature was measured using the forward voltage method, under the condition of both natural convection and forced convection. It was analyzed that the factors having an effect on thermal performance of the module. Furthermore, taking the condition of natural air convection during vehicle stopping into account, a temperature control system was designed for this module.

Abstract: The invention discloses a 3D-MCM (three dimension multi-chip module) radio frequency system with an integrated snakelike antenna. The 3D-MCM radio frequency system comprises four layers, namely, from top down, a first layer is the snakelike antenna, a second layer is an internal ground metal layer, a third layer is a packaging body and a fourth layer is an external metal ground plate. The 3D-MCM radio frequency system is small in size, wide in frequency bandwidth and high in reliability and is applicable to wireless communication at frequency band around 2.4GHz.

Abstract: A new vertical transition is presented that enables the use of epoxy-resin (FR-4) substrates for multi-chip modules (MCM) at millimeter-wave frequencies. A short microstrip trace on an FR-4 motherboard is connected to standard WR-10 waveguide for integration with other system components (e.g. antennas). The microwave transition is accomplished within a small (3 mm by 4 mm) three metal layer miniature PCB that is placed on the FR-4 motherboard. The small size and simplicity allows the transition PCB, called a “transition block” to be fabricated at very low cost. The transition block is attached to the motherboard using a solder reflow process compatible with standard SMT manufacturing lines. Using this technique, less than 2 dB insertion loss with over 10 GHz bandwidth is predicted. Test structures were fabricated resulting in measurements that show good agreement with simulations.

Abstract: In recent years, with the demands for wireless communication systems increas rapidly, the operating frequency for the portable wireless is moving toward millimeter-waves. Millimeter-wave wireless communication systems require not only suitable functional IC components but also competent package with low cost and good interconnect performance. To meet the demands for commercial applications, package with low power consumption, low cost, small size, and light weight becomes indispensable. However, unlike low frequency applications, millimeter-wave frequencies introduce significant parasitics and therefore the interconnect between IC chips and packaging carriers must be carefully managed in order to maintain good electrical performance. Conventional bond-wire induces significant parasitic inductance and thus results in unwanted effects, which could deviate the IC performance after assembly, especially at millimeter-wave frequencies. Flip-chip interconnect has drawn lots of attentions for chip-level packaging at millimeter-wave frequencies due to several advantages over bond-wire, e.g., shorter interconnect length, smaller package size and higher throughput. However, at MMW frequency range, the proximity effect, or detuning effect, is a crucial issue for flip-chip due to the proximity of chip to substrate. The proximity effect may cause the flipped-chips to deviate from its original performance. Approaches like increasing the bump height, reducing the metal overlap and employing compensation design at the transition region have been proposed to improve flip-chip performance. In addition, flip- chip reliability is very crucial for industrial applications since it relies only on several metallic connections. Using underfill as a buffer layer between chips and carriers can significantly improve flip-chip reliability, but unfortunately, the trade-off is underfill-induced performance decay and deviation. Furthermore, cost-reduction is also very important for commercialization. Conventional ceramic-based carrier offers excellent chemical and physical properties but with higher cost. Using low-cost organic board might be a good solution to get lower cost with fair performance. However, the investigation for flip-chip on organic board is generally insufficient. This dissertation covers an overall study for flip-chip interconnect for millimeter-wave frequencies. It can be divided into two parts. The first part is about active device packaging. Single MMIC chips and mm-wave modules were flip-chip assembled for demonstration. A V-band SPDT switch for half-duplex RF front-end switching was flip-chip assembled and RF characterized to 67 GHz. By adopting hi-compensation design, the packaged switch showed excellent frequency response and very low additional loss. Moreover, a V-band frequency source with a 7 GHz oscillator and a x8 multiplier was flip-chip assembled onto a multi-chip carrier. For comparison, both the oscillator and x8 multiplier were also bonded as individual chips. From the measurement results, the flip-chip technique did not have any detrimental effects and the assembled module showed excellent phase noise of -112 dBc/Hz @ 1 MHz offset with high output power of 11 dBm, demonstrating outstanding performance for millimeter-wave frequency generation. The second part is about material investigation in a flip-chip system. Underfill is generally required for improving flip-chip reliability. However, underfill in a flip-chip interconnect might introduce negative effects i.e., chip impedance mismatch and dielectric loss at millimeter-wave frequencies. To investigate and solve this issue, an epoxy-based was applied to a flip-chip structure and measured up to 67 GHz. By using pre-matching design and low-loss underfill, the flip-chip assembly exhibited excellent performances with return loss below -20 dB and insertion loss less than 0.6 dB. In addition, the reliability test revealed that the flip-chip assembly also performed excellent reliability. The other material investigation is about flip-chip carrier material. Low-cost Rogers RO3210TM organic laminate was employed to replace ceramic-based carrier for cost reduction and performance improvement. Both passive transmission lines and active discrete mHEMTs were flip-chip bonded onto RO3210TM. The test results showed that RO3210TM is a promising packaging carrier for commercial applications up to 50 GHz.

Abstract: A connecting element can be used for a multi-chip module. The connecting element is provided for establishing an electrical connection between two elements and has a carrier and a first electrically conductive connecting structure on a first main surface of the carrier. The first connecting structure is designed in such a way that the first connecting structure connects the first and second elements to each other. A multi-chip module can have such a connecting element and two elements, wherein the two elements are electrically connected to each other in a wireless manner by the connecting element.

Abstract: A multi-chip module (MCM) package is provided and includes a substrate and a hat assembly. The substrate includes a surface on which chips of the MCM are re-workable. The hat assembly is configured to be non-hermetically sealed to the substrate. The hat assembly and the substrate are configured for tension-type disassembly in a dimension oriented substantially normally with respect to a plane of the substrate surface.

Abstract: Future Remote Sensing Satellites with high resolution electro-optical payloads require multiple detectors to meet mission goals of multiple spectral bands and large swath. High speed detectors are available with limited pixels array length with multiple video ports. Large number of detectors at the focal plane calls for miniaturized camera electronics. Miniaturization requires usage of low power, low weight components and adaption of new packaging techniques like Multi chip module, System-in Package, Systems-on-chip and wafer level packaging etc. These technologies require multiple dice which are not readily available in required high quality levels. Hence, new packaging approach named as vertically stacked packaging (VSP) is developed in-house and demonstrated. This incorporates vertical stacking of PCBs, inter-board interfaces using copper leads, usage of flexi-rigid boards, single external interface connector and vertical passive component mounting. Here, using VSP technology, reduction is achieved in size by about 91% and weight by about 85% as compared to traditional packaging approaches. This paper mainly discusses the VSP development, optimization and integrated test results with 4K TDI detector.