TL;DR: This paper proposes an analytical procedure for computation of all pairs of valid switching angles used in pattern generation in five-level H-bridge cascaded inverters and returns the exact boundaries of all valid modulation index intervals.
Abstract: This paper proposes an analytical procedure for computation of all pairs of valid switching angles used in pattern generation in five-level H-bridge cascaded inverters. The proposed procedure eliminates harmonic components from inverter output voltage and, for each harmonic, returns the exact boundaries of all valid modulation index intervals. Due to its simple mathematical formulation, it can be easily implemented in real time using a digital signal processor or a field-programmable gate array. In this paper, after a detailed description of the method, simulation and experimental results demonstrate the high quality of achievable results.
TL;DR: The maximum unbalanced load is deduced versus the modulation index m when the converter works in unity power factor and the tested unbalanced limit of outputs for the experimental platform was given under different modulation indices.
Abstract: In this paper, the analysis of space vector modulation of a three-phase/wire/level Vienna rectifier is conducted, according to which the implementation of the equivalent carrier-based pulsewidth modulation is deduced theoretically within each separated sector in the diagram of vectors. The voltage balancing ability of dc-link neutral point, which depends on the uneven distribution of short vectors, is analyzed as well. An adaptive and robust controller to balance the output voltage under the unbalanced load limit for different modulation indices is proposed. The proposed controller can work at wide range of unbalanced load condition as well. Furthermore, the maximum unbalanced load is deduced versus the modulation index m when the converter works in unity power factor. An experimental prototype of 2.5 kW was built to verify the effectiveness of the theoretical analysis. Finally, the tested unbalanced limit of outputs for the experimental platform was given under different modulation indices. The output voltages for dual bus are balanced, and the theoretical analysis is verified.
TL;DR: In this paper, a fast and generalized space vector pulse width modulation (SVPWM) scheme for any multilevel inverter is presented, where the switching states, duty cycles, and switching sequences are all obtained by simple calculation in the proposed SVPWM scheme.
Abstract: This paper presents a fast and generalized space vector pulse width modulation (SVPWM) scheme for any multilevel inverter. The SVPWM scheme generates all the available switching states and switching sequences based on two simple and general mappings, and calculates the duty cycles simply as if for a two-level SVPWM, thus independent of the level number of the inverter. Because the switching states, duty cycles, and switching sequences are all obtained by simple calculation in the proposed SVPWM scheme, no lookup table is needed and the scheme is computationally fast. The generalized method of generating the switching states (first mapping), calculating the duty cycles, and determining the switching sequence (second mapping) is described in this paper. The scheme is suitable for any reference vector with any modulation index, and can be conveniently extended to meet specific requirements, such as symmetric switching sequences. Compared with prior methods, the SVPWM scheme proposed in this paper provides two more degrees of freedom, i.e., the adjustable switching sequences and duty cycles, thus offering significant flexibility for optimizing the performance of multilevel inverters. The influence of redundant switching sequences in the output phase voltage of inverters is demonstrated for a nine-level inverter. This paper also thoroughly compares the proposed SVPWM scheme with prior methods. Both simulation and experimental results are given.
TL;DR: In this article, a multilevel selective harmonic elimination pulsewidth modulation (MSHE-PWM) technique for transformerless static synchronous compensator (STATCOM) system employing cascaded H-bridge inverter (CHI) configuration is presented.
Abstract: This paper presents a new multilevel selective harmonic elimination pulse-width modulation (MSHE-PWM) technique for transformerless static synchronous compensator (STATCOM) system employing cascaded H-bridge inverter (CHI) configuration. The proposed MSHE-PWM method optimizes both the dc-voltage levels and the switching angles, enabling more harmonics to be eliminated without affecting the structure of the inverter circuit. The method provides constant switching angles and linear pattern of dc-voltage levels over the modulation index range. This in turns eliminates the tedious steps required for manipulating the offline calculated switching angles and therefore, easing the implementation of the MSHE-PWM for dynamic systems. Although the method relies on the availability of the variable dc-voltage levels which can be obtained by various topologies, however, the rapid growth and development in the field of power semiconductor devices led to produce high-efficiency dc-dc converters with a relatively high-voltage capacity and for simplicity, a buck dc-dc converter is considered in this paper. Current and voltage closed loop controllers are implemented for both the STATCOM and the buck converter to meet the reactive power demand at different loading conditions. The technique is further compared with an equivalent conventional carrier-based pulse-width modulation to illustrate its enhanced characteristics. The effectiveness and the theoretical analysis of the proposed approach are verified through both simulation and experimental studies.
TL;DR: A modulation index for volumetric modulated arc therapy (VMAT) based on the speed and acceleration analysis of modulating-parameters such as multi-leaf collimator movements, gantry rotation and dose-rate is presented comprehensively.
Abstract: The aim of this study is to present a modulation index (MI) for volumetric modulated arc therapy (VMAT) based on the speed and acceleration analysis of modulating-parameters such as multi-leaf collimator (MLC) movements, gantry rotation and dose-rate, comprehensively. The performance of the presented MI (MIt) was evaluated with correlation analyses to the pre-treatment quality assurance (QA) results, differences in modulating-parameters between VMAT plans versus dynamic log files, and differences in dose-volumetric parameters between VMAT plans versus reconstructed plans using dynamic log files. For comparison, the same correlation analyses were performed for the previously suggested modulation complexity score (MCS(v)), leaf travel modulation complexity score (LTMCS) and MI by Li and Xing (MI Li&Xing). In the two-tailed unpaired parameter condition, p values were acquired. The Spearman's rho (r(s)) values of MIt, MCSv, LTMCS and MI Li&Xing to the local gamma passing rate with 2%/2 mm criterion were -0.658 (p < 0.001), 0.186 (p = 0.251), 0.312 (p = 0.05) and -0.455 (p = 0.003), respectively. The values of rs to the modulating-parameter (MLC positions) differences were 0.917, -0.635, -0.857 and 0.795, respectively (p < 0.001). For dose-volumetric parameters, MIt showed higher statistically significant correlations than the conventional MIs. The MIt showed good performance for the evaluation of the modulation-degree of VMAT plans.
TL;DR: In this paper, the authors proposed an extended double carrier PWM (EDC PWM) strategy for a two-level voltage source inverter aiming at reducing the RMS current flowing through dc link filtering capacitors on embedded systems over a large modulation index range and for high power factor loads (cos φ ≥ 0.8).
Abstract: This paper presents a new pulse width modulation (PWM) strategy, called extended double carrier PWM, for a two-level voltage source inverter aiming at reducing the RMS current flowing through dc link filtering capacitors on embedded systems over a large modulation index range and for high-power factor loads (cos φ ≥ 0.8). Instead of utilizing two adjacent active vectors at each switching period as in classic PWM strategies, this new strategy utilizes two nonadjacent active vectors in the case of low-modulation index or three consecutive active vectors in the case of high-modulation index. Analytical calculations show that this new strategy is particularly effective in terms of reducing filtering capacitor rms current for high-power factor compared to space vector PWM which is used as a reference strategy. The impact of this strategy on output current quality is also investigated.
TL;DR: In this paper, the peak positions of the triangular carriers are delayed or advanced to avoid the zero state, thus, the peaks of the commonmode voltage can be reduced under any modulation index.
Abstract: High common-mode voltage (CMV) of an output will be produced in the conventional sinusoidal pulse width modulation three-phase inverter. Although the carrier phase-shift method can be used to reduce the peaks of CMV, it has the best suppression effect only when the SPWM modulation index is no more than 2/3. This letter presents a new scheme of carrier peak position modulation to break the limitation of modulation index. In this scheme, the peak positions of the triangular carriers are delayed or advanced to avoid the zero state. Thus, the peaks of CMV will be reduced under any modulation index. The feasibility and validity of this scheme are verified through the experiments.
TL;DR: In this article, a frequency domain (FD) approach and a synchronous reference frame (SRF) based approach were proposed to minimize the low-order harmonic pulsating torque in induction motor drives.
Abstract: A low-order harmonic pulsating torque is a major concern in high-power drives, high-speed drives, and motor drives operating in an overmodulation region. This paper attempts to minimize the low-order harmonic torques in induction motor drives, operated at a low pulse number (i.e., a low ratio of switching frequency to fundamental frequency), through a frequency- domain (FD) approach as well as a synchronous reference frame (SRF) based approach. This paper first investigates FD-based approximate elimination of harmonic torque as suggested by classical works. This is then extended into a procedure for minimization of low-order pulsating torque components in the FD, which is independent of machine parameters and mechanical load. Furthermore, an SRF-based optimal pulsewidth modulation (PWM) method is proposed to minimize the low-order harmonic torques, considering the motor parameters and load torque. The two optimal methods are evaluated and compared with sine-triangle (ST) PWM and selective harmonic elimination (SHE) PWM through simulations and experimental studies on a 3.7-kW induction motor drive. The SRF-based optimal PWM results in marginally better performance than the FD-based one. However, the selection of optimal switching angle for any modulation index $(M)$ takes much longer in case of SRF than in case of the FD-based approach. The FD-based optimal solutions can be used as good starting solutions and/or to reasonably restrict the search space for optimal solutions in the SRF-based approach. Both of the FD-based and SRF-based optimal PWM methods reduce the low-order pulsating torque significantly, compared to ST PWM and SHE PWM, as shown by the simulation and experimental results.
TL;DR: A Modified Hybrid PWM technique is proposed, which retains the power distribution and uniform switch utilization features of PS-PWM technique and results in output voltage profile similar to that with Hybrid-P WM technique.
Abstract: Among the carrier based pulse width modulation (PWM) techniques, Phase Shifted PWM (PS-PWM) technique is preferred for Cascaded H-Bridge (CHB) multilevel inverters. This technique distributes power evenly among the modules and also ensures equal utilization of inverter switches within a module. On the other hand Carrier Disposition PWM (CD-PWM) technique has superior output voltage profile, but results in uneven power distribution and non-uniform switch utilization. Modified CD-PWM and Hybrid-PWM techniques can be used to mitigate the problem related to uneven power distribution. In this paper, the performance comparison of above mentioned modulation techniques is presented for a 7-level CHB multilevel inverter for same device switching frequency. It is found that at low modulation index, the line voltage and line current THDs are less with Hybrid-PWM technique as compared to those with PS-PWM and Modified CD-PWM techniques. But in Hybrid PWM technique, the switches within a module are not equally utilized. A Modified Hybrid-PWM technique is proposed, which retains the power distribution and uniform switch utilization features of PS-PWM technique and results in output voltage profile similar to that with Hybrid-PWM technique.
TL;DR: With this scheme, cost and volume of dual inverters in HEVs are reduced, considering the lower number of current sensors, and the maximum allowable modulation index and dc-link voltage utilization are improved.
Abstract: This paper presents a six-phase current reconstruction scheme for dual traction inverters in hybrid electric vehicles (HEVs) with a single dc-link current sensor. During the phase current reconstruction, one of the inverters is proposed to operate using active vectors, whereas the other inverter operates using nonactive vectors. An advanced phase-shift scheme for all pulsewidth-modulated (PWM) signals based on the sequence of duty cycles is implemented. PWM signals are considered in three types: large, medium, and small duty cycles. Then, the minimum phase-shift scheme is applied to each type of PWM signal to ensure the minimum duration of the active vector for stable current reconstruction. With this proposed phase-shift scheme, the maximum allowable modulation index and dc-link voltage utilization are improved. In addition, the relationship between the minimum required time for stable phase current reconstruction and the maximum allowable modulation index is derived theoretically. The effectiveness of the proposed method is verified by both simulation and experimental results. With this scheme, cost and volume of dual inverters in HEVs are reduced, considering the lower number of current sensors.
TL;DR: In this paper, an optimal selective harmonic elimination control strategy is introduced for cascaded H-bridge (CHB) rectifiers, where the maximum number of harmonics is eliminated for a specific number of switching transitions.
Abstract: In medium-voltage medium- and high-power converters, it is of great importance to reach high-quality waveforms with low switching frequency. In active rectifiers, both converter's ac-side harmonics and grid preexisting distortions affect the quality of the input current, which according to the existing standards is restricted from both the individual harmonics amplitude and total harmonic distortion point of view. The well known selective harmonic elimination pulse-width modulation technique is able to completely eliminate certain harmonics from the ac-side voltage of the converter, and as a result increases the quality of the input current. In this study, an optimal selective harmonic elimination control strategy is introduced for cascaded H-bridge (CHB) rectifiers. By fully manipulating the ac-side waveform of the rectifier, maximum number of harmonics is eliminated for a specific number of switching transitions. Moreover, this method can be easily extended for any number of H-bridge cells and it uses only one lookup table for the whole interval of modulation index. Also using an effective voltage balancing technique, dc-link voltages are balanced to the reference value and the rectifier does not encounter any difficulty under equal or nonequal loads conditions. Using this method, the size of the bulky line-side filters can be reduced which leads to lower overall cost of implementation. To prove the feasibility of the proposed scheme, simulation and experimental results for a seven-level CHB-based rectifier are reported.
TL;DR: In this paper, a system involving W-band (75-110 GHz) optical millimeter (mm)-wave generation using the external optical modulator (EOM) in a radio-over-fiber (RoF) link is presented for satisfying the requirements for multi-gigabit-per-second data rates.
Abstract: A system involving W-band (75–110 GHz) optical millimeter (mm)-wave generation using the external optical modulator (EOM) in a radio-over-fiber (RoF) link is presented for satisfying the requirements for multi-gigabit-per-second data rates. A 90-GHz mm-wave signal was generated by a nonupling (nine times) increase in only a 10-GHz local oscillator by biasing the EOM at its zero level and choosing an appropriate modulation index. To achieve a fast transmission speed wirelessly, high spectral efficiency (SE), and better transmission performance, orthogonal frequency-division multiplexing (OFDM) is used. The bit error rate (BER) and error vector magnitude (EVM) of the system were measured for three different fiber lengths and for a wireless distance of 1–5 m. The results show that the system with the SE of $\sim$ 4 (b/s)/Hz and 16-ary quadrature amplitude modulation (QAM) 40-GB/s OFDM signals can be received by the end user with BER less than $3.8\times 10^{-3}$ and EVM less than 25% over a 50-km optical fiber and 3-m wireless link.
TL;DR: In this article, the authors established that a combination of both types of waveforms gives better performance than any individual waveform in terms of minimum harmonic distortion of line to line (V WTHD) for complete range of modulation index (M) for PWM waveforms with pulse numbers (P) of 5 and 7.
Abstract: PWM waveforms with positive voltage transition at the positive zero crossing of the fundamental voltage (type-A) are generally considered for PWM waveform with even number of switching angles per quarter whereas, waveforms with negative voltage transition at the positive zero crossing (type-B) are considered for odd number of switching angles per quarter Optimal PWM, for minimization of total harmonic distortion of line to line (V WTHD ), is generally solved with the aforementioned criteria This paper establishes that a combination of both types of waveforms gives better performance than any individual type in terms of minimum V WTHD for complete range of modulation index (M) Optimal PWM for minimum V WTHD is solved for PWM waveforms with pulse numbers (P) of 5 and 7 Both type-A and type-B waveforms are found to be better in different ranges of M The theoretical findings are confirmed through simulation and experimental results on a 37kW squirrel cage induction motor in an open-loop V/f drive Further, the optimal PWM is analysed from a space vector point of view
TL;DR: In this paper, a 3-phase Y-source inverter with three windings was proposed to operate at a higher modulation index, thereby minimizing switching device stress and providing better output power quality.
Abstract: This paper introduces a new 3-phase Y-source inverter whose gain is presently not matched by classical impedance-network-based inverters operating at the same duty ratio. The proposed network uses a tightly coupled transformer with three windings. By squeezing the shoot-through range while keeping higher boost, the inverter can operate at a higher modulation index, thereby minimizing switching device stress and providing better output power quality. In addition, the inverter has more degrees of freedom for setting the voltage gain and modulation index than other classical impedance-source networks. This design flexibility was proven mathematically, and is supported by simulations carried out to prove the concept and validate the analysis.
TL;DR: The structure and features of an FPGA implementation of an appropriate pulsewidth modulation (PWM) strategy are presented, and the selected PWM strategy guarantees dc-link capacitor voltage balance in every switching cycle, and covers both the undermodulation and overmodulation regions.
Abstract: With the aim to implement a suitable controller for a three-phase dc-ac multilevel active-clamped converter to enable its use in practice, and as a first step toward a full closed-loop converter control implementation into a single field-programmable gate array (FPGA) device, this paper presents the structure and features of an FPGA implementation of an appropriate pulsewidth modulation (PWM) strategy. The selected PWM strategy guarantees dc-link capacitor voltage balance in every switching cycle, and covers both the undermodulation and overmodulation regions. A flexible implementation is conceived, allowing the variation of important operating parameters, such as the modulation index and switching frequency, through a simple user interface. The key aspects to achieve an efficient and robust FPGA implementation are discussed. Experimental results in a four-level converter prototype controlled with an Altera Cyclone III device under different operating conditions match fairly well with the expected results obtained through simulation, thus verifying the accurate performance of the FPGA-based modulator.
TL;DR: In this article, an interleaving scheme to reduce the DC-link current harmonics of dual traction inverters in hybrid electric vehicles (HEVs) was proposed, which reduced the required DC-layer capacitance and improved the lifetime of the capacitor.
Abstract: In traction inverters of hybrid electric vehicles (HEVs), DC-link capacitors, which are usually bulky and expensive, present an obstacle for improving the power density and reliability. This paper introduces an interleaving scheme to reduce the DC-link current harmonics of dual traction inverters in HEVs. The DC-link current expression is derived considering the modulation schemes, modulation index, displacement power factor (DPF), and interleaving angle. Based on the current analysis, proper interleaving angles to reduce the DC-link current harmonics are obtained for different operating modes of the electric traction machines. With the proposed interleaving angles, the DC-link current harmonics are reduced. Therefore, the required DC-link capacitance is reduced and the lifetime of the capacitor is improved. The effectiveness of the proposed interleaving scheme is verified by simulation results.
TL;DR: In this paper, texture analysis on fluence maps was performed to evaluate the degree of modulation for volumetric modulated arc therapy (VMAT) plans, and the performance of textural features as indicators for the modulation degree of VMAT plans, Spearman's rank correlation coefficients (rs ) with the plan deliverability were calculated.
Abstract: Purpose: Texture analysis on fluence maps was performed to evaluate the degree of modulation for volumetric modulated arc therapy (VMAT) plans. Methods: A total of six textural features including angular second moment, inverse difference moment, contrast, variance, correlation, and entropy were calculated for fluence maps generated from 20 prostate and 20 head and neck VMAT plans. For each of the textural features, particular displacement distances (d) of 1, 5, and 10 were adopted. To investigate the deliverability of each VMAT plan, gamma passing rates of pretreatment quality assurance, and differences in modulating parameters such as multileaf collimator (MLC) positions, gantry angles, and monitor units at each control point between VMAT plans and dynamic log files registered by the Linac control system during delivery were acquired. Furthermore, differences between the original VMAT plan and the plan reconstructed from the dynamic log files were also investigated. To test the performance of the textural features as indicators for the modulation degree of VMAT plans, Spearman’s rank correlation coefficients (rs ) with the plan deliverability were calculated. For comparison purposes, conventional modulation indices for VMAT including the modulation complexity score for VMAT, leaf travel modulation complexity score, and modulation index supporting station parameter optimized radiation therapy (MISPORT) were calculated, and their correlations were analyzed in the same way. Results: There was no particular textural feature which always showed superior correlations with every type of plan deliverability. Considering the results comprehensively, contrast (d = 1) and variance (d = 1) generally showed considerable correlations with every type of plan deliverability. These textural features always showed higher correlations to the plan deliverability than did the conventional modulation indices, except in the case of modulating parameter differences. The rs values of contrast to the global gamma passing rates with criteria of 2%/2 mm, 2%/1 mm, and 1%/2 mm were 0.536, 0.473, and 0.718, respectively. The respective values for variance were 0.551, 0.481, and 0.688. In the case of local gamma passing rates, the rs values of contrast were 0.547, 0.578, and 0.620, respectively, and those of variance were 0.519, 0.527, and 0.569. All of the rs values in those cases were statistically significant (p < 0.003). In the cases of global and local gamma passing rates, MISPORT showed the highest correlations among the conventional modulation indices. For global passing rates, rs values of MISPORT were −0.420, −0.330, and −0.632, respectively, and those for local passing rates were −0.455, −0.490 and −0.502. The values of rs of contrast, variance, and MISPORT with the MLC errors were −0.863, −0.828, and 0.795, respectively, all with statistical significances (p < 0.001). The correlations with statistical significances between variance and dose-volumetric differences were observed more frequently than the others. Conclusions: The contrast (d = 1) and variance (d = 1) calculated from fluence maps of VMAT plans showed considerable correlations with the plan deliverability, indicating their potential use as indicators for assessing the degree of modulation of VMAT plans. Both contrast and variance consistently showed better performance than the conventional modulation indices for VMAT.
TL;DR: A simulation of a transistor clamped H-bridge multilevel inverter using double reference single carrier modulation technique and the total harmonic distortion obtained for different values of the modulation index is presented.
Abstract: Double reference single carrier modulation technique is a new technique employed for generating pulses for multilevel inverters. This paper presents a simulation of a transistor clamped H-bridge multilevel inverter using double reference single carrier modulation technique. Using the modulation technique, output voltage, output current and voltage stress across the switches of the transistor clamped multilevel inverter is obtained. The total harmonic distortion obtained for different values of the modulation index is presented. Further, the paper aims to perform a comparison of a transistor clamped H-Bridge multilevel inverter with a conventional cascaded H-Bridge multilevel inverter. The comparison is done with respect to complexity of the circuit topologies and total harmonic distortion obtained with both the multilevel inverters. Results are obtained using simulations done in MATLAB Simulink environment.
TL;DR: Theoretical analysis shows that SVPWM is a special type of CBP WM algorithm not only in the linear modulation region but also in the over-modulation region, which provides a bidirectional bridge for the transformation between SVP WM and CBPWM in the full modulation region.
Abstract: For low voltage motor drive applications, in order to enhance the utilisation rate of dc bus voltage and extend the operating boundary of induction motors, the modulation index is often extended from the linear modulation region to the over-modulation region. The relationship between two-level space-vector pulse-width modulation (SVPWM) and carrier-based pulse-width modulation (CBPWM) in the linear modulation region has been widely investigated and it was shown that the conventional SVPWM is a special type of CBPWM algorithm with zero sequence components injection. On the basis of that, this study focuses on investigating their relationship in the over-modulation region. Firstly, the superposition principle is adopted to analyse the features of SVPWM algorithm in the over-modulation region. Second, the modulating functions of CBPWM equivalent to SVPWM in the over-modulation modes I and II are derived, respectively, which are on the basis of the CBPWM regular sampling rule. Theoretical analysis shows that SVPWM is a special type of CBPWM algorithm not only in the linear modulation region but also in the over-modulation region, which provides a bidirectional bridge for the transformation between SVPWM and CBPWM in the full modulation region. Finally, the validity and effectiveness of the theoretical analysis are verified by simulation and experimental results.
TL;DR: In this article, a modified cascaded H-bridge multilevel inverter (MLI) is proposed and designed for solar applications, which is designed for power 1.5kW and Inphase level shifting SPWM technique has been incorporated in which 5kHz carrier wave is compared with 50Hz of sinusoidal wave with a modulation index of 0.8.
Abstract: In this paper, a modified cascaded H-bridge multilevel inverter (MLI) is proposed and designed for solar applications. Generally, as the level of conventional multilevel inverter increases, the required number of switches and size increases. The proposed topology is cascade of unit stages which involves 5 switches and two voltage source; moreover a unit stage is capable of generating 5 levels. Also, the detailed analysis of cascaded multilevel inverter is discussed which incorporates three different methodologies involving less number of power devices in order to generate maximum number of levels. This results into reduction in gate drive circuitry and less switching losses. The proposed MLI is designed for power 1.5kW and Inphase level shifting SPWM technique has been incorporated in which 5kHz carrier wave is compared with 50Hz of sinusoidal wave with a modulation index of 0.8. As a result, total harmonic distortion (THD) is achieved as 4.71% with LC-filter for above mentioned multilevel inverter. The circuits are modeled and simulated with the help of MATLAB/SIMULINK.
TL;DR: The satisfactory simulation results indicate that there is a promise to implement the proposed electronic design using discrete components as practical module.
Abstract: This paper proposes a full design with all included stages of a high performance standalone photovoltaic system based on discrete electronic components. The design proposes a solution to reduce or eliminate the fluctuation of the supplied DC voltage of solar panel due to weather variations. The proposed design includes DC–DC boost converter that produces a stable DC output voltage with a higher level, this is achieved by controlling the Duty cycle of the drive switching pulses during sensing the level of the solar panel voltage. The next stage is a modified unipolar Sinusoidal Pulse Width Modulation inverter with Zero Crossing Detector circuit that is designed with a modified higher power reference wave compared with traditional SPWM. The modified SPWM controls the Modulation Index to stabilize the fluctuation in the output AC voltage. The selected filter type LCL-Filter is designed to minimize the effect of harmonics on the load voltage. On the other hand, an accurate DC power supply is designed to provide the required stable DC voltages for all included electronic circuits; the solar panel voltage is an input to the designed DC power supply. Total Harmonic Distribution measurements, the stable output voltage level of the DC–DC converter, DC power supply, and the stabilization of the load voltage reflect the effectiveness of the proposed photovoltaic system. The overall electronic design works under wide range of solar panel voltage fluctuations. The satisfactory simulation results indicate that there is a promise to implement the proposed electronic design using discrete components as practical module.
TL;DR: In this article, the authors proposed a new carrier phase-shift modulation (PWM) strategy for three-level T-type NPC inverters, which substantially eliminates common mode voltage (CMV) and damages AC motors.
Abstract: Common-mode voltage (CMV) causes overvoltage stress to winding insulation and damages AC motors. CMV with high dv/dt causes leakage currents, which create noise problems for equipment installed near the converter. This study proposes a new pulse-width modulation (PWM) strategy for three-level T-type NPC inverters. This strategy substantially eliminates CMV. The principle for selecting suitable triangle carrier signals for the three-level T-type NPC is described. The proposed method can mitigate the peak value of CMV by 50% compared with the phase disposition pulse-width modulation method. Furthermore, the proposed method exhibits better harmonic spectrum and lower root mean square value for the CMV than those of the reduced-CMV method on the basis of the phase opposition disposition PWM scheme with modulation index higher than 0.5. The proposed modulation can easily be implemented using software without any additional hardware modifications. Both simulation and experimental results demonstrate that the proposed carrier phase-shift PWM method has good output waveform performance and reduces CMV.
TL;DR: By employing the proposed scheme, this study successfully demonstrates 50-Gbps OFDM transmission over 100-km dispersion-uncompensated single-mode fiber based on a single 10-GHz EAM.
Abstract: In this study, a technique was developed to compensate for nonlinear distortion through cancelling subcarrier-to-subcarrier intermixing interference (SSII) in an electroabsorption modulator (EAM)-based orthogonal frequency-division multiplexing (OFDM) transmission system. The nonlinear distortion to be compensated for is induced by both EAM nonlinearity and fiber dispersion. Because an OFDM signal features an inherently high peak-to-average power ratio, a trade-off exists between the optical modulation index (OMI) and modulator nonlinearity. Therefore, the nonlinear distortion limits the operational tolerance of the bias voltage and the driving power to a small region. After applying the proposed SSII cancellation, the OMI of an OFDM signal was increased yielding only a small increment of nonlinear distortion, and the tolerance region of the operational conditions was also increased. By employing the proposed scheme, this study successfully demonstrates 50-Gbps OFDM transmission over 100-km dispersion-uncompensated single-mode fiber based on a single 10-GHz EAM.
TL;DR: Different multilevel converter topologies, such as neutral point clamped (NPC), flying capacitor (FC), and modular multilesvel cascaded (MMC), have been considered and compared for the design of an 11 kV converter system and the performance is analyzed and compared in the MATLAB/Simulink environment.
Abstract: Although several converter topologies have been used in low-voltage applications, most of the topologies are not suitable in medium-voltage applications. The selection of converter topology in medium-voltage applications is really a critical problem and highly affects the converter performance and cost. The main aim of this chapter was to find out a suitable converter topology, which can interconnect the renewable generation units directly to the medium-voltage grid with mature semiconductor devices. Different multilevel converter topologies, such as neutral point clamped (NPC), flying capacitor (FC), and modular multilevel cascaded (MMC), have been considered and compared for the design of an 11 kV converter system. The comparison is made in terms of the number of semiconductors, semiconductor cost and availability, total harmonic distortions (THDs), filter size, and control complexity of the converters. The performance is analyzed and compared in the MATLAB/Simulink environment. To ensure quality performance, a level-shifted carrier-based switching scheme is used for the NPC topologies and a phase-shifted carrier-based switching scheme is used for the FC and MMC converter topologies with a carrier frequency of 1–2 kHz and modulation index of 0.8–0.9.
TL;DR: In this paper, the authors investigated optimal switching angles with and without half-wave symmetry (HWS) conditions on the pulse width modulated waveform and showed that the optimal solution without QWS outperformed the optimal solutions with QWS over a range of modulation index (M) between 0.82 and 0.94 for a switching frequency to fundamental frequency ratio of 5.
Abstract: Optimal switching angles for minimization of total harmonic distortion of line current (ITHD) in a voltage source inverter are determined traditionally by imposing half-wave symmetry (HWS) and quarter-wave symmetry (QWS) conditions on the pulse width modulated waveform. This paper investigates optimal switching angles with QWS relaxed. Relaxing QWS expands the solution space and presents the possibility of improved solutions. The optimal solutions without QWS are shown here to outperform the optimal solutions with QWS over a range of modulation index (M) between 0.82 and 0.94 for a switching frequency to fundamental frequency ratio of 5. Theoretical and experimental results are presented on a 2.3kW induction motor drive.
TL;DR: In this paper, a generalised bus-clamping pulse width modulation (ABCPWM) scheme was proposed for a three-phase inverter and an analytical closed-form expression was derived for the harmonic distortion factor corresponding to the generalised ABCPWM.
Abstract: A few advanced bus-clamping pulse width modulation (ABCPWM) methods have been proposed recently for a three-phase inverter. With these methods, each phase is clamped, switched at nominal frequency, and switched at twice the nominal frequency in different regions of the fundamental cycle. This study proposes a generalised ABCPWM scheme, encompassing the few ABCPWM schemes that have been proposed and many more ABCPWM schemes that have not been reported yet. Furthermore, analytical closed-form expression is derived for the harmonic distortion factor corresponding to the generalised ABCPWM. This factor is independent of load parameters. The analytical expression derived here brings out the dependence of root-mean-square (RMS) current ripple on modulation index, and can be used to evaluate the RMS current ripple corresponding to any ABCPWM scheme. The analytical closed-form expression is validated experimentally in terms of measured weighted total harmonic distortion (THD) in line voltage (V-WTHD) and measured THD in line current (I-THD) on a 6 kW induction motor drive.
TL;DR: In this paper, an experimental verification of the Improved Switched Inductor Z-Source Inverter (ISL-ZSI) has been presented and analyzed in detail and verified by simulation and experimentally.
Abstract: This paper presents an experimental verification of the Improved Switched Inductor Z-Source Inverter (ISL-ZSI). The ISL-ZSI has been proposed to overcome the limitations of classical Z-Source Inverter (ZSI) such as lower voltage gain, higher capacitor voltage stress of Z-network and huge inrush current that appears in the case of traditional ZSI. In this paper, different aspects will be presented and analysed such as the PWM control, relationships of voltage boosting gain versus modulation index, voltage stress versus modulation index and output voltage/current. Those important points will be analyzed in detail and verified by simulation and experimentally.
TL;DR: In this article, a space vector pulse width modulation (SVPWM) based three-phase four-switch inverter for the sensorless control of a 3-phase permanent magnet synchronous motor (PMSM) is presented.
Abstract: This article presents a space vector pulse width modulation based three-phase four-switch inverter for the sensor-less control of a three-phase permanent-magnet synchronous motor (PMSM). The PMSM was modeled in MATLAB SIMULINK using the dynamic model to extract signals required for the sensor-less control. The calculation of time for gate signals of the switches in the four-switch three-phase inverter has been explained in detail and implemented using the artificial neural networks. The ANN based SVPWM block takes reference voltage, frequency and modulation index as commands and provides three-phase voltages with variable frequency. An ANN based speed and position estimator was also implemented for the PMSM to eliminate mechanical sensors. The proposed system was implemented using the Texas Instruments' TMS320F2812 development kit and the National Instruments data acquisition module USB-6259. The results have been presented for the permanent magnet synchronous motor drive in under-modulation region.
TL;DR: In this article, the authors proposed a new topology of cascaded multilevel inverter, with considerable reduction in the number of switches and DC voltage sources, without sacrificing the quality output of the inverter.
Abstract: This paper introduces new topology of cascaded multilevel inverter, with considerable reduction in the number of switches and DC voltage sources. The proposed topology is based on asymmetrical multilevel inverter which produces 21 levels of output with the use of 11 unidirectional switches, 3 diodes and 4 DC voltage sources. The advantages of this topology are reduction in the number of switches (2 nos.) and gate driver circuits (2 nos.), reduction in the number of DC sources (2 nos.) also cost, complexity, and space required for hardware is reduced without sacrificing the quality output of the inverter. To reduce the THD further Level shifting SPWM techniques such as PD, POD & APOD are used and comparison is shown on the basis of THDs obtained from the above SPWM techniques. Frequency of carrier waves is 1KHz, and modulation index is 1.0. To validate the proposed topology the circuit is simulated and verified by using MATLAB/Simulink. DOI: http://dx.doi.org/10.11591/ijpeds.v5i1.5810
TL;DR: In this paper, a new procedure to mitigate some harmonics is presented for a 5-level cascaded inverter, varying the modulation index by using a procedure based on graphycal analysis by using Chebyshev polynomials and the Waring's formulae.
Abstract: A new procedure to mitigate some harmonics is presented for a 5-level cascaded inverter, varying the modulation index. The two switching angles α
1
and α
2
are computed by using a procedure based on graphycal analysis by using Chebyshev polynomials and the Waring's formulae. The proposed mitigation technique is applied to reduce a pair of harmonics among third, fifth and seventh in inverter output voltage according to standard code requirements. Experimental results are also extracted by the prototype built at the laboratory. The measured results confirm the quality of the presented procedure.