Mask ROM

Abstract: A World Wide Web browser software is implemented in a processing system housed in a set-top box connected to a television and communicating over a wide-area network with one or more servers. The browser software allows a user to navigate using a remote control through World-Wide Web pages in which a number of hypertext anchors are displayed on the television. User inputs are entered from a remote input device using an infrared (IR) link. The processing system includes a read-only memory (ROM) and a flash memory. The mask ROM and the flash memory are assigned adjacent memory spaces in the memory map of the processing system. Browser software and configuration data are stored in the flash memory. Other software and configuration data are stored in a mask ROM. The browser is upgraded or reconfigured by downloading to the box replacement software or data transmitted from a server over the network and then writing the replacement software or data into the flash memory. A mechanism is provided to temporarily maintain power to the processing system in the event power to the box is lost during downloading. The mechanism allows the writing of a current block to be completed. An indication of the current block is maintained while power is absent so that downloading can be resumed once power is restored from the last block that was written.

Abstract: There is provided a monolithic three dimensional TFT mask ROM array. The array includes a plurality of device levels. Each of the plurality of device levels contains a first set of enabled TFTs and a second set of partially or totally disabled TFTs.

Abstract: The present invention provides methods and apparatus capable of efficiently combining a logic circuit die with a memory circuit die in a single integrated circuit device capable of supporting memory intensive applications, such as 3-dimensional graphics rendering, encryption and signal processing. The logic circuit die is produced independently with a logic circuit fabrication process that optimizes the logic circuit's performance and reduces costs, and the memory circuit die, which may contain a large memory circuit, can be produced independently with a memory circuit fabrication process that optimizes the memory circuit's performance and reduces costs. The circuit dies are attached directly together in a flip-chip fashion to create a unitary integrated circuit assembly having a high-performance, low impedance, wide-word interface. This integrated circuit assembly can be enclosed within a typical integrated circuit package for insertion on a circuit board, such as those used in personal computers and other common electronic applications.

Abstract: An integrated circuit has a built-in self-test (BIST) arrangement (60). The built-in self-test arrangement includes a read only memory (ROM), (140) that stores test algorithm instructions. A ROM logic circuit (410) receives an instruction read from the read only memory and produces a group of output signals dependent upon the instruction. A BIST register 420 receives and stores the group of output signals from the logic circuit for controlling self-test of the integrated circuit.