Land grid array

Abstract: The present invention discloses a novel electronic package. This semiconductor packaging assembly is for supporting and containing an integrated circuit (IC) chip. The IC chip is supported on a single core double-layer substrate as a flip chip which is solder-bumped with low melting point solder, e.g., a 63 wt % Sn-37 wt % Pb eutectic solder. The flip chip is supported on a single core double-sided FR-4/5 or BT substrate provided with via holes to form via connections interconnecting the solder bumps to a land grid array disposed on the bottom surface of the substrate. The substrate is then surface mounted and soldered onto a printed circuit board which again is provided with low temperature 63 wt % Sn-37 wt % Pb eutectic solder paste for securely attaching the LGA CSP. Simplified processes are employed to assemble the electronic package with high yield processing steps, which can be conveniently carried out. CSP package with high reliability and improved performance characteristics can be achieved with a reduced production cost. This invention further discloses a tape-substrate provided for interposing between a semiconductor chip and a printed circuit board (PCB). The tape substrate includes a bottom insulation layer. The tape substrate further includes a plurality of conductive pads disposed on top of the bottom insulation layer for electrical connection to the semiconductor chip. The tape substrate further includes a plurality of PCB contact-openings opened in the insulation layer and a plurality of PCB contact-pads, each covering one of the PCB contact-openings for electrical connection to circuit on the PCB. The tape substrate further includes a plurality of connection means for interconnecting the conductive pads to the PCB contact-pads.

Abstract: An electrical assembly 100 is provided which includes a land grid array integrated circuit package 103, a socket 104, a printed circuit board 106 and a clamping lid 101. Socket 104 and clamping lid 101 have major surface dimensions no greater than the major surface dimensions of the LGA integrated circuit package 103 in order to limit board space requirements to the minimum required by the circuit package 103. Alignment means associated with integrated circuit package 103, socket 104 and printed circuit board 106 are provided to maintain alignment between contact pads 120 on circuit package 103 and first ends of compressible conductors 111 on socket 104 and between contact pads 122 on circuit board 106 and second ends of compressible conductors 111. In the completed assembly, clamping lid 101 applies pressure to an adjacent surface of integrated circuit package 103 thereby compressing compressible conductors 111 against contact pads 120 and contact pads 122.

Abstract: An interposer for a land grid array includes a dielectric grid having an array of holes and a resilient, conductive button disposed in one or more of the holes. The button includes an insulating core, a conducting element wound around the insulating core, and an outer shell surrounding the conducting element. The characteristics of the conducting element and the buttons may be chosen such that the contact force and resistance, and compressibility or relaxability of the conductive buttons can be selected within wide limits. Contact areas between the shell and the conducting element urge a substantially corresponding displacement in both the conducting element and the shell when the button is under compression or relaxation. The interposer alternatively can include an insulating sheet and rather than conductive buttons contain conducting elements disposed therein having contact areas with the block. The interposer when positioned between a land grid array and an electrical circuit component can accommodate relatively large nonplanarity between respective mating surfaces of the two interconnected components while establishing and maintaining contact between each conducting element and the opposing contact pads of each component. A high local contact force is produced at each end of the conducting element against an opposing electrical contact or contact pad of a circuit device to establish a good electrical connection with the interposer which thus electrically interconnects the land grid array and the circuit component. The new interposer design is eminently amenable to high frequency and high current applications.

Abstract: A flip-chip module is interconnected to a PCB or circuit card through a peripheral LGA interposer connector. The flip-chip is mounted on the same surface of the module substrate as the peripheral array of LGA interconnection pads and projects into a central opening of the interposer. An opening in the upper stiffener of the PCB or circuit card permits the peripheral array of LGA interconnection pads to make contact with corresponding LGA PCB or circuit card pads. A first heat sink is arranged to thermally contact the entire surface of the substrate opposing the surface upon which the flip-chip is mounted. An opening in the PCB or circuit card and lower stiffener allows a second heat sink to make thermal contact with the surface of the flip-chip.