Interrupt coalescing

Abstract: An apparatus and method for dynamically enabling and disabling interrupt coalescing in a data processing system. The present invention involves consistently monitoring IO load on an IOP of an IO adapter. The firmware on the IO adapter may have a global variable that stores counters for PCI function registers. Each counter tracks the number of outstanding IOs of a corresponding PCI function register. The counter is incremented whenever a new IO is received and is decremented upon posting the completed message back to the OS. A timer interrupt is generated periodically so that an ISR may be periodically performed. In the ISR, the maximum value stored of each counter seen since last timer interrupt is analyzed. When the maximum value stored is greater than a predetermined threshold value, the interrupt coalescing is enabled.

Abstract: A system and method are provided that involve a host computing machine and an SR IOV storage adapter in which the host machine hosts a virtual machine having a guest operating system (guest) coupled for direct passthrough IOV data path and also hosts a virtualization intermediary; a guest operating system (guest) and a virtualization intermediary exchange information concerning IO completions through a shared memory space; the guest writes information to a shared memory space that is indicative of whether an IO completion queue has reached a fill level since the most recently dispatched interrupt at which it is unsafe to coalesce an interrupt; the virtualization intermediary writes information to the shared memory space that is indicative of the interrupt most recently delivered to the guest; the virtualization intermediary reads the information written by the guest to the shared memory space that is indicative of whether an IO completion queue has reached a fill level since the most recently dispatched interrupt at which it is unsafe to coalesce an interrupt; the guest reads the information written to the shared memory space that is indicative of the interrupt most recently delivered to the guest; virtual interrupt coalescing determinations are made based upon the information shred through the shared memory space.

Abstract: A system and method for dynamically tuning the interrupt coalescing behavior of a communication interface An interrupt handler adjusts dynamic Packet and/or Latency values to control how many packets the interface may accumulate, or how much time the interface may wait after receiving a first packet, before it can signal a corresponding interrupt to a host processor and forward the accumulated packet(s) The interrupt handler maintains a Trend parameter reflecting a comparison between recent sets of packets received from the interface and the Packet parameter The Packet value is decreased or increased as packet traffic ebbs or flows When the Packet value is incremented from a minimum value, a Fallback mechanism may be activated to ensure a relatively rapid return to the minimum value if an insufficient amount of traffic is received to warrant a non-minimum Packet value The Latency value may be increased as the processor's workload increases

Abstract: In a computer system, a method of controls interrupts which correspond to input/output (I/O) processing For each delivery of an I/O completion interrupt, the method provides a recordation of a delivery time; identifies I/O completions for which deliveries of corresponding I/O completion interrupts involve deliveries of inter-processor interrupts; and for each of the identified I/O completions, accesses the recordation of the most recent delivery time to determine whether a selected period of time has elapsed since a last delivery of an inter-processor interrupt As a response to a determination that the selected period has elapsed, an inter-processor interrupt is delivers As a response to a determination that less than the duration of the selected period has elapsed, the method refrains from delivering an inter-processor interrupt