Topic
Intel QuickPath Interconnect
About: Intel QuickPath Interconnect is a research topic. Over the lifetime, 7 publications have been published within this topic receiving 215 citations. The topic is also known as: QPI & Quick Path Interconnect.
Papers
18 Aug 2010
TL;DR: The interconnect features, as well as the capabilities built into the processor’s system interconnect logic (also known as “uncore”), work together to deliver the performance, scalability, and reliability demanded in larger scale systems.
Abstract: Single processor performance has exhibited substantial growth over the last three decades [1] as shown in Figure 1. What is also desired are techniques which enable connecting together multiple processors in order to create scalable, modular and resilient multiprocessor systems. Beginning with the production of the Intel® Xeon® processor 5500 series, (previously codenamed “Nehalem-EP”), the Intel® Xeon® processor 7500 series (previously codenamed “Nehalem-EX”), and the Intel® Itanium™ processor 9300 series (previously codenamed “Tukwila-MC”), Intel Corporation has introduced a series of multi-core processors that can be easily interconnected to create server systems scaling from 2 to 8 sockets. In addition, OEM platforms are currently available that extend this up to 256-socket server designs1. This scalable system architecture is built upon the foundation of the Intel® QuickPath Interconnect (Intel QPI). These Intel micro-architectures provide multiple high-speed (currently up to 25.6 GB/s), point-to-point connections between processors, I/O hubs and third party node controllers. The interconnect features, as well as the capabilities built into the processor’s system interconnect logic (also known as “uncore”), work together to deliver the performance, scalability, and reliability demanded in larger scale systems.
107 citations
1 Aug 2009
TL;DR: Presents a collection of slides covering the following topics: Intel QuickPath Interconnect; platform configuration; physical layer; link pair; transmitter discrete-time linear equalizer; coefficient search; link layer; virtual channel mapping function; message class; command insert interleave.
Abstract: Presents a collection of slides covering the following topics: Intel QuickPath Interconnect; platform configuration; physical layer; link pair; transmitter discrete-time linear equalizer; coefficient search; link layer; virtual channel mapping function; message class; command insert interleave; routing layer; protocol layer; and configuration agent.
7 citations
Patent•
23 Sep 2011
TL;DR: In this paper, the Intel QuickPath Interconnect TM (QPI) protocol is implemented over a physical layer of the PCIe interface via use of QPI data bit mappings onto corresponding PCIe x16, x8, and x4 lane configurations.
Abstract: Methods and apparatus for implementing the Intel QuickPath Interconnect TM (QPI) protocol over a PCIe interface. The upper layers of the QPI protocol are implemented over a physical layer of the PCIe interface via use of QPI data bit mappings onto corresponding PCIe x16, x8, and x4 lane configurations. A QPI link layer to PCIe physical layer interface is employed to abstract the QPI link, routing, and protocol layers from the underlying PCIe physical layer (and corresponding PCIe interface circuitry), enabling QPI protocol messages to be employed over PCIe hardware. Thus, QPI functionality, such as support for coherent memory transactions, may be implemented over PCIe interface circuitry.
Patent•
27 Jul 2018
TL;DR: In this article, a redundancy replacement method for a QPI (Intel QuickPath Interconnect) link of a server is proposed, where a system is switched from a working state to a quiesced state according to a received interrupt signal, wherein the interrupt signal contains information of a failed QPI link.
Abstract: The invention discloses a redundancy replacement method for a QPI (Intel QuickPath Interconnect) link of a server. The method comprises the following steps: a system is switched from a working state to a quiesced state according to a received interrupt signal, wherein the interrupt signal contains information of a failed QPI link; the failed QPI link is closed according to the information of the link in the quiesced state; a route is configured, and a fault-free QPI link is constructed; the system is switched from the quiesced state to the working state. With adoption of the redundancy replacement method, redundancy replacement can be performed on the failed QPI link on the premise that the server is not shut down, and the newly constructed QPI link is used for data transmission, so that system stability is improved greatly. The invention further discloses a redundancy replacement device and equipment for the QPI link of the server and a computer readable storage medium, which all havethe same beneficial effects.
Related Topics (5)
Performance Metrics
| Year | Papers |
|---|---|
| 2018 | 2 |
| 2011 | 1 |
| 2010 | 1 |
| 2009 | 2 |
| 2008 | 1 |