Abstract: Automatic recording of user behavior within a system (instrumentation) to develop and test theories has a rich history in psychology and system design. Often, researchers analyze instrumented behavior in isolation from other data. The problem with collecting instrumented behaviors without attitudinal, demographic, and contextual data is that researchers have no way to answer the 'why' behind the 'what'. We have combined the collection and analysis of behavioral instrumentation with other HCI methods to develop a system for Tracking Real-Time User Experience (TRUE). Using two case studies as examples, we demonstrate how we have evolved instrumentation methodology and analysis to extensively improve the design of video games. It is our hope that TRUE is adopted and adapted by the broader HCI community, becoming a useful tool for gaining deep insights into user behavior and improvement of design for other complex systems.

Abstract: When creating architectural tools, it is essential to know whether the generated results make sense. Comparing a toolpsilas outputs against hardware performance counters on an actual machine is a common means of executing a quick sanity check. If the results do not match, this can indicate problems with the tool, unknown interactions with the benchmarks being investigated, or even unexpected behavior of the real hardware. To make future analyses of this type easier, we explore the behavior of the SPEC benchmarks with both dynamic binary instrumentation (DBI) tools and hardware counters. We collect retired instruction performance counter data from the full SPEC CPU 2000 and 2006 benchmark suites on nine different implementations of the times86 architecture. When run with no special preparation, hardware counters have a coefficient of variation of up to 1.07%. After analyzing results in depth, we find that minor changes to the experimental setup reduce observed errors to less than 0.002% for all benchmarks. The fact that subtle changes in how experiments are conducted can largely impact observed results is unexpected, and it is important that researchers using these counters be aware of the issues involved.

Abstract: Software development for wireless sensor networks is a challenging and time consuming task. The resource limited hardware with limited I/O and debugging abilities combined with the often cumbersome hardware debugging tools makes debugging on the target hardware difficult. We present MSPsim, an extensible sensor board platform and MSP430 instruction level simulator. MSPsim is intended to be used for reducing development and debugging time by allowing low-level and fine grained instrumentation of various aspects of software execution. The use of a simulator also enables development and testing without access to the target hardware.

Abstract: This paper presents an approach for cycle-accurate simulation of embedded software by integration in an abstract SystemC model. Compared to existing simulation-based approaches, we present a hybrid method that resolves performance issues by combining the advantages of simulation-based and analytical approaches. In a first step, cycle-accurate static execution time analysis is applied at each basic block of a cross-compiled binary program using static processor models. After that, the determined timing information is back-annotated into SystemC for fast simulation of all effects that can not be resolved statically. This allows the consideration of data dependencies during run-time and the incorporation of branch prediction and cache models by efficient source code instrumentation. The major benefit of our approach is that the generated code can be executed very efficiently on the simulation host with approximately 90% of the speed of the untimed software without any code instrumentation.

Abstract: Natural orifice transluminal endoscopic surgery (NOTES) is a largely theoretical but potentially exciting evolution of minimally invasive surgical care. Using technology borrowed from current diagnostic and therapeutic flexible endoscopy, the idea is to replicate current laparoscopic procedures in an "incisionless" manner. It is widely recognized that for NOTES to become a practical reality, many issues need to be resolved, both methodologic and political. One critical element of development will be the design of appropriate instrumentation for NOTES. This is currently happening and involves a complex collaboration between industry and clinicians both to adapt current equipment and to design and create new tools to enable the performance of transluminal procedures. This article describes the current process of such technology development as well as the resulting instrumentation that enables the performance of NOTES. The issues of access and platform stability, laparoscopic-like instruments, and secure tissue approximation are described, and the devices to solve these issues are detailed.

Abstract: Objectives: The primary aim was: "Does power-driven pocket/root instrumentation offer a clinical advantage over hand instrumentation"? Secondary aim was to update knowledge base of power-driven instrumentation post Tunkel et al. (2002). Material and Methods: A literature search of power-driven instruments (in vitro, in vivo and controlled clinical trials) was performed from April 2001 using similar criteria to Tunkel et al. (2002). Primary outcome was whether power-driven instruments offered an advantage over hand instrumentation; secondary outcomes were effect on root surface, effectiveness of new instrument designs, and role of biophysical effects such as cavitation. Results: From a total of 41 studies, 14 studies involved comparison of power-driven devices with hand instrumentation for non-surgical therapy. These were subdivided into new designs of power instrumentation, full-mouth debridement and irrigation and patient acceptance. Use of power-driven instrumentation provides similar clinical outcomes compared with hand instrumentation. Difficulty of pooling studies continues to hinder the drawing of definitive conclusions. Conclusion: Newer designs of powered instruments have not shown any benefit when compared with other ultrasonic devices in non-surgical periodontal therapy. New in vitro research shows there is variation in the performance of different tip designs and generators, but its clinical relevance remains unknown.

Abstract: Endoluminal instrument management systems are described herein which allow one or more operators to manage multiple different instruments utilized in endoluminal procedures. Responsibility for instrumentation management between one or more operators may be configured such that a first set of instruments is controlled by a primary operator and a second set of instruments is controlled by a secondary operator. The division of instrumentation may be facilitated by the use of separated instrumentation platforms or a single platform which separates each instrument for use by the primary operator. Such platforms may be configured as trays, instrument support arms, multi-instrument channels, as well as rigidized portions of instruments to facilitate its handling, among others.

Abstract: We present a critical evaluation of the first known implementation of elliptic curve cryptography over F2p for sensor networks based on the 8-bit, 7.3828-MHz MICA2 mote. We offer, along the way, a primer for those interested in the field of cryptography for sensor networks. We discuss, in particular, the decisions underlying our design and alternatives thereto. And we elaborate on the methodologies underlying our evaluation.Through instrumentation of UC Berkeley's TinySec module, we argue that, although symmetric cryptography has been tractable in this domain for some time, there has remained a need, unfulfilled until recently, for an efficient, secure mechanism for distribution of secret keys among nodes. Although public-key infrastructure has been thought impractical, we show, through analysis of our original implementation for TinyOS of point multiplication on elliptic curves, that public-key infrastructure is indeed viable for TinySec keys' distribution, even on the MICA2. We demonstrate that public keys can be generated within 34 seconds and that shared secrets can be distributed among nodes in a sensor network within the same time, using just over 1 kilobyte of SRAM and 34 kilobytes of ROM. We demonstrate that communication costs are minimal, with only 2 packets required for transmission of a public key among nodes. We make available all of our source code for other researchers to download and use. And we discuss recent results based on our work that corroborate and improve upon our conclusions.

Abstract: This paper presents an energy consumption modeling technique for embedded systems based on a microcontroller. The software tasks that run on the embedded system are profiled, and their characteristics are analyzed. The type of executed assembly instructions, as well as the number of accesses to the memory and the analog-to-digital converter, is the required information for the derivation of the proposed model. An appropriate instrumentation setup has been developed for measuring and modeling the energy consumption in the corresponding digital circuits.

Abstract: Study design Proof of concept of a spine surgery simulator (S3) for the assessment of scoliosis instrumentation configuration strategies. Objective To develop and assess a surgeon-friendly spine surgery simulator that predicts the correction of a scoliotic spine as a function of the patient characteristics and instrumentation variables. Summary of background data There is currently no clinical tool sufficiently user-friendly, reliable and refined for the preoperative planning and prediction of correction using different instrumentation configurations. Methods A kinetic model using flexible mechanisms has been developed to represent patient-specific spine geometry and flexibility, and to simulate individual substeps of correction with an instrumentation system. The surgeon-friendly simulator interface allows interactive specification of the instrumentation components, surgical correction maneuvers and display of simulation results. Results The simulations of spinal instrumentation procedures of 10 scoliotic cases agreed well with postoperative results and the expected behavior of the instrumented spine (average Cobb angle differences of 3.5 degrees to 4.6 degrees in the frontal plane and of 3.6 degrees to 4.7 degrees in the sagittal plane). Forces generated at the implant-vertebra link were mostly below reported pull-out values, with more important values at the extremities of the instrumentation. Conclusion The spine surgery simulator S3 has proven its technical feasibility and clinical relevance to assist in the preoperative planning of instrumentation strategies for the correction of scoliotic deformities.

Abstract: Over the last decades a large number of performance tools has been developed to analyze and optimize high perfor- mance applications. Their acceptance by end users, however, has been slow: each tool alone is often limited in scope and comes with widely varying interfaces and workflow constraints, requiring different changes in the often complex build and execution infrastructure of the target application. We started the Open|SpeedShop project about 3 years ago to overcome these limitations and provide efficient, easy to apply, and integrated performance analysis for parallel systems. Open|SpeedShop has two different faces: it provides an interoperable tool set covering the most common analysis steps as well as a comprehensive plugin infrastructure for building new tools. In both cases, the tools can be deployed to large scale parallel applications using DPCL/Dyninst for distributed binary instrumentation. Further, all tools developed within or on top of Open|SpeedShop are accessible through multiple fully equivalent interfaces including an easy-to-use GUI as well as an interactive command line interface reducing the usage threshold for those tools.

Abstract: Fine-grained binary instrumentations, such as those for tainttracking, have become very popular in computer security due to their applications in exploit detection, sandboxing, malware analysis, etc. However, practical application of taint-tracking has been limited by high performance overheads. For instance, previous software based techniques for taint-tracking on binary code have typically slowed down programs by a factor of 3 or more. In contrast, source-code based techniques have achieved better performance using high level optimizations. Unfortunately, these optimizations are difficult to perform on binaries since much of the high level program structure required by such static analyses is lost during the compilation process. In this paper, we address this challenge by developing static techniques that can recover some of the higher level structure from x86 binaries. Our new static analysis enables effective optimizations, which are applied in the context of taint tracking. As a result, we achieve a substantial reduction in performance overheads as compared to previous works.

Abstract: A method and apparatus is disclosed herein for constructing security policies for content instrumentation against attacks. In one embodiment, the method comprises constructing one or more security policies for web content using at least one rewriting template, at least one edit automata policy, or at least one policy template; and rewriting a script program in a document to cause behavior resulting from execution of the script to conform to the one or more policies.

Abstract: In this paper we present PROSE, a system that performs reversible and systematic changes to running Java applications without requiring them to be shut down. PROSE is motivated by scenarios such as hotfixes, online program instrumentation and debugging, and evolution of critical legacy applications. In PROSE, changes to running applications are performed by replacing method bodies. To select which code to replace, PROSE supports matching based on both type information and regular expressions. New code can invoke the method it replaces, facilitating code evolution. Changes are composable, and may be reordered or selectively withdrawn at any time. Furthermore, the dynamic changes are expressed as Java classes rather than through an additional programming language. We describe the architecture of PROSE, the challenges of using aggressive inlining to achieve performance, and use standard benchmarks to demonstrate code performance comparable with, or better than, compile-time systems from the Aspect-Oriented Programming community.

Abstract: In a grid computing environment, resources are shared among a large number of applications. Brokers and schedulers find matching resources and schedule the execution of the applications by monitoring dynamic resource availability and employing policies such as first- come-first-served and back-filling. To support applications with timeliness requirements in such an environment, brokering and scheduling algorithms must address an additional problem - they must be able to estimate the execution time of the application on the currently available resources. In this paper, we present a modeling approach to estimating the execution time of long-running scientific applications. The modeling approach we propose is generic; models can be constructed by merely observing the application execution "externally" without using intrusive techniques such as code inspection or instrumentation. The model is cross-platform; it enables prediction without the need for the application to be profiled first on the target hardware. To show the feasibility and effectiveness of this approach, we developed a resource usage model that estimates the execution time of a weather forecasting application in a multi-cluster grid computing environment. We validated the model through extensive benchmarking and profiling experiments and observed prediction errors that were within 10% of the measured values. Based on our initial experience, we believe that our approach can be used to model the execution time of other time-sensitive scientific applications; thereby, enabling the development of more intelligent brokering and scheduling algorithms.

Abstract: Transactional memory (TM) is a promising concurrency control alternative to locks. Recent work has highlighted important memory model issues regarding TM semantics and exposed problems in existing TM implementations. For safe, managed languages such as Java, there is a growing consensus towards strong atomicity semantics as a sound, scalable solution. Strong atomicity has presented a challenge to implement efficiently because it requires instrumentation of non-transactional memory accesses, incurring significant overhead even when a program makes minimal or no use of transactions. To minimize overhead, existing solutions require either a sophisticated type system, specialized hardware, or static whole-program analysis. These techniques do not translate easily into a production setting on existing hardware. In this paper, we present novel dynamic optimizations that significantly reduce strong atomicity overheads and make strong atomicity practical for dynamic language environments. We introduce analyses that optimistically track which non-transactional memory accesses can avoid strong atomicity instrumentation, and we describe a lightweight speculation and recovery mechanism that applies these analyses to generate speculatively-optimized but safe code for strong atomicity in a dynamically-loaded environment. We show how to implement these mechanisms efficiently by leveraging existing dynamic optimization infrastructure in a Java system. Measurements on a set of transactional and non-transactional Java workloads demonstrate that our techniques substantially reduce the overhead of strong atomicity from a factor of 5x down to 10% or less over an efficient weak atomicity baseline.

Abstract: Dynamic binary translation (DBT) is a runtime instrumentation technique commonly used to support profiling, optimization, secure execution, and bug detection tools for application binaries. However, DBT frameworks may incorrectly handle multithreaded programs due to races involving updates to the application data and the corresponding metadata maintained by the DBT. Existing DBT frameworks handle this issue by serializing threads, disallowing multithreaded programs, or requiring explicit use of locks. This paper presents a practical solution for correct execution of multithreaded programs within DBT frameworks. To eliminate races involving metadata, we propose the use of transactional memory (TM). The DBT uses memory transactions to encapsulate the data and metadata accesses in a trace, within one atomic block. This approach guarantees correct execution of concurrent threads of the translated program, as TM mechanisms detect and correct races. To demonstrate this approach, we implemented a DBT-based tool for secure execution of x86 binaries using dynamic information flow tracking. This is the first such framework that correctly handles multithreaded binaries without serialization. We show that the use of software transactions in the DBT leads to a runtime overhead of 40%. We also show that software optimizations in the DBT and hardware support for transactions can reduce the runtime overhead to 6%.

Abstract: A system and method for monitoring a web-page utilizing a dashboard application is disclosed herein. On the server-side, the present invention modifies each of the plurality of objects of a web-page by adding additional instrumentation code and attributes to create a modified web-page with reporting functions to the dashboard application. The modified web-page is served to the client-side and real-time information for the modified web-page is reported to the dashboard application.

Abstract: Reconfigurable computing (RC) applications employing both microprocessors and FPGAs have potential for large speedup when compared with traditional (software) parallel applications. However, this potential is marred by the additional complexity of these dual-paradigm systems, making it difficult to identify performance bottlenecks and achieve desired performance. Performance analysis concepts and tools are well researched and widely available for traditional parallel applications but are lacking in RC, despite being of great importance due to the applications' increased complexity. In this paper, we explore challenges and present new techniques in automated instrumentation, runtime measurement, and visualization of RC application behavior. We also present ideas for integration with conventional performance analysis tools to create a unified tool for RC applications as well as our initial framework for FPGA instrumentation and measurement. Results from a case study are provided using a prototype of this new tool.

Abstract: With an increasing prevalence of virtual high school programs in the United States, a better understanding of evaluative tools available for distance educators and administrators is needed. These evaluative tools would provide opportunities for assessment and a determination of success within virtual schools. This article seeks to provide an analysis and classification of instrumentation currently available. It addresses issues regarding the limited arsenal of assessments and evaluation instrumentation for virtual schools.

Abstract: Good load balance is crucial on very large parallel systems, but the most sophisticated algorithms introduce dynamic imbalances through adaptation in domain decomposition or use of adaptive solvers. To observe and diagnose imbalance, developers need system-wide, temporally-ordered measurements from full-scale runs. This potentially requires data collection from multiple code regions on all processors over the entire execution. Doing this instrumentation naively can, in combination with the application itself, exceed available I/O bandwidth and storage capacity, and can induce severe behavioral perturbations. We present and evaluate a novel technique for scalable, low-error load balance measurement. This uses a parallel wavelet transform and other parallel encoding methods. We show that our technique collects and reconstructs system-wide measurements with low error. Compression time scales sublinearly with system size and data volume is several orders of magnitude smaller than the raw data. The overhead is low enough for online use in a production environment.

Abstract: Instrumentation is the key to success in endourology. Indeed, endourology could be redefined as "enginurology," as the marriage between engineering and urology, and developing instrumentation to improve patient outcomes is the key facilitator in the advancement of minimally-invasive techniques. This review article will identify the evidence base that supports our current recommendations for equipment used during ureteroscopy.