Topic
Host signal processing
About: Host signal processing is a research topic. Over the lifetime, 14 publications have been published within this topic receiving 311 citations.
Papers
Patent•
2 Aug 1999
TL;DR: In this paper, a host signal processing modem (HSP) is coupled with a host computer and a device coupled to communication lines and a host processor in the host computer. But since an incoming ring signal interrupts the host processor, the HSP communication system can activate and respond to an incoming communication even if the device is in the wait mode when the incoming communication is initiated.
Abstract: An communication system such as a host signal processing modem includes a host computer and a device that is coupled to communication lines and a host processor in the host computer. In a normal operating mode, the device generates periodic interrupts that cause the host processor to execute a software portion of the communication system. The software portion communicates with the device and implements protocols required to maintain communications with a remote system via communication lines. In a wait mode of the device, interrupts from the device to the host processor are suspended and selection logic in the device selects a communication signal such as a ring signal from the telephone lines as an interrupt to the host processor. While in wait mode, a power management system can place the system in a sleep mode because the periodic interrupts are suspended and do not indicate system activity that would prevent use of the sleep mode. However, since an incoming ring signal interrupts the host processor, the HSP communication system can activate and respond to an incoming communication even if the device is in the wait mode when the incoming communication is initiated.
138 citations
Patent•
5 Sep 1996
TL;DR: In this paper, the D/A converter reuses samples in the circular buffer to generate a maintenance signal, which is sufficient to maintain a communication link and prevent a remote device from disconnecting or entering a retrain mode.
Abstract: An HSP communications system contains a host computer which executes a software modem program and a device containing a circular buffer and a D/A converter. Typically, the host executes update routines in response to interrupts from the device and writes to the circular buffer digital samples representing amplitudes of an analog signal complying with a desired communication protocol. The samples pass through the circular buffer to the D/A converter which converts the samples into an analog communication signal. In environments such as multi-tasking systems, the host may occasionally skip interrupts and not provide new samples when required. In this case, the D/A converter reuses samples in the circular buffer to generate a maintenance signal. The maintenance signal typically does not convey correct data but is sufficient to maintain a communication link and prevent a remote device from disconnecting or entering a retrain mode. To provide a smoother maintenance signal, the circular buffer's size contains samples for an integral number of periods at the carrier and baud frequency of the desired protocol. Error correction and retransmission replace incorrect or lost data.
53 citations
Patent•
1 Aug 1996TL;DR: A host signal processor (HSP) modem has a CPU utilization control procedure which uses the number of clock cycles associated with modem tasks and the total number of cycles between interrupts to select a task for execution during the interrupts as discussed by the authors.
Abstract: A host signal processor (HSP) modem which includes procedures executed in response to interrupts has a CPU utilization control procedure which uses the numbers of clock cycles associated with modem tasks and the total number of clock cycles between interrupts to select a task for execution during the interrupts The utilization control procedure changes or selects the task as required to automatically adjust the HSP modem for the available processing power and a desired maximum percentage utilization of a host computer For example, the task can be selected to match the data transfer rate of the HSP modem with available processing power The HSP modem is more robust and is operable in host computers having relatively low processing power A user can change the maximum utilization of processing power used by the HSP modem so that more processing power is available for other purposes
32 citations
Patent•
6 Aug 1998
TL;DR: In this article, host signal processing (HSP) is employed to reduce the hardware needed for the implementation of the cellular communication system device, thus reducing cost, size and power consumption requirements.
Abstract: A communications system utilizing host signal processing techniques particularly applicable to cellular communication systems devices that are integrated with a system that incorporates a general purpose CPU running a multitasking operating system, e.g., a portable or hand held computer. The cellular communication system includes a cellular modem, cellular control/protocol function and an RF module. Additional components include a voice codec, analog modem and optional speaker phone. Conventional cellular communication systems typically utilize a dedicated DSP processor, a controller, memory devices and analog circuitry to implement cellular system functionality. The present invention utilizes the capabilities of the general purpose CPU within the host system that the cellular communication system device is integrated into. Some of the processing tasks that are adapted to execute on the host CPU include the modem, voice codec and cellular protocol. A technique known as host signal processing (HSP), employs the host CPU to reduce the hardware needed for the implementation of the cellular communication system device, thus reducing cost, size and power consumption requirements. In addition, the use of host signal processing in the cellular device provides support for different cellular protocols and standards in a single device with little or no additional cost.
26 citations
Patent•
22 Jan 1998TL;DR: In this paper, the authors present a hardware-to-analog converter (DAC) coupled to a PCI bus in the host computer, and direct transfers are according to the PCI bus master protocol.
Abstract: An HSP communication system includes a host computer which executes a software portion of an HSP modem and a device containing a digital-to-analog converter (DAC). In response to interrupts, the host executes an update routine that generates and writes samples to a software circular buffer in memory of the host computer. The samples represent amplitudes of an analog signal complying with a desired communication protocol. A direct transfer moves samples from the software circular buffer to a hardware circular buffer the device, and the DAC converts the samples from the hardware circular buffer into an analog communication signal. In an exemplary embodiment, the hardware portion is coupled to a PCI bus in the host computer, and direct transfers are according to the PCI bus master protocol. In environments such as multi-tasking systems, the host may skip interrupts or otherwise not provide new samples when required. In this case, the direct transfers transfer old samples, and the DAC reuses samples from the software circular buffer to generate a maintenance signal. If direct transfers are delayed, the DAC can reuses samples from the hardware circular buffer to generate the maintenance signal. The maintenance signal typically does not convey correct data but is sufficient to maintain a communication link and prevent a remote device from disconnecting or entering a retrain mode. For a better maintenance signal, the circular buffers contains samples for an integral number of periods of the baud frequency of the desired protocol. Error correction and retransmission can replace incorrect or lost data.
22 citations
Performance Metrics
| Year | Papers |
|---|---|
| 2015 | 1 |
| 2001 | 1 |
| 2000 | 2 |
| 1999 | 3 |
| 1998 | 4 |
| 1996 | 2 |