TL;DR: An in-depth study of the adequacy of the AspectJ language for modularizing exception handling code and performs quantitative assessments of four systems based on four quality attributes, namely separation of concerns, coupling, cohesion, and conciseness.
Abstract: It is usually assumed that the implementation of exception handling can be better modularized by the use of aspect-oriented programming (AOP). However, the trade-offs involved in using AOP with this goal are not well-understood. This paper presents an in-depth study of the adequacy of the AspectJ language for modularizing exception handling code. The study consisted in refactoring existing applications so that the code responsible for implementing heterogeneous error handling strategies was moved to separate aspects. We have performed quantitative assessments of four systems - three object-oriented and one aspect-oriented - based on four quality attributes, namely separation of concerns, coupling, cohesion, and conciseness. Our investigation also included a multi-perspective analysis of the refactored systems, including (i) the reusability of the aspectized error handling code, (ii) the beneficial and harmful aspectization scenarios, and (iii) the scalability of AOP to aspectize exception handling in the presence of other crosscutting concerns.
TL;DR: In this article, a graphical user interface (GUI) is provided that enables machine control sequences and the results of their execution to be easily and expediently analyzed, and a logic is configured to execute GUI generation code and GUI user interaction handling code, and control a display device.
Abstract: A graphical user interface (GUI) is provided that enables machine control sequences and the results of their execution to be easily and expediently analyzed. Logic is configured to execute GUI generation code and GUI user interaction handling code, and control a display device. When the logic executes the GUI generation code, a first window is displayed on the display device. The first window presents at least one option that enables a user to open a file comprising machine control sequence execution results resulting from execution of a machine control sequence. When the file is opened, a second window is displayed on the display device. The second window displays at least a summary of the execution results comprised in the file.
TL;DR: This work designs, implements, and evaluates ErrDoc, a tool that not only detects and characterizes different types of error handling bugs but also automatically fixes them, and demonstrates that ErrDoc can fix the bugs with high accuracy.
Abstract: Correct error handling is essential for building reliable and secure systems. Unfortunately, low-level languages like C often do not support any error handling primitives and leave it up to the developers to create their own mechanisms for error propagation and handling. However, in practice, the developers often make mistakes while writing the repetitive and tedious error handling code and inadvertently introduce bugs. Such error handling bugs often have severe consequences undermining the security and reliability of the affected systems. Fixing these bugs is also tiring-they are repetitive and cumbersome to implement. Therefore, it is crucial to develop tool supports for automatically detecting and fixing error handling bugs. To understand the nature of error handling bugs that occur in widely used C programs, we conduct a comprehensive study of real world error handling bugs and their fixes. Leveraging the knowledge, we then design, implement, and evaluate ErrDoc, a tool that not only detects and characterizes different types of error handling bugs but also automatically fixes them. Our evaluation on five open-source projects shows that ErrDoc can detect error handling bugs with 100% to 84% precision and around 95% recall, and categorize them with 83% to 96% precision and above 90% recall. Thus, ErrDoc improves precision up to 5 percentage points, and recall up to 44 percentage points w.r.t. the state-of-the-art. We also demonstrate that ErrDoc can fix the bugs with high accuracy.
TL;DR: In this paper, a set of virtual addresses assigned to the memories are allocated to store a shared data structure as one or more blocks accessible by instructions of programs executing in any of the processors.
Abstract: Programs to be executed on a distributed computer system are instrumented to allow data sharing. The distributed computer system includes a plurality of workstations. Each workstation includes a processor, a memory having addresses, and an input/output interface connected to each other by a bus, the input/output interfaces connecting the workstations to each other by a network. A set of virtual addresses assigned to the memories are allocated to store a shared data structure as one or more blocks accessible by instructions of programs executing in any of the processors. The size of a particular allocated block can vary with the shared data structure. Each block includes an integer number of lines, and each line including a predetermined number of bytes. Prior to executing the programs, the programs are statically analyzed to locate instructions that access the shared data stored at target addresses of the lines of the one or more blocks. The programs are modified to include additional instructions which check for valid accesses at target addresses of the instructions. The additional instructions allow the access instruction to execute if the access is valid, otherwise, the additional instructions call miss handling code. The miss handling code in turn calls procedures of a message handling library. The modified programs, the miss handling code and the message passing library are generated as an executable image.
TL;DR: In this article, the authors present a method and an apparatus for a dynamic error injection mechanism used in conjunction with a behavioral simulator in testing simulated hardware and software, and more particularly the testing of error handling code.
Abstract: A method and an apparatus for a dynamic error injection mechanism used in conjunction with a behavioral simulator in testing simulated hardware and software, and more particularly the testing of error handling code. In one implementation of the invention, Sun Microsystem's MPSAS (MULTI-PROCESSOR SPARC ARCHITECTURAL SIMULATOR) may be utilized as a behavioral model to implement the present invention. With the present invention, a range of addresses may be specified within which to test such errors. When such a command is issued, MPSAS logs the error and address range. Simulation can then be continued. At the next access to the address range to be tested with for a specific error, the present invention triggers off simulated hardware actions which would be taken in an actual hardware upon its encountering the same error. If the corresponding error handlers are turned on by the software of the present invention, the trap will be taken and the code will vector off to the error handler. This enables an operating system developer to test the error handling code.