TL;DR: This paper proposes a new hybrid storage architecture which consists of PRAM and NAND flash, and devise two novel software schemes for the proposed hybrid architecture; FSMS (File System Metadata Separation) and hFTL (hybrid Flash Translation Layer).
Abstract: NAND flash-based storage is widely used in embedded systems due to its numerous benefits: low cost, high density, small form factor and so on. However, NAND flash-based storage is still suffering from serious performance degradation for random or small size write access. This degradation mainly comes from the physical constraints of NAND flash: erase-before-program and different unit size of erase and program operations. To overcome these constraints, we propose to use PRAM (Phase-change RAM) which supports advanced features: fast byte access capability and no requirement for erase-before-program.In this paper, we focus on developing a high-performance NAND flash-based storage system by maximally exploiting the advanced feature of PRAM, in terms of performance and wearing out. To do this, we first propose a new hybrid storage architecture which consists of PRAM and NAND flash. Second, we devise two novel software schemes for the proposed hybrid storage architecture; FSMS (File System Metadata Separation) and hFTL (hybrid Flash Translation Layer). Finally, we demonstrate that our hybrid architecture increases the performance up to 290% and doubles the lifespan compared to the existing NAND flash only storage systems.
TL;DR: In this paper, a key-value-addressable memory (CAM) is used for a keyvalue addressed storage drive, where a host writes a key value pair to the drive and the drive writes the keys along bit lines of a CAM NAND portion of the drive.
Abstract: A NAND Flash based content addressable memory (CAM) is used for a key-value addressed storage drive. The device can use a standard transport protocol such as PCI-E, SAS, SATA, eMMC, SCSI, and so on. A host writes a key-value pair to the drive, where the drive writes the keys along bit lines of a CAM NAND portion of the drive and stores the value in the drive. The drive then maintains a table linking the keys to location of the value. In a read process, the host provides a key to drive, which then broadcasts down the word lines of blocks storing the keys. Based on any matching bit lines, the tables can then be used to retrieve and supply the corresponding data to the host. The system can be applied to perform a wide range of analytics on data sets loaded into the NAND array.
TL;DR: In this article, a method for operation of a solid state flash device includes writing, by a CPU, by sending commands and data to DRAM logical flash using flash commands and formatting.
Abstract: A solid state drive includes DRAM logical flash and flash memory, in which system processor reads and writes only to the DRAM logical flash which minimizes writes to the flash memory. A method for operation of a solid state flash device includes writing, by a CPU, to a solid state drive by sending commands and data to DRAM logical flash using flash commands and formatting.
TL;DR: In this article, a NAND Flash based content addressable memory (CAM) is used for a key-value addressed storage drive, which can use a standard transport protocol such as PCI-E, SAS, SATA, eMMC, SCSI, and so on.
Abstract: A NAND Flash based content addressable memory (CAM) is used for a key-value addressed storage drive. The device can use a standard transport protocol such as PCI-E, SAS, SATA, eMMC, SCSI, and so on. A host writes a key-value pair to the drive, where the drive writes the keys along bit lines of a CAM NAND portion of the drive and stores the value in the drive. The drive then maintains a table linking the keys to location of the value. In a read process, the host provides a key to drive, which then broadcasts down the word lines of blocks storing the keys. Based on any matching bit lines, the tables can then be used to retrieve and supply the corresponding data to the host. This arrangement can be applied to de-duplication: for data sets stored in a primary data storage section, corresponding data keys can be generated and store in search NAND. A received key, rather from external to the system or internally generated, can then be compared against the search NAND. The system can be applied to both in-line and off-line de-duplication.
TL;DR: In this paper, a method for caching data in an information handling system is disclosed in which write commands issued to the hard disk drive of the computer system are routed to non-volatile cache memory of the system if the disk drive is in a reduced power state.
Abstract: A method for caching data in an information handling system is disclosed in which write commands issued to the hard disk drive of the computer system are routed to non-volatile cache memory of the computer system if the hard disk drive is in a reduced power state. The non-volatile cache memory may be in the form of flash memory. If the hard disk drive is not in a reduced power state, the write command is transmitted to the hard disk drive.