TL;DR: The state-of-the-art in cryptographic pairing implementation is reviewed, starting with a basic Miller algorithm for the Tate pairing, and a series of optimizations and tricks are applied to improve performance.
Abstract: Here we review the state-of-the-art in cryptographic pairing implementation. Starting with a basic Miller algorithm for the Tate pairing we show how to successively apply a series of optimizations and tricks to improve performance. We will concentrate on the case of nonsupersingular prime characteristic elliptic curves, although many of the optimizations equally apply to the cases of supersingular elliptic and hyperelliptic curves. We also discuss optimal implementation of extension field arithmetic.
TL;DR: This work describes a low-cost Public-Key Cryptography (PKC) based solution for security services such as key-distribution and authentication as required for wireless sensor networks.
Abstract: This work describes a low-cost Public-Key Cryptography (PKC) based solution for security services such as key-distribution and authentication as required for wireless sensor networks. We propose a custom hardware assisted approach to implement Elliptic Curve Cryptography (ECC) in order to obtain stronger cryptography as well as to minimize the power. Our compact and low-power ECC processor contains a Modular Arithmetic Logic Unit (MALU) for ECC field arithmetic. The best solution features 6718 gates for the MALU and control unit (data memory not included) in 0.13 μm CMOS technology over the field ${\mathbb{F}_{2^{131}}}$, which provides a reasonable level of security for the time being. In this case the consumed power is less than 30 μW when operating frequency is 500 kHz.
TL;DR: A novel class of arithmetic architectures for Galois fields GF(2/sup k/) is described, capable of exploring the time-space trade-off paradigm in a flexible manner and two different approaches to squaring are provided.
Abstract: The article describes a novel class of arithmetic architectures for Galois fields GF(2/sup k/). The main applications of the architecture are public key systems which are based on the discrete logarithm problem for elliptic curves. The architectures use a representation of the field GF(2/sup k/) as GF((2/sup n/)/sup m/), where k=n/spl middot/m. The approach explores bit parallel arithmetic in the subfield GF(2/sup n/) and serial processing for the extension field arithmetic. This mixed parallel-serial (hybrid) approach can lead to fast implementations. As the core module, a hybrid multiplier is introduced and several optimizations are discussed. We provide two different approaches to squaring. We develop exact expressions for the complexity of parallel squarers in composite fields, which can have a surprisingly low complexity. The hybrid architectures are capable of exploring the time-space trade-off paradigm in a flexible manner. In particular, the number of clock cycles for one field multiplication, which is the atomic operation in most public key schemes, can be reduced by a factor of n compared to other known realizations. The acceleration is achieved at the cost of an increased computational complexity. We describe a proof-of-concept implementation of an ASIC for multiplication and squaring in GF((2/sup n/)/sup m/), m variable.
TL;DR: Various improvement techniques for field arithmetic in GF(p n )(p a prime) are presented, in particular, fast field multiplication and inversion algorithms, and implementation results on Pentium II and Alpha 21164 microprocessors are provided.
Abstract: Elliptic curve cryptosystems have attracted much attention in recent years and one of major interests in ECC is to develop fast algorithms for field/elliptic curve arithmetic. In this paper we present various improvement techniques for field arithmetic in GF(p n )(p a prime), in particular, fast field multiplication and inversion algorithms, and provide our implementation results on Pentium II and Alpha 21164 microprocessors.
TL;DR: A hardware solution for finite field arithmetic with application in asymmetric cryptography, ready for future cryptographic bitlengths and allow operation at high clock frequency on moderate hardware resources is presented.
Abstract: In this article we present a hardware solution for finite field arithmetic with application in asymmetric cryptography. It supports calculation in GF(p) as well as in GF(2m). Addition and multiplication with interleaved modular reduction are the main functionality of the unit. Additional functions--like shift operations and integer incrementation--allow the calculation of the multiplicative inverse and covering all operations required to implement Elliptic Curve Cryptography. Redundant number representation and efficient modular reduction make it ready for future cryptographic bitlengths and allow operation at high clock frequency on moderate hardware resources.