TL;DR: This article discusses the impact of the differences in the material properties and integration process on reliability of copper interconnects, including dielectric breakdown, temperature cycle, and stability within packages.
TL;DR: In this paper, the effect of hydrogen annealing on the surface roughness of germanium (Ge) layers grown by chemical vapor deposition on silicon using atomic force microscopy and cross-sectional high resolution scanning electron microscopy (HR-SEM).
Abstract: We have studied the effect of hydrogen annealing on the surface roughness of germanium (Ge) layers grown by chemical vapor deposition on silicon using atomic force microscopy and cross-sectional high resolution scanning electron microscopy (HR-SEM). Our results indicate a strong reduction of roughness that approaches 90% at 825°C. The smoother Ge surface allowed for the fabrication of metal-oxide-semiconductor capacitors using germanium oxynitride (GeOxNy) as the gate dielectric. Electrical quality was studied using high frequency capacitance–voltage characteristic of epi-Ge showing negligible hysteresis. We discuss the results in terms of Ge–H cluster formation, which lowers the diffusion barrier, allowing for higher diffusivity and surface mobility. The temperature dependence shows tapering off for temperatures exceeding 800°C, indicating a barrier reduction of ∼92meV.
TL;DR: In this paper, a diffusion barrier on low aspect features of an integrated circuit include at least three operations: the first operation deposits barrier material and simultaneously etches a portion of an underlying metal at the bottoms of recessed features of the integrated circuit.
Abstract: Methods for forming a diffusion barrier on low aspect features of an integrated circuit include at least three operations. The first operation deposits a barrier material and simultaneously etches a portion of an underlying metal at the bottoms of recessed features of the integrated circuit. The second operation deposits barrier material to provide some minimal coverage over the bottoms of the recessed features. The third operation deposits a metal conductive layer. Controlled etching is used to selectively remove barrier material from the bottom of the recessed features, either completely or partially, thus reducing the resistance of subsequently formed metal interconnects.
TL;DR: In this paper, the authors demonstrate an organic nonvolatile memory device by controlling the Cu-ion (Cu+) concentration within the organic layer, which can be precisely switched by applying external biases.
Abstract: Copper (Cu) migration into semiconductor materials like silicon is a well-known and troublesome phenomenon often causing adverse effect on devices. Generally a diffusion barrier layer is added to prevent Cu metallization. We demonstrate an organic nonvolatile memory device by controlling the Cu-ion (Cu+) concentration within the organic layer. When the Cu+ concentration is high enough, the device exhibits a high conductive state due to the metallization effect. When the Cu+ concentration is low, the device displays a low conductance state. These two states differ in their electrical conductivity by more than seven orders of magnitude and can be precisely switched by controlling the Cu+ concentration through the application of external biases. The retention time of both states can be more than several months, and the device is promising for flash memory application. Discussions about the device operation mechanism are provided.
TL;DR: The formation of the intermetallic diffusion barrier layer by the controlled in-situ oxidation method for Pd and Pd/alloy porous stainless steel composite membranes was investigated in this paper.
Abstract: The formation of the intermetallic diffusion barrier layer by the controlled in-situ oxidation method for Pd and Pd/alloy porous stainless steel composite membranes was investigated. SEM and EDS results showed the existence of an oxide layer as the intermetallic diffusion barrier for oxidation temperatures higher than 600 °C. At oxidation temperatures lower than 600 °C, there might still be an oxide layer at the membrane-substrate interface although it was too thin to be detected by SEM and EDS. The alloy formation study showed that annealing at 500 °C under helium atmosphere did not produce alloys with uniform compositions either for Pd/Ag or Pd/Cu membranes. However, annealing at 600 °C gave a uniform Pd/Cu-porous stainless steel (PSS) composite membrane, with no detectable presence of elements from the PSS substrate, further demonstrating the oxide layer as an effective intermetallic diffusion barrier.
TL;DR: In this article, a systematic study was undertaken with samples of Ti-6Al-4V nitrided in a unusual RF plasma equipment using a N 2 -H 2 gas mixture under 10Pa.
TL;DR: In this article, a dielectric region is protected by a multi-layer insulation structure including a first relatively thin insulation layer, e.g., an aluminum oxide or other metal oxide layer, and a second, thicker insulating layer.
Abstract: A dielectric region, such as a ferroelectric dielectric region of an integrated circuit capacitor, is protected by a multi-layer insulation structure including a first relatively thin insulation layer, e.g.,. an aluminum oxide or other metal oxide layer, and a second, thicker insulating layer, e.g., a second aluminum oxide or other metal oxide layer. Before formation of the second insulation layer, the first insulation layer and the dielectric preferably annealed, which can increase a remnant polarization of the dielectric region. The first insulation layer can serve as a hydrogen diffusion barrier during formation of the second insulation layer and other overlying structures. In this manner, degradation of the dielectric can be reduced. Devices and fabrication methods are discussed.
TL;DR: In this article, a semiconductor transistor structure with increased mobility in the channel zone and a method of its fabrication are described, where a substrate having a first dopant and a diffusion barrier layer having a second dopant is formed on the semiconductor substrate to suppress outdiffusion of the first one.
Abstract: A semiconductor transistor structure with increased mobility in the channel zone and a method of its fabrication are described. A semiconductor substrate having a first dopant is formed. A diffusion barrier layer having a second dopant is formed on the semiconductor substrate to suppress outdiffusion of the first dopant. Next, a semiconductor layer having substantially low dopant concentration relative to the first layer is epitaxially grown on the diffusion barrier layer. The semiconductor layer defines a channel in the semiconductor transistor structure. The low dopant concentration in the semiconductor layer increases the mobility of the carriers in the channel of the semiconductor transistor structure. A gate electrode and a gate dielectric are formed on the semiconductor layer with the low dopant concentration.
TL;DR: In this paper, a structure and method for a metal replacement gate of a high performance device is provided. Butler et al. proposed a metal gate structure on an etch stop layer (250) provided on a semiconductor substrate.
Abstract: A structure and method for a metal replacement gate of a high performance device is provided. A sacrificial gate structure (260) is first formed on an etch stop layer (250) provided on a semiconductor substrate (240). A pair of spacers (400) is provided on sidewalls of the sacrificial gate structure (300). The sacrificial gate structure (300) is then removed, forming an opening (600). Subsequently, a metal gate (1000) including an first layer (700) of metal such as tungsten, a diffusion barrier (800) such as titanium nitride, and a second layer (900) of metal such as tungsten is formed in the opening (600) between the spacers (400).
TL;DR: In this article, sputtered HfNi and HfPt were evaluated as potential high-temperature diffusion barrier layers beneath NiAl or NiPtAl coatings, and a Ni 3 Hf-type layer formed during aluminizing of Ni-Hf thin films, and appeared to result in reduced β-NiAl depletion during oxidation testing at 1150 °C.
Abstract: An effective diffusion barrier between the superalloy and aluminide coating would reduce coating degradation by lowering the rate of Al loss to the substrate by interdiffusion, and by inhibiting diffusion of substrate elements (such as Cr, Re, Ta, W) into the coating, which degrade its corrosion and oxidation resistance. In this preliminary study, sputtered Hf–Ni and Hf–Pt were evaluated as potential high-temperature diffusion barrier layers beneath NiAl or NiPtAl coatings. A Ni 3 Hf-type layer formed during aluminizing of Ni–Hf thin films, and appeared to result in reduced β-NiAl depletion during oxidation testing at 1150 °C. Some Hf-containing simple aluminide coatings also showed very good oxidation resistance. However, the Ni–Hf phase disrupted coating microstructure and displayed limited high-temperature stability. Heat treatment of Hf and Pt thin films formed a compound similar to HfPt 3 -type, which subsequently dissolved during aluminizing.
TL;DR: In this paper, a low temperature wafer-level encapsulation technique to hermetically seal adhesive-bonded microsystem structures by cladding the adhesive with an additional diffusion barrier is presented.
Abstract: In this paper, we present a low temperature wafer-level encapsulation technique to hermetically seal adhesive bonded microsystem structures by cladding the adhesive with an additional diffusion barrier. Two wafers containing cavities for MEMS devices were bonded together using benzocyclobutene (BCB). The devices were sealed by a combined dicing and self-aligning etching technique and by finally coating the structures with evaporated gold or PECVD silicon nitride. The sealing layer was inspected visually by SEM and helium leak tests were carried out. Devices sealed with silicon nitride and with known damage of the sealing layer showed a helium leak rate of about 7–14 times higher than the background level. Devices of the same size without damage in the sealing layer had a leak rate of only 1.5 times higher than the background level. Experiments with evaporated gold as cladding layer revealed leaking cracks in the film even up to a gold thickness of 5 μm. The sealing technique with silicon nitride shows a significant improvement of the hermeticity properties of adhesive bonded cavities, making this bonding technique suitable for applications with certain demands on gas-tightness.
TL;DR: In this article, a process for enhancing the adhesion of directly plateable materials to an underlying dielectric, so as to withstand damascene processing, is demonstrated, using diffusion barriers onto which copper can be deposited, which facilitates conventional electrolytic processing.
Abstract: A process for enhancing the adhesion of directly plateable materials to an underlying dielectric is demonstrated, so as to withstand damascene processing. Using diffusion barriers onto which copper can be deposited facilitates conventional electrolytic processing. An ultra-thin adhesion layer is applied to a degassed, pre-cleaned substrate. The degassed and pre-cleaned substrate is exposed to a precursor gas containing the adhesion layer, optionally deposited by a plasma-assisted CVD process, resulting in the deposition of an adhesion layer inside the exposed feature. The treated wafer is then coated with a diffusion barrier material, such as ruthenium, so that the adhesion layer reacts with incoming diffusion barrier atoms. The adhesion layer may be selectively bias-sputter etched prior to the deposition of the diffusion barrier layer. A copper layer is then deposited on the diffusion barrier layer.
TL;DR: In this article, a first barrier layer (124) is deposited over a dielectric (104) including in a trench (108) and via (106), and a re-sputtering process is then performed to remove said first barrier layers from a bottom of the via without substantially reducing a thickness of the barrier layers at the bottom of a trench.
Abstract: A method for fabricating a barrier layer. A first barrier layer (124) is deposited over a dielectric (104) including in a trench (108) and via (106). A re-sputtering process is then performed to remove said first barrier layer (124) from a bottom of the via (106) without substantially reducing a thickness of said first barrier layer (124) at a bottom of the trench (108) using an intermediate DC target power. A second barrier layer (126) is then deposited.
TL;DR: In this paper, a hydrogen sensor using electrical and optical switching properties of Pd-based thin films is presented, which is well known for its ability to absorb high amounts of hydrogen due to palladium hydride formation.
Abstract: We report about a hydrogen sensor using electrical and optical switching properties of Pd-based thin films. Palladium is well known for its ability to absorb high amounts of hydrogen due to palladium hydride formation. Series of different thickness Pd films (10–70 nm) were deposited on glass substrates by dc plasma sputtering. A CaF2 buffer layer was deposited between the glass support and the Pd-film in order to reduce the internal stresses and improve the mechanical stability of the sensor. A Pt diffusion barrier was deposited on the active film to prevent sensor poisoning. Pd-polymer nano-composite films were deposited by co-sputtering of Pd and polymer targets. The morphology and composition of the films were analysed by SEM, TEM and EDS. Electrical resistance and differential transmittance were measured depending on different concentrations and flows of the testing gas (0.5–10.0% hydrogen in nitrogen). A proportional dependence of the measured signal on the hydrogen concentration was found. The influence of different structures and morphologies on the switching properties was investigated.
TL;DR: In this article, the process development and characterization of titanium nitride (TiN) as a diffusion barrier for silver (Ag) metallizations were discussed, with sheet resistance measurement, X-ray diffraction (XRD), focused ion beam-scanning electron microscopy (FIB-SEM), atomic force microscope (AFM) and Xray photoelectron spectroscopy (XPS) compared to as-deposited multilayers.
TL;DR: The film properties of WNxCy films deposited by atomic layer deposition (ALD) using WF6, N H 3, and triethylboron source gases were characterized as diffusion barrier for Cu metallization.
Abstract: The film properties of WNxCy films deposited by atomic layer deposition (ALD) using WF6 ,N H 3, and triethylboron source gases were characterized as diffusion barrier for Cu metallization. It is noted that the as-deposited film shows an extremely low resistivity of about 350 µΩ-cm with a film density of 15.37 g/cm 3 . The film composition measured from Rutherford backscattering spectrometry shows W, C, and N of approximately 48, 32, and 20 at.%, respectively. Transmission electron microscopy analyses show that the as-deposited film is composed of face-centered-cubic phase with a lattice parameter similar to both β-WC1-x and βW2N with an equiaxed microstructure. The barrier property of this ALD-WNxCy film at a nominal thickness of 12 nm deposited between Cu and Si fails only after annealing at 700 o Cf or 30 minutes while the sputter-deposited Ta (12 nm) and ALD-TiN (20 nm) fail at 650 and 600 o C, respectively. It is thought that the superior diffusion barrier performance of ALD-WNxCyfilm is the consequence of both nanocrystalline equiaxed grain structure and the formation of high density film.
TL;DR: In this paper, the authors have deposited tantalum from sub-monolayer coverage up to about 10nm thick films by DC magnetron sputtering onto silicon and silicon dioxide substrates in a UHV preparation chamber attached to the XPS chamber since Ta oxidizes even at low oxygen partial pressure.
TL;DR: In this article, a β-NiAl coating with or without a Re-base alloy layer was formed on a Nb-5Mo-15W alloy, which was oxidized isothermally in air at 1373 and 1473 K.
Abstract: A β-NiAl coating with or without a Re-base alloy layer was formed on a Nb–5Mo–15W alloy. The coated alloys were oxidized isothermally in air at 1373 and 1473 K. Electroplating of a high (more than 70at.%)-Re–Ni film, Cr-pack cementation, Ni plating, and then Al-pack cementation, in this sequence, formed a coating structure with Re-base alloy and β-NiAl layers. The Re-base alloy layers were comprised of an outer σ-phase in the Re–Cr(Ni) system and an inner χ-phase in the Re–Nb(Cr) system. It was found that reaction between the β-NiAl and the alloy substrate was significantly suppressed when the Re-base alloy layers were present. The Re-base σ and χ phases were found to be good candidates for a diffusion barrier against inward-Al diffusion because they have very low solubilities for Al.
TL;DR: In this article, a method of forming a copper interconnect in a dual damascene scheme is described, where a diffusion barrier layer and seed layer are sequentially formed on the sidewalls and bottoms of a trench and via in a dielectric layer, a first copper layer is deposited by a first ECP process at a 10 mA/cm 2 current density to fill the via and part of the trench.
Abstract: A method of forming a copper interconnect in a dual damascene scheme is described. After a diffusion barrier layer and seed layer are sequentially formed on the sidewalls and bottoms of a trench and via in a dielectric layer, a first copper layer is deposited by a first ECP process at a 10 mA/cm 2 current density to fill the via and part of the trench. A first anneal step is performed to remove carbon impurities and optionally includes a H 2 plasma treatment. A second ECP process with a first deposition step at a 40 mA/cm 2 current density and second deposition step at a 60 mA/cm 2 current density is used to deposit a second copper layer that overfills the trench. After a second anneal step, a CMP process planarizes the copper layers. Fewer copper defects, reduced S, Cl, and C impurities, and improved Rc performance are achieved by this method.
TL;DR: In this article, a method for forming a thin film and a method to fabricating a liquid crystal display device using the same process is described, which provides a process that is simplified and uniform thin film characteristics can be obtained.
Abstract: A method for forming a thin film and a method for fabricating a liquid crystal display device using the same are provided. The method provides a process that is simplified. Uniform thin film characteristics can be obtained. The method for forming a thin film includes the steps of forming a diffusion barrier film on a substrate, forming a metal seed layer on the diffusion barrier film, removing a metal oxide film formed on a surface of the metal seed layer using an electric plating method, and depositing metal on the metal seed layer in which the metal oxide film is removed.
TL;DR: In this article, a thermal barrier and an environmental barrier are used to protect silicon-based turbine engine components from damaging cations from the diffusion barrier to the substrate, and an inner layer of Si2ON2 is added to prevent the migration of damaging cation from the barrier to a substrate of silicon nitride or silicon carbide.
Abstract: A protective barrier coating system including a diffusion barrier coating and an oxidation barrier coating for use in protecting silicon-based ceramic turbine engine components. The barrier coating system includes a thermal barrier coating of stabilized zirconia and an environmental barrier coating of an alloyed tantalum oxideor a mixture of scandium disilicate, scandium monosilicate and scandium oxide. The oxidation barrier coating includes a layer of scandium disilicate for med on a substrate of silicon nitride or silicon carbide to be protected. The oxidation barrier coating may also include an inner layer of Si2ON2 between the diffusion barrier and the scandium disilicate layer. The diffusion barrier layer can consist of essentially pure Si3N4 and prevents the migration of damaging cations from the protective layers to the substrate.
TL;DR: In this paper, a very thin (<10 nm) low resistivity (350 μΩ cm) cubic TaN Cu diffusion barrier was deposited by PE-ALD from TaCl5 and a plasma of both hydrogen and nitrogen.
Abstract: Plasma-enhanced atomic layer deposition (PE–ALD) is a promising technique to produce high quality metal and nitride thin films at low growth temperature. In this study, very thin (<10 nm) low resistivity (350 μΩ cm) cubic TaN Cu diffusion barrier were deposited by PE–ALD from TaCl5 and a plasma of both hydrogen and nitrogen. The physical properties of TaN thin films including microstructure, conformality, roughness, and thermal stability were investigated by various analytical techniques including x-ray diffraction, medium energy ion scattering, and transmission electron microscopy. The Cu diffusion barrier properties of PE–ALD TaN thin films were studied using synchrotron x-ray diffraction, optical scattering, and sheet resistance measurements during thermal annealing of the test structures. The barrier failure temperatures were obtained as a function of film thickness and compared with those of PE–ALD Ta, physical vapor deposition (PVD) Ta, and PVD TaN. A diffusion kinetics analysis showed that the micr...
TL;DR: In this paper, the advantages of utilizing these low-k multilayered dielectric diffusion barrier layer is a gain in chip performance through a reduction in capacitance between conducting metal features and an increase in reliability.
Abstract: Structures having low-k multilayered dielectric diffusion barrier layer having at least one low-k sublayer and at least one air barrier sublayer are described herein. The multilayered dielectric diffusion barrier layer are diffusion barriers to metal and barriers to air permeation. Methods and compositions relating to the generation of the structures are also described. The advantages of utilizing these low-k multilayered dielectric diffusion barrier layer is a gain in chip performance through a reduction in capacitance between conducting metal features and an increase in reliability as the multilayered dielectric diffusion barrier layer are impermeable to air and prevent metal diffusion.
TL;DR: In this article, a 50 nm thick amorphous Ta-W-N diffusion barrier layer between Cu and Si substrate was deposited by reactive sputtering and failed to suppress penetration of Cu into the Si substrate upon annealing at 700 °C.
TL;DR: In this paper, the authors used sequential deposition to introduce a monolayer of Al atoms between two TiN films, and showed that with Al interlayer, Cu diffusion through the barrier occurred at 500 °C and that is 100 °C higher than TiN film without interlayer.
TL;DR: In this article, the diffusion barrier performance of Mo and MoxN films deposited by direct current sputtering between the Cu and Si substrates was investigated, and the results of scanning electron microscopy indicated the morphological evolution of the sample surfaces after annealing at different temperatures.
TL;DR: In this paper, a method and structure for a MIM capacitor is presented, including an electronic device, comprising an interievel dielectric layer formed on a semiconductor substrate, a copper bottom electrode formed in the interievectors, atop surface of bottom electrode co-planer with a top surface of the interiegvelayer layer, a conductive diffusion barrier in direct contact with the top surfaces of the bottom electrode, and a top electrode in direct contacts with the MIM dielectrics.
Abstract: A method and structure for a MIM capacitor, the structure including: an electronic device, comprising: an interievel dielectric layer formed on a semiconductor substrate; a copper bottom electrode formed in the interievel dielectric layer, atop surface of the bottom electrode co-planer with a top surface of the interievel dielectric layer; a conductive diffusion barrier in direct contact with the top surface of the bottom electrode; a MIM dielectric in direct contact with a top surface of the conductive diffusion barrier; and a top electrode in direct contact with a top surface of the MIM dielectric. The conductive diffusion barrier may be recessed into the copper bottom electrode or an additional recessed conductive diffusion barrier provided. Compatible resistor and alignment mark structures are also disclosed.
TL;DR: In this paper, electrical characterization of metal-oxide-semiconductor capacitors after bias temperature stress at different temperatures, using capacitance-vs-voltage, leakage current-vs.-voltage and triangular voltage-sweep (TVS) measurements, is presented.
TL;DR: In this paper, the diffusion barrier characteristics of the PAALD-TaN and thermal ALD-TaNs were compared and the results showed that the latter had cubic and amorphous phase, respectively.
Abstract: PAALD (plasma assisted atomic layer deposition)-TaN thin films derived from a precursor, tert-amylimidotrisdim-ethylamidotantalum (TAIMATA), for the diffusion barrier in Cu interconnects were developed and compared to the thermal ALD-TaN. The deposition rate of the PAALD-TaN process was around /spl sim/0.9 /spl Aring//cycle at 250 /spl deg/C. The resistivity of TaN film by the PAALD was /spl sim/ 366 /spl mu/ohm-cm, while the resistivity by the thermal ALD was not measurable. The PAALD-TaN and thermal ALD-TaN film appeared to have cubic and amorphous phase, respectively. In Cu metallization, as TaN thickness increased, via resistance with thermal ALD-TaN increased dramatically, but via resistance with PAALD-TaN was almost constant and much lower than that with thermal ALD-TaN. Using PAALD-TaN, the diffusion barrier characteristics was also improved in comparison to thermal ALD-TaN.
TL;DR: In this article, conformal copper films were deposited onto various copper diffusion barrier layers with catalytic hydrogen reduction of copper(II) hexafluoroacetylacetonate, Cu(hfa)2, in supercritical CO2.
Abstract: Conformal copper films were deposited onto various copper diffusion barrier layers with catalytic hydrogen reduction of copper(II) hexafluoroacetylacetonate, Cu(hfa)2, in supercritical CO2. In the ...