Abstract: A method of forming a titanium silicide nitride (TiSiN) layer on a substrate id described. The titanium silicide nitride (TiSiN) layer is formed by providing a substrate to a process chamber and treating the substrate with a silicon-containing gas. A titanium nitride layer is formed on the treated substrate and exposed to a silicon-containing gas. The titanium nitride (TiN) layer reacts with the silicon-containing gas to form the titanium silicide nitride (TiSiN) layer. The formation of the titanium silicide nitride (TiSiN) layer is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the titanium silicide nitride (TiSiN) layer may be used as a diffusion barrier for a tungsten (W) metallization process.

Abstract: An object of the invention is to produce metal nitride thin layers having low resistivity by means of the ALD method. In the method according to the invention, compounds that are bbetter reducing properties than the known ammonia and 1,1-dimethyl hydrazine are used as nitrogen source. Suitable compounds for that purpose are those in which a hydrocarbon group bound to nitrogen, when dissociating in a homolytic manner, generates a radical that serves as a reducing agent and reacts further to generate atomic hydrogen. The nitride thin layers produced according to the invention are especially suitable for use as diffusion barrier layers in integrated circuits.

Abstract: Ta thin films were grown on Si(001) and polycrystalline Si substrates by plasma-enhanced atomic-layer deposition (PE-ALD) using TaCl5 and atomic hydrogen as precursors. The grown films have resistivity of 150–180 μm cm with a small Cl concentration between 0.5 and 2 at. %. The diffusion barrier properties were investigated using bilayer structures consisting of 200 nm Cu deposited by sputtering on ALD Ta films with various thicknesses. Three in situ analysis techniques consisting of x-ray diffraction, elastic light scattering, and resistance analysis were used to determine the diffusion barrier failure temperature of Ta films. The barriers were annealed at a temperature ramp rate of 3 °C/s from 100 to 1000 °C in forming gas. For this method using x-ray diffraction, the barrier failure temperatures were determined by monitoring the disappearance of the Cu(111) x-ray diffraction peak and appearance of Cu silicide diffraction peaks. At the diffusion barrier failure temperature, elastic light scattering indic...

Abstract: An ultra-thin gate oxide layer of hafnium oxide (HfO2) and a method of formation are disclosed. The ultra-thin gate oxide layer of hafnium oxide (HfO2) is formed by a two-step process. A thin hafnium (Hf) film is first formed by thermal evaporation at a low substrate temperature, after which the thin hafnium film is radically oxidized using a krypton/oxygen (Kr/O2) high-density plasma to form the ultra-thin gate oxide layer of hafnium oxide (HfO2). The ultra-thin gate oxide layer of hafnium oxide (HfO2) formed by the method of the present invention is thermally stable in contact with silicon and is resistive to impurity diffusion at the HfO2/silicon interface. The formation of the ultra-thin gate oxide layer of hafnium oxide (HfO2) eliminates the need for a diffusion barrier layer, allows thickness uniformity of the field oxide on the isolation regions and, more importantly, preserves the atomically smooth surface of the silicon substrate.

Abstract: In recent years, copper wiring has emerged as a promising substitute for the aluminum wiring in integrated circuits, because copper offers lower electrical resistance and better reliability at smaller dimensions than aluminum. However, use of copper typically requires forming a diffusion barrier to prevent contamination of other parts of an integrated circuit and forming a seed layer to facilitate copper plating steps. Unfortunately, conventional methods of forming the diffusion barriers and seed layers require use of separate wafer-processing chambers, giving rise to transport delays and the introduction of defect-causing particles. Accordingly, the inventors devised unique wafer-processing chambers and methods of forming barrier and seed layers. One embodiment of the wafer-processing chamber includes equipment for physical vapor deposition and equipment for chemical vapor deposition to facilitate formation of diffusion barriers and seed layers within one chamber, thereby promoting fabrication efficiency and reducing defects.

Abstract: We have examined the stability of Al2O3/Si heterostructures and show that significant Al diffusion occurs into the silicon for temperatures of 1000 °C and more. This may be caused by dissociation of small quantities of Al2O3 and subsequent dissolution of the Al into the silicon. Such diffusion may be reduced, though not eliminated via an interfacial silicon oxynitride diffusion barrier. Using long channel metal gate Al2O3/Si n field effect transistor data, we show that anneals at 1000 °C result in a degradation of the electron mobility by a factor of 2.

Abstract: A method for use in the fabrication of integrated circuits includes providing a substrate assembly having a surface. A diffusion barrier layer is formed over at least a portion of the surface. The diffusion barrier layer is formed of RuSi x O y , where x and y are in the range of about 0.01 to about 10. The barrier layer may be formed by depositing RuSi x O y by chemical vapor deposition, atomic layer deposition, or physical vapor deposition or the barrier layer may be formed by forming a layer of ruthenium or ruthenium oxide over a silicon-containing region and performing an anneal to form RuSi x O y from the layer of ruthenium and silicon from the adjacent silicon-containing region. Capacitor electrodes, interconnects or other structures may be formed with such a diffusion barrier layer. Semiconductor structures and devices can be formed to include diffusion barrier layers formed of RuSi x O y .

Abstract: A method of forming (and apparatus for forming) tantalum silicide layers (including tantalum silicon nitride layers), which are typically useful as diffusion barrier layers, on a substrate by using a vapor deposition process with a tantalum halide precursor compound, a silicon precursor compound, and an optional nitrogen precursor compound.

Abstract: Electrical and material properties of Cu(0.02 wt % Ti) alloy and pure Cu films deposited on SiO2/Si are explored. Current–voltage measurement using metal–oxide–semiconductor (MOS) capacitor structure reveals low leakage current (10−8 A/cm2) for capacitors with as-deposited Cu(0.02 wt % Ti) and pure Cu metal gates. However, after annealing at 700 °C in a vacuum, leakage current of MOS capacitors using a pure Cu gate shows a dramatic rise of leakage current at a low electrical field, while the leakage current of capacitors with Cu(0.02 wt % Ti) gate stays at ∼10−7 A/cm2. Concurrently, the resistivity of annealed Cu(0.02 wt % Ti) is reduced to 2.5 μΩ cm, which is only slightly greater than the resistivity of as-sputtered pure Cu films. X-ray photoelectron spectroscopy indicates that a TiOx layer has formed at the Cu(0.02 wt % Ti)/SiO2 interface after annealing and Auger electron spectrometry depth profiles show less interdiffusion at the Cu(0.02 wt % Ti)/SiO2 interface than the Cu/SiO2 interface. The correla...

Abstract: Electroless NiWP and NiReP films were investigated with the aim of application to barrier and capping layers in interconnect technology. These alloys containing a refractory metal with a high melting point were expected to have the ability to avoid diffusion of Cu into the interlevel dielectric. The composition and resistivity of these films were investigated first in order to know the relation between the composition and its thermal stability. The thermal stability was investigated by measuring the sheet resistance and the cross-sectional observation with field emission scanning electron microscope. Additionally, an electroless Ni alloy deposition on the SiO 2 layer without a sputtered seed layer was also examined by utilizing a self-assembled monolayer (SAM) as an adhesion and catalytic layer. Since an alkaline solution damaged the SiO 2 surface, a two-step process, which consists of a nucleation step performed in an acid electroless deposition bath and a barrier layer formation step carried out in an alkaline bath, is employed in order to fabricate a consistently uniform barrier film on the SAM/SiO 2 surface. It was found that the NiReP films formed on SAM/SiO 2 surfaces were stable up to 400°C, and are feasible for the barrier layer for the Cu interconnect technology.

Abstract: A method of forming a diffusion barrier layer in a semiconductor device is disclosed. A high-k gate dielectric layer is formed over a substrate. A silicon nitride barrier layer is subsequently formed over the high-k gate dielectric layer by reacting tetrachlorosilane with ammonia through a chemical vapor deposition process. The silicon nitride barrier layer substantially blocks diffusion of impurities from an ensuing overlying gate layer. A semiconductor device comprising the silicon nitride barrier layer, and a method of fabricating such a semiconductor device are also disclosed.

Abstract: A sealing dielectric layer is applied between a porous dielectric layer and a metal diffusion barrier layer. The sealing dielectric layer closes the pores on the surface and sidewalls of the porous dielectric layer. This invention allows the use of a thin metal diffusion barrier layer without creating pinholes in the metal diffusion barrier layer. The sealing dielectric layer is a CVD deposited film having the composition SixCy:Hz.

Abstract: An advanced back-end-of-line (BEOL) metallization structure is disclosed. The structure includes a diffusion barrier or cap layer having a low dielectric constant (low-k), where the cap layer is formed of silicon nitride by a plasma-enhanced chemical vapor deposition (PE CVD) process. The metallization structure also includes an inter-layer dielectric (ILD) formed of a carbon-containing dielectric material having a dielectric constant of less than about 4, and a continuous hardmask layer overlying the ILD which is preferably formed of silicon nitride or silicon carbide. A method for forming the BEOL metallization structure is also disclosed. The method includes a pre-clean or pre-activation step to improve the adhesion of the cap layer to the underlying copper conductors. The pre-clean or pre-activation step comprises exposing the copper surface to a reducing plasma including hydrogen, ammonia, nitrogen and/or noble gases.

Abstract: A new capping multilayer structure for EUV-reflective Mo/Si multilayers consists of two layers: A top layer that protects the multilayer structure from the environment and a bottom layer that acts as a diffusion barrier between the top layer and the structure beneath. One embodiment combines a first layer of Ru with a second layer of B 4 C. Another embodiment combines a first layer of Ru with a second layer of Mo. These embodiments have the additional advantage that the reflectivity is also enhanced. Ru has the best oxidation resistance of all materials investigated so far. B 4 C is an excellent barrier against silicide formation while the silicide layer formed at the Si boundary is well controlled.

Abstract: A metal capping barrier deposited by an electroless CoWB (cobalt tungsten boron) alloy plating method on damascene copper interconnects has been investigated. The metal capping barrier structure is one solution to prevent the decrease of coupling capacity associated with SiN or SiC capping barriers. In this paper, we propose a direct electroless deposition of Co alloy on copper surfaces, using dimethyl amine borane (DMAB) as a reducing agent, without a palladium catalyst.

Abstract: The reaction mechanisms and related microstructures in the Si/TaC/Cu metallization system have been studied experimentally and theoretically by utilizing ternary Si–Ta–C and Ta–C–Cu phase diagrams as well as activity diagrams calculated at 800 °C. With the help of sheet resistance measurements, Rutherford backscattering spectrometry, x-ray diffraction, scanning electron microscopy, and transmission electron microscopy, the metallization structure with the 70 nm thick TaC barrier layer was observed to fail completely at temperatures above 725 °C because of the formation of large Cu3Si protrusions. However, the formation of amorphous Ta layer containing significant amounts of carbon and oxygen was already observed at the TaC/Cu interface at 600 °C. This layer also constituted an additional barrier layer for Cu diffusion, which occurred only after the crystallization of the amorphous layer. The formation of Ta2O5 was observed at 725 °C with x-ray diffraction, indicating that the oxygen rich amorphous layer h...

Abstract: The invention is directed to a fabrication method of copper interconnects using dual damascene processing. Using silicon to provide an active surface, palladium can be selectively deposited on silicon by an immersion plating technique. After palladium deposition (about 1000 Å thick), either a layer of cobalt phosphorus or alloy cobalt/nickel phosphorus or nickel phosphorus is deposited on the palladium layer using an electroless plating technique. This cobalt phosphorus, cobalt/nickel phosphorus alloy, or nickel phosphorus layer serves as a copper diffusion barrier. The via and trenches are filled with copper by an electroless copper plating method and CMP is used to remove the excess copper and planarize-/-polish the copper/dielectric surface.

Abstract: Methods and apparatus for forming word line stacks comprise forming a thin nitride layer coupled between a bottom silicon layer and a conductor layer. In a further embodiment, a diffusion barrier layer is coupled between the thin nitride layer and the bottom silicon layer. The thin nitride layer is formed by annealing a silicon oxide film in a nitrogen-containing ambient.

Abstract: A photocatalytically-assisted self-cleaning (“PASC”) coating on a substrate enables the substrate to shed dirt simply by rinsing with water. A method of making a PASC coating includes depositing by chemical vapor deposition an alkali metal diffusion barrier layer on a substrate; sputtering an ultraviolet radiation activated layer on the alkali metal diffusion barrier layer at a temperature of 100° C. or less; and, without heating above 100° C., exposing the ultraviolet radiation activated layer to ultraviolet radiation to form the self-cleaning substrate. The sputter deposition of the ultraviolet radiation activated layer on the chemical vapor deposited alkali metal diffusion barrier layer allows the ultraviolet radiation activated layer to be activated upon exposure to UV radiation without first having been heated during and/or after deposition. The elimination of this step of heating the ultraviolet radiation activated layer results in significant process simplification and cost reduction.

Abstract: Methods and an apparatus of forming a titanium silicon nitride (TiSiN) layer are disclosed. The titanium silicon nitride (TiSiN) layer may be formed using a cyclical deposition process by alternately adsorbing a titanium-containing precursor, a silicon-containing gas and a nitrogen-containing gas on a substrate. The titanium-containing precursor, the silicon-containing gas and the nitrogen-containing gas react to form the titanium silicon nitride (TiSiN) layer on the substrate. The formation of the titanium silicon nitride (TiSiN) layer is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, a titanium silicon nitride (TiSiN) layer may be used as a diffusion barrier for a copper metallization process.

Abstract: Recent applications of organic low-k dielectrics in microelectronics have stimulated many investigations of metal diffusion in polymers. Here we report results from radiotracer measurements of 110mAg diffusion in trimethylcyclohexane polycarbonate. Serial sectioning was carried out with 190 eV krypton ions in and opposite to the diffusion direction to rule out sputtering artifacts. Ag was found to be strongly immobilized by self aggregation. In contrast to earlier reports, however, trace amounts of Ag were clearly seen to diffuse into the polymer even at room temperature. A chromium film of only one tenth of a monolayer turned out to be an effective diffusion barrier.

Abstract: The invention concerns a method for growing nanotubes or nanofibers on a substrate comprising at least a top layer of a first material, characterized in that it comprises: forming at the surface of the top layer, a barrier film consisting of an alloy of a first material and of a second material, said alloy being stable at a first temperature; forming catalyst blocks made of the second material, at the surface of the alloy film; growing nanotubes or nanofibers at a second temperature lower than said first temperature. The alloy film enables efficient growth of the nanotubes/nanofibers from the catalyst blocks at the surface of said alloy film. In effect, the alloy film constitutes a diffusion barrier with respect to the catalyst on the growth substrate, stable at the catalytic growth temperature of the nanotubes /nanofibers. The invention is applicable in nanotechnology, to field emission devices.

Abstract: A multilayered copper structure has been provided for improving the adhesion of copper to a diffusion barrier material, such as TiN, in an integrated circuit substrate. The multilayered copper structure comprises a thin high-resistive copper layer to provide improved adhesion to the underlying diffusion barrier layer, and a low-resistive copper layer to carry the electrical current with minimum electrical resistance. The invention also provides a method to form the multilayered copper structure.

Abstract: The influence of hydrogen and oxygen on stainless steel implanted by nitrogen low-energy ions is systematically studied. It is shown that hydrogen intervenes moderately in the process only when the oxygen partial pressure in the deposition chamber is relatively high. For very low-oxygen partial pressures, the energetic nitrogen molecules impinging on the substrate sputter the thin oxide layer formed on the substrate. This allows the growing of a rich nitrogen layer beneath the surface, improving the diffusing of the implanted atom deeper in the bulk material. For higher-oxygen partial pressures, the sputtering is ineffective, and an oxide layer partially covers the surface even in the presence of hydrogen. The maximum depth penetration of nitrogen depends on the degree of oxygen coverage, which is fairly well described by a Langmuir absorption isothermal. Hardness depth profiling is consistent with the existence of a diffusion barrier formed by the oxygen absorbed on the surface. In order to understand th...