Abstract: Disclosed is the use of silicon carbide as a barrier layer to prevent the diffusion of metal atoms between adjacent conductors separated by a dielectric material. This advancement allows for the use of low resistivity metals and low dielectric constant dielectric layers in integrated circuits and wiring boards.

Abstract: In this letter, we report on the impact of the suppression of boron diffusion via nitridation of SiO2 on gate oxide integrity and device reliability SiO2 subjected to rapid thermal nitridation in pure nitric oxide (NO) is used to fabricate thin oxynitride gate dielectrics Both n+ polycrystalline silicon (polysilicon) gated n‐MOS (metal–oxide semiconductor) and p+‐polysilicon gated p‐MOS devices were subjected to anneals of different times to study the effect of dopant diffusion on gate oxide integrity As expected, an advanced oxynitride gate dielectric will effectively alleviate the boron‐penetration‐induced flatband voltage instability in p+‐polysilicon gated p‐MOS capacitors due to the superior diffusion barrier properties However, such improvements are observed in conjunction with some degradation of the oxide reliability due to the boron‐blocking/accumulation inside the gate dielectric Results show that even though the oxide quality is slightly degraded for NO‐nitrided SiO2 with p+‐polysilicon ga

Abstract: Disclosed herein is a process for manufacturing a smooth, large grain tungsten nitride film. Under the process, tungsten nitride is deposited by physical vapor deposition in an environment of nitrogen. The nitrogen content of the environment is selected at an operating level wherein primarily tungsten is sputtered with only a light nucleation of tungsten nitride being evenly distributed in the tungsten. A separate grain growth step is subsequently conducted in an environment of nitrogen to grow a film of large grain tungsten nitride. Also disclosed is a stack structure suitable for MOS memory circuits incorporating a lightly nitrided titanium salicide diffusion barrier with a covering of tungsten nitride. The stack structure is formed in accordance with the tungsten nitride film manufacturing process and exhibits high thermal stability, low resistivity, long range agglomeration blocking, and high surface smoothness.

Abstract: A method for fabricating a diffusion barrier metal layer of a semiconductor device for preventing a material of a metal wiring of said semiconductor device from being diffused into a silicon layer under said metal wiring is disclosed including the steps of: exposing the surface of said silicon layer to oxygen plasma, to prevent a silicide from being formed at the interface between said silicon layer and diffusion barrier metal layer; forming a first diffusion barrier metal layer on said silicon layer; implanting oxygen ions into said first diffusion barrier metal layer; and forming a second diffusion barrier metal layer on said first diffusion barrier metal layer.

Abstract: We demonstrate a new coating system for diffusion-barrier applications on polymer substrates like PET and PC. The barrier system is designed as a multilayer coating, which is composed of oxide-like barrier layers embedded in “soft” polymer-like material. This system acts as a highly stable unit, which shows excellent adhesion to the substrate and has been shown to be stable up to 121 °C for 30 min without microcracks. It is deposited by plasma-impulse chemical vapor deposition (PICVD) technology, which employs a pulsed microwave plasma working at very low substrate temperatures and high coating rates. This technology uses the advantages of the CVD process, to coat three-dimensional substrate geometries with high-quality and nearly pinhole-free films. On 1 mm polycarbonate, the permeation of oxygen has been reduced by a factor of 360 to only 0.375 cm3 m−2 bar−1 per day and the water permeability was measured to be as low as 0.23 g m−2 per day. This allows its use in extremely sensitive packaging products, such as medical applications.

Abstract: Copper metallization was applied to quarter-micron CMOS circuits using copper chemical vapor deposition (CVD) and chemical mechanical polishing (CMP). Both the metallization process and the electrical characteristics of CMOS devices/circuits were evaluated. Process-induced metal contamination on both sides of the wafer were quantitatively evaluated and reduced to about of 10/sup 11/ atoms/cm/sup 2/ by using an optimized cleaning sequence. The ability of borophosphosilicate-glass (BPSG) to act as a copper diffusion barrier was discovered and the ability of TiN to do so was also confirmed. Electrical characteristics of n and p MOSFET's with copper interconnections were stable even after annealing at 550/spl deg/C. The leakage current of the pn junction, capacitance-voltage characteristics and time-dependent dielectric breakdown characteristics of the MOS diode indicate that the copper metallization process did not deteriorate the pn junction and the gate oxide. Normal operation of a 53-stage quarter-micron CMOS inverter ring oscillator with copper metallization was successfully achieved.

Abstract: A ferroelectric capacitor device and method of manufacture. A substrate supports a bottom electrode structure, with an adhesion/diffusion barrier layer sandwiched therebetween. The electrode layer includes a metal or metal alloy and an oxide of the metal or alloy. The adhesion/diffusion barrier layer is a similar oxide. Ferroelectric material is sandwiched between a top electrode. The top layer includes a metal or metal alloy and an oxide of the same; the metal or metal alloy may be the same as the bottom electrode but need not be. The metal and metal oxide electrodes may be deposited by known deposition techniques, or the metal may be deposited and the oxide formed by annealing in oxygen ambient environment.

Abstract: The invention provides a semiconductor device having a low threshold voltage and capable of operating at a high speed, and also provides an active matrix display device including such a semiconductor device. The invention also provides a method of producing such a semiconductor device and an active matrix display device. In the invention, a hydrogen supply layer is disposed above semiconductor layers in such a manner that the hydrogen supply layer is apart from the semiconductor layers. A hydrogen diffusion barrier layer for preventing hydrogen from diffusing outward from the hydrogen supply layer is disposed on the hydrogen supply layer in such a manner that the hydrogen diffusion barrier layer is in direct contact with the hydrogen supply layer. The hydrogen diffusion barrier layer is preferably made of a high melting point metal or a compound thereof. The hydrogen supply layer is preferably formed by depositing SiN or amorphous silicon by means of plasma CVD.

Abstract: A process for fabricating a tantalum nitride diffusion barrier for the advanced copper metallization of semiconductor devices is disclosed. The process comprises the steps of first preparing a semiconductor device fabricated over the surface of a silicon substrate having a component with a fabricated contact opening. Before the formation of the copper contact by deposition, the process performs a tantalum nitride low-pressure chemical-vapor-deposition procedure that deposits a layer of tantalum nitride thin film over the surface of the device substrate. After the copper deposition, a photoresist layer is subsequently fabricated for patterning the deposited copper contact and tantalum nitride layers, whereby the deposited thin film of tantalum nitride is patterned to form the thin film as the metallization diffusion barrier for the semiconductor device. The tantalum nitride low-pressure chemical-vapor-deposition procedure includes depositing a layer of tantalum nitride utilizing a metal-organic precursor terbutylimido-tris-diethylamido tantalum (TBTDET) in a cold-wall low pressure reactor with a base pressure of about 10-5 torr. The source of the metal-organic precursor is vaporized at a temperature of about 40° to 50° C. The typical deposition pressure is about 20 mtorr. Tantalum nitride layer of low carbon content and low resistivity may thus be formed in the disclosed chemical-vapor-deposition procedure having effective capability against copper diffusion.

Abstract: A method of stabilizing a halogen-doped silicon oxide film to reduce halogen atoms migrating from said film during subsequent processing steps. A halogen-doped film is deposited over a substrate and then subjected to a degassing step in which the film is briefly heated to a temperature of between about 300° and 550° C. before deposition of a diffusion barrier layer. It is believed that such a heat treatment step removes loosely bonded halogen atoms from the halogen-doped film and thus the treatment is referred to as a degassing step. In a preferred version of this embodiment, the halogen-doped silicon oxide film is an FSG film that is subjected to a degassing treatment for between about 35 and 50 seconds.

Abstract: A capacitor element includes a pervoskite dielectric film and an electrode having excellent electrical contact characteristic and improved adhesion to an underlying surface. In a method for fabricating the electrode, a group IVB or VB refractory metal transition element is deposited on a silicon substrate or a silicon oxide layer. A group VIII near noble metal transition element is then deposited on the group IVB or VB refractory metal layer. The substrate and deposited layers is then subjected to a heat treatment in an ammonia ambient to form a refractory metal nitride layer between the refractory metal and near noble metal layers. In addition, if the refractory metal is deposited on a silicon substrate, a silicide layer is formed between the refractory metal layer and the substrate during heat treatment. If, however, the refractory metal layer is provided on a silicon oxide layer, a refractory metal oxide is formed during the heat treatment. Examples of group IVB refractory metal transition elements include Ti, Zr and Hf; examples of group VIII refractory metal transition elements include Fe, Co, Ni, Ru, Rh, Pd, Os, Ir, and Pt; and examples of the group VB refractory metals include V, Nb, and Ta.

Abstract: Interfacial reactions, phase formation, microstructure, and composition, as functions of heat treatments (400–800 °C) were investigated in Ni90Ti10 alloy thin film coevaporated on an n‐type 6H‐SiC (0001) single‐crystal substrate. The study was carried out with the aid of Auger electron spectroscopy, x‐ray diffraction, and analytical transmission electron microscopy. The interaction was found to begin at 450 °C. Ni and C are the dominant diffusing species. The reaction zone is divided into three layers. In the first layer, adjacent to the SiC substrate, the presence of Ni‐rich silicide, Ni2Si, and C precipitates, was observed. The second layer is composed mainly of TiC, while the third consists of Ni2Si. This composite structure, consisting of the silicide as a low resistivity ohmic contact, and of the carbide as a diffusion barrier, promises high‐temperature stability crucial to ohmic contact development for SiC technology. Factors controlling phase formation in the Ni–Ti/SiC system are discussed.

Abstract: The efficiency of Ta and Nb films as diffusion barriers between thin Cu film and Si substrate has been studied using Auger electron spectroscopy, X-ray diffraction, optical microscopy, scanning electron microscopy and sheet resistance measurements. Two kinds of system were prepared by electron-beam evaporation: Cu/Ta (or Nb)/Si and Cu/Ta (or Mb) SiO2/Si. The samples were annealed at temperatures from 400 to 800‡C in a vacuum of 1 × 10−7 torr (13 ΜPa) for 30 min. In the Cu/Ta (or Nb)/Si system, the thermal stability was determined by interdiffusion at local sites, forming suicides, whereas the Cu/Ta (or Nb)/SiO2/Si system degraded by interdiffusion at the interface between Ta (or Nb) and Cu. It appears that Ta is a more effective diffusion barrier than Nb for both kinds of system. This difference in the barrier effect of the transition metals is attributed to differences between oxygen segregation at grain boundaries of barrier layers and differences between diffusion coefficients through barrier layers. It is suggested that the driving force for interdiffusion may play a major role in the reaction that determines the thermal stability of a given contact system; this suggestion is based on the fact that the interdiffusion in Cu/barrier/Si systems is suppressed by interposing an SiO2 layer in the Si substrate.

Abstract: A phosphor (200) for low voltage applications including a plurality of light-emitting particles (10) being made from a UV-excitable light-emitting phosphor, a diffusion barrier (25) being formed as a film on the light-emitting particles (10), and a coating (30) of an electron-excitable UV-emitting material being formed on the diffusion barrier (25). A method for making a low voltage phosphor including the steps of (i) providing a UV-excitable light-emitting phosphor (ii) forming a diffusion barrier on the UV-excitable light-emitting phosphor via sol-gel techniques (iii) forming, via sol-gel techniques, a film of an electron-excitable UV-emitting material on the diffusion barrier.

Abstract: Diffusion of the aroma compounds p-cymene and acetophenone into three different packaging films was studied at 500 MPa for kinetic measurement, and in the range of 0.1–450 MPa for measurement of the diffusion rate as a function of pressure. Absorption of aroma compounds was lower in pressurized than in nonpressurized polymeric films. PET/A1/LDPE was impermeable to either substance; absorption was limited to the LDPE lining inside. Distribution of aroma compounds to solution and films depended on their polarity; acetophenone virtually did not diffuse into the films. Measurements of the diffusion rate as a function of pressure has shown a diffusion barrier in the range of 100–200 MPa for the films investigated. The assumption that this is due to transition into the glassy state has been supported by studies of diffusion as a function of temperature.

Abstract: A method of forming a dielectric layer includes, a) chemical vapor depositing a dielectric layer of Ta2 O5 atop a substrate; and b) providing a predominately amorphous diffusion barrier layer over the Ta2 O5 dielectric layer. A method of forming a capacitor includes, a) providing a node to which electrical connection to a capacitor is to be made; b) providing a first electrically conductive capacitor plate over the node; c) chemical vapor depositing a capacitor dielectric layer of Ta2 O5 over the first electrically conductive capacitor plate; and d) providing a predominately amorphous diffusion barrier layer over the Ta2 O5 dielectric layer. A capacitor construction is also disclosed. The preferred amorphous diffusion barrier layer is electrically conductive and constitutes a metal organic chemical vapor deposited TiCx Ny Oz, where "x" is in the range of from 0.01 to 0.5, and "y" is in the range of from 0.99 to 0.5, and "z" is in the range of from 0 to 0.3, with the sum of "x", "y" and "z" equalling about 1.0. Such is preferably deposited by utilizing a gaseous titanium organometallic precursor of the formula Ti(NR2)4, where R is selected from the group consisting of H and a carbon containing radical, and utilizing deposition conditions of from 200° C. to 600° C. and from 0.1 to 100 Torr.

Abstract: We investigated diffusion barrier performance of chemical vapor deposition (CVD) TiN films prepared using tetrakis‐dimethyl‐amino titanium, Ti[N(CH3)2]4, to copper in the Cu/TiN/Si structure. The in situ treatment of the TiN films using N2/H2 plasma was found to significantly improve barrier performance against copper diffusion. The plasma‐treated TiN films were stable up to 650 °C but as‐deposited TiN films showed an evidence of copper diffusion into silicon even after annealing at 550 °C. The causes of the different effectiveness as a copper diffusion barrier of the two types of the CVD TiN films were discussed.

Abstract: Transparent Conducting Oxide films are essential for all kind of thin film solar cells. Doped Zinc Oxide (ZnO) in particular has several advantages when compared to other TCOs. It is stable in a hydrogen plasma and it acts as a diffusion barrier with respect to impurities from the substrate. In this work results on textured ZnO films deposited by RF magnetron sputtering are presented. The dependence of the film properties on the RF power, the substrate temperature and the water-vapor partial pressure added to the argon atmosphere has been investigated. We have found that high quality textured aluminum doped ZnO (ZnO:Al) films can be grown at low temperatures ( 150 °C) using the sputtering technique. Textured surfaces show two types of surface morphology; columnar and granular, depending on the deposition conditions. The ZnO:Al films seem to undergo a structural transition from hexagonal (mostly columnar appearance) to cubic structure (mostly granular appearance).

Abstract: A new method of fabricating a polycide gate is described. A gate polysilicon layer is provided a gate oxide layer on the surface of a substrate. A thin conducting diffusion barrier is deposited overlying the gate polysilicon layer. A of tungsten silicide is deposited overlying the thin diffusion barrier layer wherein a reaction gas in the deposition contains fluorine atoms and wherein fluorine atoms are incorporated into the tungsten layer. The gate polysilicon, thin conducting barrier, and tungsten silicide layers are patterned form the polycide gate structures. The wafer is annealed complete formation of the polycide gate structures wherein number of fluorine atoms from the tungsten silicide layer into the gate polysilicon layer are minimized by presence of the thin conducting diffusion barrier layer wherein because the diffusion of the fluorine atoms is the thickness of the gate oxide layer does not This prevents the device from degradation such as voltage shift and saturation current descrease.

Abstract: A diffusion barrier trilayer 42 is comprised of a bottom layer 44, a seed layer 46 and a top layer 48. The diffusion barrier trilayer 42 prevents reaction of metallization layer 26 with the top layer 48 upon heat treatment, resulting in improved sheet resistance and device speed.

Abstract: A titanium film and a titanium nitride film are sequentially formed on a polysilicon plug. Next, the titanium nitride film is oxidized to form an oxidized titanium nitride film. Thereafter, a lower electrode and a PZT film are formed. A diffusion barrier layer is prepared from the oxidized titanium nitride film and is oxidized before the lower electrode is formed. As a result, unlike in prior art, the diffusion barrier layer is not oxidized after the lower electrode is formed. Peel-off between the diffusion barrier layer and the lower electrode due to the oxidation is thus prevented.

Abstract: TiN layers prepared by reactive evaporation and rapid thermal annealing were tested as diffusion barrier between Al and Si. First, Rutherford backscattering spectroscopy (RBS) analysis of Al/Ti(N)/Ti/Si and Al/Ti(N)/Si multilayer structures showed that Si does not diffuse out up to a sintering temperature of 550 °C. However, as the temperature increases beyond 450 °C, Al starts to react with TiN. This reaction leaves less than half the TiN original thickness after a 30 min anneal at 550 °C. The RBS results indicate that TiN, crystallized at a temperature around 850 °C, forms a good barrier between Al and Si. Electrical measurements on various microelectronic devices were performed to verify this. Annealing of Ti(N) at 900 °C leads to a breakdown of p‐MOS (metal–oxide–semiconductor) devices while n‐MOS devices still work properly. Annealing at 800 °C gives good results on both MOS types except that the contact resistance of a p‐type resistor is higher than desired. The electrical circuit failure is mainly due to dopant loss from the active area of the device into the titanium silicide which forms during the rapid thermal annealing at 800 or 900 °C of the deposited Ti(N) layers.

Abstract: A solid-state method of joining Si-free hot isostatically pressed SiC (HIP SiC) at relatively low temperatures is described. The bonding method involved prereacting of HIP SiC specimens with Cr at 1000°C to produce the required thermodynamically stable ternary phase (τ, Cr5Si3C) and then diffusion bonding of the coated specimens employing Ni foil as an intermediate layer. The diffusion bonding of the prereacted specimens was carried out in a locally heated diffusion bonding equipment in a temperature range 700–1000°C. The quality of the joint was assessed by microstructural characterisation. The coatings obtained on the HIP SiC specimens acted as a diffusion barrier and avoided excessive reaction between Ni and SiC. Optimum bonding conditions were 940°C and 3 h. Scanning electron microscopy (SEM)/energy-dispersive X-ray microanalysis (EDX) and metallographic analysis showed good metallurgical compatibility and the absence of discontinuities and micropores at the interfaces in the bonded assembly. The proposed bonding scheme is superior to bonding SiC using Ni or Ni Cr foils alone. The excellent control of the reaction zone width and morphology also opens the prospect of joining SiC to Ni base alloys.

Abstract: Copper has been deposited into prepatterned high-aspect-ratio (3:1) trenches using electroplating (EP), CVD and sputter reflow. Filling capability, electrical properties, electromigration lifetimes and mechanical stress are examined. Also, barriers against Cu diffusion are studied using electrical bias at elevated temperatures. CVD Cu can fill high aspect ratio features that electroplating cannot. Sputter-reflowed Cu can also fill high aspect ratio features, but has a high thermal budget for features >0.4 /spl mu/m. Preliminary results show that CVD Cu may be limited by electromigration lifetime.

Abstract: We have studied the effect of the proximity of the wafer surface on the formation of End-Of-Range defects. These experiments are aimed at elucidating the behavior, upon annealing, of the Si self-interstitial supersaturation responsible for transient enhanced diffusion of boron in pre-amorphized silicon wafers. By implanting with Ge at constant energy while carefully etching away increasing thicknesses of the amorphous layer the nucleation and growth of End-Of-Range defects have been studied by transmission electron microscopy. Clearly, no influence in the loop population can be shown even when using state-of-the-art “quantitative” electron microscopy. These results are explained by considering that the c a interface is a diffusion barrier for the Si self-interstitial atoms during the nucleation stage, i.e., when the supersaturation is high. Only after the solid phase epitaxial regrowth, i.e., during the coalescence of the loops when the supersaturation is already low, the surface can interact with the loops. However, this interaction is not measurable through the observation of extended defects and this leads to simplifying assumptions for the simulation of Transient Enhanced or Retarded Diffusion in pre-amorphized Si wafers.

Abstract: The concentration of shallow defect states in Ta2O5 films was found to be greatly reduced, resulting in much less leakage current in Al/Ta2O5/Si capacitors, if N2O was used instead of O2 for post-deposition annealing. The superiority of N2O is explained by the formation of a slightly thicker SiOx diffusion barrier, which can reduce Si contamination coming from the Si substrate into the Ta2O5 film.