Showing papers on "Diffusion barrier published in 1992"
TL;DR: In this paper, the I-V characteristics of titanium contacts on polycrystalline diamond have been correlated with x-ray-photoelectron-spectroscopy (XPS) and Auger-electron spectroscopy(AES) characterizations of the interface.
Abstract: The I-V characteristics of titanium contacts on polycrystalline diamond have been correlated with x-ray-photoelectron-spectroscopy (XPS) and Auger-electron-spectroscopy (AES) characterizations of the interface. As-deposited titanium contacts were rectifying in nature because of minimal interaction between as-deposited titanium and diamond as confirmed via XPS and AES. Once annealed, however, these contacts became Ohmic. The change was related to the formation of a carbide at the interface as observed by XPS. The Schottky-barrier height of the titanium contacts, which was determined by valence-band XPS, decreased from 1.3 to 0.8 eV as a result of the postdeposition annealing. It is believed that the carbide formation at the interface creates a diamond surface layer rich in electrically active defects which lower the barrier height of the metal and increase the leakage current. The interface between titanium and an argon-sputtered diamond surface was also characterized. Titanium formed as-deposited Ohmic contacts on the sputtered surface. A high density of ion-radiation-induced defects and a formation of a carbide during deposition both contributed to the Ohmic-contact formation. These contacts remained Ohmic after postdeposition annealing despite the fact that the annealing did not increase the carbide formed at the interface. It is believed that the carbide formed by the deposition of titanium behaved as a diffusion barrier to prevent the damaged layer from being annealed out into the titanium overlayer. It is concluded that most materials will yield rectifying contacts on a clean diamond surface. Ohmic contacts can be obtained by modifying the interface in some way (i.e., carbide formation, sputtering, etc.).
138 citations
TL;DR: In this article, the diffusion of a single metal atom on the surface of a fcc (001) metal was investigated and direct molecular dynamics simulations were performed for Ag on Ag and Rh on Rh(001) systems.
129 citations
Patent•
IBM1
TL;DR: In this paper, a method for providing vias, lines and other recesses in VLSI interconnection structures with copper alloys to create a thin layer of an oxide of an alloying element on the surface of the deposited alloy and on portions of the alloy which are in contact with an oxygen containing dielectric is disclosed.
Abstract: A method for providing vias, lines and other recesses in VLSI interconnection structures with copper alloys to create a thin layer of an oxide of an alloying element on the surface of the deposited alloy and on portions of the alloy which are in contact with an oxygen containing dielectric is disclosed. The present invention is also directed to VLSI interconnection structures which utilize this copper alloy and thin oxide layer in their vias, lines and other recesses. The oxide layer eliminates the need for diffusion barrier and/or adhesion layers and provides corrosion resistance for the deposited copper alloy. VLSI devices utilizing this copper alloy in the vias, lines and other recesses interconnecting semiconductor regions, devices and conductive layers on the VLSI device are significantly improved.
95 citations
Patent•
15 May 1992
TL;DR: In this paper, various hydrogen production and hydrogen sulfide decomposition processes are disclosed that utilize composite metal membranes that contain an intermetallic diffusion barrier separating a hydrogen-permeable base metal and a hydrogen permeable coating metal.
Abstract: Various hydrogen production and hydrogen sulfide decomposition processes are disclosed that utilize composite metal membranes that contain an intermetallic diffusion barrier separating a hydrogen-permeable base metal and a hydrogen-permeable coating metal. The barrier is a thermally stable inorganic proton conductor.
85 citations
Patent•
19 May 1992TL;DR: In this article, a thin-film transistor is formed by placing a diffusion barrier cap over the channel portion of the thinfilm layer and introducing conductivity determining dopant into the thin film layer.
Abstract: A semiconductor device having a thin-film transistor (22) and a process for making the device. The semiconductor device includes a substrate (11) having a principal surface. A gate electrode (29) overlies the principal surface and a gate dielectric layer (23) overlies the gate electrode (29). A conductive channel interface layer (25) overlies the upper surface of the gate electrode (29) and is spaced apart from the gate electrode (29) by the gate dielectric layer (23). A conductive thin-film layer (57) overlies the gate electrode (29) and forms a metallurgical contact to the channel interface layer (25). Remaining portions of the thin-film overlie the principal surface and form source and drain regions (63, 65) of the thin-film transistor (22). The thin-film source and drain regions (63, 65) are formed by placing a diffusion barrier cap (60) over the channel portion (61) of the thin-film layer (57) and introducing conductivity determining dopant into the thin-film layer (57). A silicide is formed in the thin-film source and drain regions (63, 65) by the depositing a refractory metal layer over the thin-film layer (57) and the diffusion barrier cap (60) and annealing the thin-film layer (57).
76 citations
TL;DR: In this paper, YBa2Cu3O7 (YBCO) films of YBCO have been deposited by off-axis sputtering onto substrates of rplane sapphire coated with a CeO2 diffusion barrier which had been previously deposited by metalorganic chemical vapor deposition process.
Abstract: Epitaxial thin films of YBa2Cu3O7 (YBCO) have been deposited by off‐axis sputtering onto substrates of r‐plane sapphire coated with a CeO2 diffusion barrier which had been previously deposited by metalorganic chemical vapor deposition process. The YBCO films display excellent superconducting properties, with critical current densities and microwave surface resistances comparable to state of the art YBCO films deposited directly onto LaAlO3 or MgO substrates. The volume fraction of YBCO with large‐angle in‐plane misalignment relative to the underlying layers is comparable to, or smaller than that obtained for YBCO directly deposited onto MgO substrates.
70 citations
TL;DR: In this paper, the authors present results from molecular dynamics simulations of the diffusion of a single metal atom on the surface of a fcc (111) metal and conclude that diffusion on these atomically smooth surfaces is governed by correlated dynamical behavior which eliminates the possibility of a unique extraction of the corrugation profile from experimental data.
67 citations
Patent•
IBM1
TL;DR: An improved antifuse uses metal penetration of either a P-N PN junction or a Schottky diode as mentioned in this paper, where the junction is surrounded by an electrical isolation structure which also serves to thermally isolate the said junction.
Abstract: An improved antifuse uses metal penetration of either a P-N PN junction or a Schottky diode. The P-N junction or Schottky diode (11), is contacted by a diffusion barrier (14) such as TiN, W, Ti-W alloy, or layers of Ti and Cr, with a layer (15) of a metal such as Al, Al-Cu alloy, Cu, Au, or Ag on top of the diffusion barrier. The junction (11) is surrounded by an electrical isolation structure (13) which also serves to thermally isolate the said junction. When this junction is stressed with voltage pulse producing a high current density, severe joule heating occurs resulting in metal penetration of the diffusion barrier and the junction to form a metal contact (15'). The voltage drop across the junction decreases by about a factor of ten after the current stress and is stable thereafter. Alternatively, a shallow P-N junction in a silicon substrate is contacted by a layer of metal that forms a silicide, such as Ti, Cr, W, Mo, or Ta. Stressing the junction with a voltage pulse to produce a high current density results in the metal penetrating the junction and reacting with the substrate to form a silicide.
64 citations
TL;DR: In this article, the microstructure of TiN and TiOxNy films were evaluated with a high-resolution field emission scanning electron microscope (FE-SEM), and it was found through the experiment of internal thermal diffusion by annealing Al/TiN/Si in a vacuum that the diffusion barrier performance of the films is associated with the micro-structure and internal stress in addition to the oxygen content itself.
Abstract: The microstructure of TiN and TiOxNy films deposited on Si(100) substrates in an Ar-N2 or an Ar-N2-O2 gas mixture was evaluated with a high-resolution field emission scanning electron microscope (FE-SEM). The TiN films deposited under an applied negative substrate bias have an extremely dense microstructure with hillocks on the film surface caused by the high compressive stress. The addition of oxygen modifies the microstructure of TiN film, i.e., the hillocks disappeared on the surface of TiOxNy by virtue of the stress relaxation effect. It has been found through the experiment of internal thermal diffusion by annealing Al/TiN (or TiOxNy)/Si in a vacuum that the diffusion barrier performance of the films is associated with the microstructure and internal stress in addition to the oxygen content itself.
57 citations
Patent•
IBM1
TL;DR: In this paper, the copper-based multilevel interconnect formed by the inventive process first includes the process step of depositing a pattern of copper lines upon or in an applicable substrate, such as silicon dioxide.
Abstract: The present invention features a process and a resulting article in which copper-based multilevel interconnects are fabricated. The copper-based multilevel interconnect formed by the inventive process first includes the process step of depositing a pattern of copper lines upon or in an applicable substrate, such as silicon dioxide. The copper lines are approximately one micron thick. The lines are coated with approximately 50 to 100 nm of titanium by sputter deposition, and undergo subsequent annealing at approximately 300° C. to 400° C. in an argon ambient. The titanium and copper layers are annealed to provide a Cu 3 Ti alloy at the copper/titanium junction. The unreacted titanium between the copper features is then stripped away by dry etching with fluorine-based etch. The remaining Cu 3 Ti alloy is subsequently transformed into TiN(O) and copper by a rapid thermal annealing in an NH 3 atmosphere at an approximate temperature of below 650° C., and then usually at temperatures ranging from between 550° C. to 650° C. for approximately five minutes. The copper lines are thereby capped with a layer of TiN(O), since oxygen is incorporated into the TiN layer during the heat treatment. The TiN(O) layer is more effective as a diffusion barrier than is TiN.
52 citations
TL;DR: In this paper, the authors used pulsed laser deposition to grow YBa2Cu3O7−x (YBCO) films on 100 MgO substrates by providing a better lattice match to the YBCO films.
Abstract: Epitaxial YBa2Cu3O7−x(YBCO) films were grown on SrTiO3‐buffered (100) MgO substrates by pulsed laser deposition. The SrTiO3 layer of about 500 A thick serves a dual purpose to provide a better lattice match to the YBCO films as well as a diffusion barrier to prevent interaction between YBCO and MgO. These YBCO films exhibit excellent structural, electrical, and microwave properties with Tc≳89 K and Tc=2.9×106 A/cm2 at 77 K (1×106A/cm2 at 84 K). X‐ray pole figure measurements showed that over 99.92% of the volume fraction of the c‐axis oriented film has the a‐b axis aligned parallel to the [010] and [001] direction of the substrate.
Patent•
18 Feb 1992TL;DR: In this article, an electrical ceramic oxide capacitated transistor is fabricated on a semiconductor substrate according to conventional techniques, and a diffusion barrier is deposited over the transistor to protect it from subsequent process steps.
Abstract: An electrical ceramic oxide capacitor utilizable in an integrated circuit memory device, and a method for making same is presented. A transistor is fabricated on a semiconductor substrate according to conventional techniques. A diffusion barrier is deposited over the transistor to protect it from subsequent process steps. Metal contacts are formed to contact the active transistor regions in the substrate, and additional barriers are formed to insulate the metal contacts. In a vertical embodiment, the barriers above the metal contacts can serve as bottom electrodes for the capacitor. In a lateral embodiment, the barriers on the side of the metal contacts serve as electrodes for the capacitor. Electrical ceramic oxide material is deposited between the electrode plates.
TL;DR: In this paper, the authors describe procedures for forming continuous, planar, and thermally stable 12-nm-thick CoSi2 layers via Co/Si interaction through an interfacial Ti(O) diffusion barrier layer.
Abstract: In this letter, we describe procedures for forming continuous, planar, and thermally stable 12‐nm‐thick CoSi2 layers via Co/Si interaction through an interfacial Ti(O) diffusion barrier layer. Three Co and three Ti layers were deposited sequentially on Si‐(100) substrates by dual source thermal evaporation with Ti as the first layer. Oxygen was found to be selectively incorporated into all Ti layers during deposition. Following a 550 °C, 2 h anneal the morphology of the silicide layer depended strongly on the thickness of the initial Ti(O) layer. For an initial Ti(O) layer of ∼5 nm, both Co and Si readily diffused to form a Co silicide interfacial layer with a very rough, faceted interface. Increasing the Ti(O) thickness to ∼10 nm stopped Si out diffusion and reduced Co in diffusion such that a uniform 6 nm CoSix interfacial layer formed. Selective removal of the upper layers and a 750/800 °C annealing produced a 12 nm CoSi2 layer with a resistivity of ∼28 μΩ cm.
TL;DR: In this article, the reflectance and transmittance were measured in the visible and the near-IR wavelength regions of a triple-layer structure of TiO2Al/TiN/TiO2 on glass substrates at temperatures ranging from room temperature to 300°C.
18 May 1992
TL;DR: In this paper, the influence of Kirkendall pore formation in the Cu-Au-Sn system as a degradation mechanism is shown, together with the formation of a new type of ternary intermetallic compound.
Abstract: The authors summarize work done on different Au-Sn-Cu and Au-Cu metallurgies in the inner lead bond (ILB) area. The influence of Kirkendall-pore formation in the Cu-Au-Sn system as a degradation mechanism is shown. This effect together with the formation of a new type of ternary intermetallic compound is observed during thermal aging in contacts with a direct interface between the eutectic 80/20 Au-Sn alloy and copper. The zeta-phase (Au/Sn 90/10) acts like a diffusion barrier, which inhibits the pore formation associated with copper diffusion. The composition of the ternary intermetallic compounds, their growth constant, and their activation energy were determined. The possibility of increasing the contact reliability by producing a reliable Au-Sn metallurgy during the ILB-process is shown. >
18 May 1992
TL;DR: In this article, the authors examined the use of thin inorganic dielectric films as barrier layers between copper and polyimide and determined its impact on the high-frequency electrical performance of transmission line structures.
Abstract: An investigation was conducted to examine the use of thin inorganic dielectric films as barrier layers between copper and polyimide. The emphasis was on discovering the effectiveness of the barrier layers in preventing copper-polyimide interaction and determining its impact on the high-frequency electrical performance of transmission line structures. The integrity of the inorganic dielectric layers as diffusion barriers for the copper was analyzed using transmission electron microscopy. These effects were studied by depositing thin layers of Si/sub 3/N/sub 4/, SiO/sub 2/, and SiO/sub x/N/sub y/ between chromium-copper-chromium lines and either Dow benzocyclobutene or Dupont 2525 polyimide. Both sputtered Si/sub 3/N/sub 4/ and PECVD SiO/sub x/N/sub y/ behaved as diffusion barriers, which resulted in improved performance at very high frequencies over unprotected transmission lines. Copper diffused through the sputtered SiO/sub 2/, confirming that it is inadequate as a diffusion barrier for copper. Because the thickness of the inorganic dielectric layers was very small in proportion to the thickness of the polymer dielectrics employed, no difference in the effective dielectric constant was seen over the entire frequency range measured. >
TL;DR: In this paper, the effective diffusion parameters derived on the basis of the Auger analysis are 218.4 kJ mol −1 and 3 × 10 −5 m 2 s −1 for the activation energy and the preexponential factor respectively.
Patent•
3 Dec 1992TL;DR: In this article, a defect-free field oxide isolation is formed by oxidizing through a silicon nitride layer, which overlies the isolation regions of the silicon substrate and acts as a diffusion barrier during field growth.
Abstract: Defect-free field oxide isolation (34) is formed by oxidizing through a silicon nitride layer (30) which overlies the isolation regions (22) of the silicon substrate (12). Additionally, the silicon nitride layer (30) acts as a diffusion barrier during field growth, and thus inhibits the lateral diffusion of oxygen underneath the oxidation mask (18). Therefore, field oxide encroachment into the adjacent active regions is effectively reduced. Moreover, field oxide encroachment is also reproducibly controlled, and therefore integrated circuits with high device packing densities can be fabricated.
Patent•
28 Apr 1992TL;DR: In this article, a p-n junction diffusion barrier is proposed, comprising a first semiconductor layer 28 of p-type conductivity, a second semiconductorlayer 32 of n-typeconductivity and a third layer 30 of p type conductivity disposed between the first and second layers, with the third layer being doped with a relatively low diffusivity dopant in order to form a diffusion barrier between the second and the second layers.
Abstract: Generally, and in one form of the invention, a p-n junction diffusion barrier is disclosed comprising a first semiconductor layer 28 of p-type conductivity, a second semiconductor layer 32 of n-type conductivity and a third semiconductor layer 30 of p-type conductivity disposed between the first and second layers, the third layer being doped with a relatively low diffusivity dopant in order to form a diffusion barrier between the first and the second semiconductor layers
TL;DR: In this paper, the electrical properties of diffusion-barrier-containing ohmic multilayer systems of the type Au/WSiN/(Au,Ge,Ni) on GaAs (n ≈ 2 × 1017cm−3) prepared by vapour phase epitaxy were investigated.
TL;DR: In this article, the quality of barrier films during further anneal steps was investigated by detection of the diffusion processes and interfacial reactions using Auger electron spectroscopy (AES) depth profiling and by testing the spiking directly on wafers with contact hole structures.
TL;DR: In this paper, a thin layer of sputtered aluminum is used as a diffusion barrier/adhesion promoter between the copper and SiO2, and the electrical performance of these structures when subjected to thermal cycles and applied biases is determined.
Abstract: An investigation of the stability and electrical characteristics of Aluminum-Copper bilayer films on SiO2 has been carried out. In this investigation, a thin layer of sputtered aluminum is used as a diffusion barrier/adhesion promoter between the copper and SiO2. The electrical performance of these structures when subjected to thermal cycles and applied biases is determined. The interactions and diffusion of copper through aluminum into SiO2 was investigated using both blanket films and MOS capacitors. Results are compared with those obtained from structures of Al and Cu metallization on SiO2. Samples were annealed at various temperatures in the range of 200°C to 500°C. Analysis using four-point probe resistivity measurements, X-ray diffraction, and Rutherford Back Scattering were carried out. MOS capacitors are used to establish performance under applied bias. Capacitance-Voltage characteristics of formed alloys are discussed. These results will be presented and discussed in view of the applicability of aluminum as the adhesion promoter for copper interconnections on SiO2.
Patent•
22 Dec 1992TL;DR: In this paper, an electrode assembly for a semiconductor device includes a contact layer formed on the semiconductor substrate and consisting mainly of rare-earth metal or metals or a silicide thereof, or a mixture thereof.
Abstract: An electrode assembly for a semiconductor device includes a contact layer formed on a semiconductor substrate and consisting mainly of a rare-earth metal or metals, or a silicide thereof, or a mixture thereof, and a diffusion barrier layer formed on the contact layer and consisting mainly of iron or an iron alloy. The assembly is bonded to a mount by a solder layer formed on the diffusion barrier layer and consisting mainly of lead and tin.
TL;DR: In this paper, steel samples coated by electroless nickel were annealed in air and investigated by glow discharge optical emission spectroscopy (GDOS) depth profiling, and the austenitic interdiffusion layer formed at the interface between the substrate and the Ni-P film during annealing of the sample, which acts as a diffusion barrier for diffusion of iron to the surface.
Abstract: Steel samples coated by electroless nickel were annealed in air. Oxide growth kinetics and iron diffusion through the structure were investigated by glow discharge optical emission spectroscopy (GDOS) depth profiling. Protection against high-temperature oxidation was found to be given mostly by the austenitic interdiffusion layer formed at the interface between the substrate and the Ni-P film during annealing of the sample, which acts as a diffusion barrier for diffusion of iron to the surface.
Patent•
10 Mar 1992TL;DR: In this article, a magnetic recording medium comprising a substrate, a diffusion element layer formed on the substrate from a material to be diffused into a magnetic film by heating, and a diffusion barrier formed in a desired pattern on the diffusion barrier, and the magnetic film having a portion of reduced saturation magnetization in repetition in a direction perpendicular to a recording direction is presented.
Abstract: A magnetic recording medium comprising a substrate, a diffusion element layer formed on the substrate from a material to be diffused into a magnetic film by heating, a diffusion barrier formed in a desired pattern on the diffusion barrier, and the magnetic film formed on the pattern of the diffusion barrier and on other area than the area of the pattern, the magnetic film having a portion of reduced saturation magnetization in repetition in a direction perpendicular to a recording direction. The magnetic recording medium can be obtained by forming a diffusion element layer, a diffusion barrier in a desired pattern, and a magnetic film, in a stacked form on a substrate, followed by heating.
TL;DR: In this article, the properties of reactively sputtered TiN films used as diffusion barriers for Al-Cu metallization in submicron bipolar transistors were studied, and the performance of the barrier depends on both the nominal thickness of the TiN layer and on the device dimensions.
Abstract: We have studied the properties of reactively sputtered TiN films used as diffusion barriers for Al‐Cu metallization in submicron bipolar transistors. Emitter‐base diodes with shallow junctions were fabricated to monitor the integrity of the barrier via junction leakage measurements. Scanning and transmission electron microscopy were used to study the morphology and step coverage of these films, and also for barrier failure analysis. The effectiveness of the barrier depends on both the nominal thickness of the TiN layer and on the device dimensions. For thin TiN layers (∼47 nm), high junction leakage was observed on narrow emitters (0.5 μm) but not on wide emitters (5 μm). These observations highlight the reliability and yield concerns associated with the use of sputtered TiN films for deep submicron technologies. In some cases, low‐temperature (500 °C) epitaxial alignment of the emitter polysilicon was observed, associated with Al penetration of the barrier. This indicates that the Al provides an enhancement of the tendency towards epitaxial alignment of the polysilicon grains. For thicker TiN layers (∼83 nm), low leakage was observed on both narrow and wide emitters, and no unusual epitaxial alignment was observed.
TL;DR: In this article, high quality TiN thin films, deposited by a low temperature (400-450 C) and low pressure (10 Torr) metalorganic chemical vapor deposition process using tetrakis(diethylamino)Ti and ammonia, are reported.
Abstract: Material properties are reported of high quality TiN thin films, deposited by a low temperature (400–450 C) and low pressure (10 Torr) metalorganic chemical vapor deposition process using tetrakis(diethylamino)Ti and ammonia. Layer resistivities of less than 200 μΩ cm are achieved in 300 to 500 A thick films. The carbon and oxygen content in the films is found to be low (<3% C, <0.5% O). Conformality of the films in small contact holes is sufficient for the films to be applicable as diffusion barrier and adhesion layers in integrated circuit manufacturing at the 0.25 μm generation. Integration of the MOCVD-TiN films in a Ti/TiN/Al-alloy metallization scheme is also reported. The diffusion barrier performance of the MOCVD-TiN layers is found to exceed that of PVD-TiN layers.
TL;DR: In this article, the authors report the preparation and physical properties of high-density silicon nitride thin films, which are prepared by plasmaenhanced chemical vapor deposition (PECVD) at low frequency (50 kHz) with helium dilution and different silane/nitrogen/ammonia gas mixtures.
Abstract: The aim of this work is to report the preparation and some chemical and physical properties of high-density silicon nitride thin films. The films are prepared by plasma-enhanced chemical vapor deposition (PECVD) at low frequency (50 kHz) with helium dilution and different silane/nitrogen/ammonia gas mixtures. In the best case the atomic hydrogen density is less than 7 × 10 21 atoms/cm 3 , mainly bound in NH sites, with a very low etch rate of 10 A/min. The thermal stability and the diffusion barrier properties have been checked. This material must be a good candidate for chemical grafting and as a protective layer in chemical sensors.
TL;DR: In this article, diffusion barrier effects on diffusion and flow mapping by NMR microscopy were simulated for the general case of an interface between two compartments with different relaxation properties and diffusion coefficients.
Abstract: Diffusion barrier effects on diffusion and flow mapping by NMR microscopy were simulated for the general case of an interface between two compartments with different relaxation properties and diffusion coefficients. The extreme case of a completely impermeable barrier (i.e. a glass wall) shows substantial changes in signal intensity and phase at distances of a few micrometers from the surface. Permeable boundaries show varying degrees of intensity and phase changes that can be used for deducing permeability properties of barriers that would otherwise be below the true spatial resolution of the image. The simulations were done for the case of a solid, water-imbibing polymer immersed in water and for water diffusion between intra- and extracellular compartments across a biological membrane. These specific boundary effects have substantial implications for the determination of image resolution and for the separation and measurement of coherent flow and random diffusion.
Patent•
23 Apr 1992
TL;DR: In this paper, a method for protecting copper and copper-based composites from high temperature oxidation, by the application of a cobalt-based alloy diffusion barrier and a copper-aluminum alloy protective outer layer, is presented.
Abstract: A method is taught for protecting copper and copper-based composites from high temperature oxidation, by the application thereto of a cobalt-based alloy diffusion barrier and a copper-aluminum alloy protective outer layer.