TL;DR: In this article, the authors used the Thermo VG Theta Probe Instrument to analyze the surface properties of low-permittivity polymers: Cyclotene, Silk and Ultra-Low K.
Abstract: 1. Surface Analysis Using Confocal Ramam Micro-Spectroscopy C. Hyett, et al. 2. Ellipsometric Characterization of the Optical Constants of Metals: Thin Films Versus Nanoparticles D. Dalacu, L. Martinu. 3. Thin Film Analysis Using the Thermo VG Theta Probe Instrument R.K. Champaneria, J. Wolstenholme. 4. Nanoindentation of Microsprings and Microcantilevers M. Seto, et al. Low Permittivity Materials. 5. Physical and Interfacial Properties of Low Permittivity Polymers: Cyclotene, Silk and Ultra-Low K D. Frye, et al. 6. Physical and Mechanical Properties of Silk Low Dielectric Film J. Im. 7. Plasma-Polymerized Fluoropolymer Thin Films for Microelectronic Applications M. Silverstein, et al. Polymer Metallization. 8. Fundamental Aspects of Polymer Metallization F. Faupel, et al. 9. The Study of Copper Clusters on Dow Cyclotene and Their Stability D.-Q. Yang, E. Sacher. 10. Adsorption of Noble Metal Atoms on Polymers V. Zaporojtchenko, et al. 11. Nucleation and Growth of Vapor-Deposited Metal Films in Self-Assembled Monolayers Studied by Multiple Surface A.V. Walker, et al. Barrier Layers. 12. Morphological Investigations of Low-k Polymer/Diffusion Barrier Interfaces for IC Metallization S. Sankaran, R.E. Geer.13. Chemistry in the Initial Formation of Nitride Barriers on Low-k Dielectrics P. Abramowitz, et al. 14. Capabilities and Limitations of RBS to Characterize Hyper-Thin Silicon Compounds on Various Polymeric Substrates G. Dennler, et al. Adhesion Enhancement. 15. Surface Modifications by Ion-Assisted Reactions S.K. Koh, et al. 16. Plasma and VUV Pretreatments of Polymer Surfaces for Adhesion Enhancement of Electrolessly Deposited Ni Or Cu Films M. Romand, et al. Index
TL;DR: In this paper, chemical vapor deposition has been used to deposit titanium nitride (TiN) on silicon wafers at low pressures in a cold-wall single-wafer reactor.
Abstract: Chemical vapor deposition has been used to deposit titanium nitride (TiN) on silicon wafers at low pressures in a cold-wall single-wafer reactor. Experiments are reported for pressures in the range of 100-300 mtorr and temperatures between 450{degrees}-700{degrees}C, with titanium tetrachloride and ammonia as reactants. Both hydrogen and nitrogen are evaluated as diluents. Deposition rates as high as 1000 {angstrom}/min have been achieved. The chemical nature of the films are evaluated by Auger and RBS techniques, while the morphology is depicted by SEM. For the most part, the films are stoichiometric and contain small quantities of oxygen, chlorine, and hydrogen.
TL;DR: In this article, a semiconductor device, device metallization, and method are described, which is especially designed for submicron contact openings, including titanium silicide to provide a low resistance contact to a device region, titanium nitride and sputtered tungsten to provide diffusion barrier, etched back chemical vapor deposited tengsten for planarization and aluminum or an aluminum alloy for interconnection.
Abstract: A semiconductor device, device metallization, and method are described. The device metallization, which is especially designed for submicron contact openings, includes titanium silicide to provide a low resistance contact to a device region, titanium nitride and sputtered tungsten to provide a diffusion barrier, etched back chemical vapor deposited tungsten for planarization, and aluminum or an aluminum alloy for interconnection.
TL;DR: In this article, the authors performed detailed analytical transmission electron microscopy investigations on a well-known diffusion barrier system for very large-scale integration metallization, and demonstrated that interfacial reactions are of great importance for the barrier mechanism.
Abstract: Detailed analytical transmission electron microscopy investigations were performed on a well‐known diffusion barrier system for very‐large‐scale integration metallization. It will be demonstrated that interfacial reactions are of great importance for the barrier mechanism. Both Ti and TiN act as diffusion barrier for the semiconductor and the metallization, respectively. For an aluminum‐based metallization, TiN has a ‘‘spongelike’’ function due to its ability to absorb several amounts of aluminum at elevated temperatures and therefore inhibits diffusion towards the substrate. Ti acts for silicon as a compound forming barrier according to Nicolet’s classification [in Tungsten and Other Refractory Metals for Very Large Scale Integration Applications II, edited by E. K. Broadbent (Materials Research Society, Pittsburgh, 1987); pp. 19–26].
TL;DR: In this paper, a Ta5Si3 target in a N2/Ar plasma was used as a diffusion barrier between Al and Si, and it was found that aluminum can be melted on top of the Si/Ta-Si-N structure without any evidence of metallurgical interactions between the layers.
Abstract: Amorphous Ta–Si–N thin films of a wide range of compositions were prepared by rf reactive sputtering of a Ta5Si3 target in a N2/Ar plasma. The relationship between films’ composition and resistivity is reported. All obtained films were tested as diffusion barriers between Al and Si. Backscattering spectrometry combined with cross‐sectional transmission electron microscopy were used to determine the barrier effectiveness. It was found that aluminum can be melted on top of the Si/Ta–Si–N structure (675 °C for 30 min) without any evidence of metallurgical interactions between the layers.
TL;DR: In this paper, a method for passivating mirrors in the process of fabricating semiconductor laser diodes is described, which is based on a contamination-free mirror facet, followed by in-situ application of a continuous, insulating (or low conductive) passivation layer.
Abstract: A method for passivating mirrors in the process of fabricating semiconductor laser diodes is disclosed. Key steps of the method are: (1) providing a contamination-free mirror facet, followed by (2) an in-situ application of a continuous, insulating (or low conductive) passivation layer. This layer is formed with material that acts as a diffusion barrier for impurities capable of reacting with the semiconductor but which does not itself react with the mirror surface. The contamination-free mirror surface is obtained by cleaving in a contamination-free environment, or by cleaving in air, followed by mirror etching, and subsequent mirror surface cleaning. The passivation layer consists of Si, Ge or Sb.
TL;DR: In this paper, a process for the formation of a titanium nitride/cobalt silicide bilayer for use in semiconductor processing is described, where the substrate is then annealed.
Abstract: A process for the formation of a titanium nitride/cobalt silicide bilayer for use in semiconductor processing. Titanium and then cobalt are deposited on a silicon substrate by sputter deposition techniques. The substrate is then annealed. During this process the titanium first cleans the silicon surface of the substrate of any native oxide. During the anneal, the titanium diffuses upward and the cobalt diffuses downward. The cobalt forms a high quality epitaxial cobalt silicide layer on the silicon substrate. The titanium layer diffuses upward to the surface of the bilayer. The anneal is carried out in a nitrogen or ammonia ambient, so that a titaniun nitride layer is formed. The resulting structure can be used in self aligned silicide technology, as a contact fill material for contact to electrical regions of the device, and as a diffusion barrier preventing the diffusion of aluminum from a subsequently deposited aluminum layer or the diffusion of dopants from a subsequently grown doped selective silicon layer into the silicon substrate.
TL;DR: In this paper, the authors studied the interactions of Cu with CoSi2, CrSi2 and TiSi2 with and without interposed TiNx layers using Rutherford backscattering spectrometer, Auger electron spectrometry, x-ray diffraction, and in situ sheet resistivity measurements.
Abstract: Interactions of Cu with CoSi2, CrSi2, and TiSi2 with and without interposed TiNx layers have been studied using Rutherford backscattering spectrometry, Auger electron spectrometry, x‐ray diffraction, and in situ sheet resistivity measurements. Cu diffuses through a preformed CoSi2 layer to form the structure CoSi2/Cu3Si/Si(100). No dissociation of CoSi2 has been observed. For the Cu/CrSi2/Si system, the outdiffusion of Si leads to the formation of Cu3Si/CrSi2/Si at temperatures above 300 °C. At about the same temperature, Cu diffuses into a TiSi2 layer and to the TiSi2/Si interface to react with both Ti and Si forming Cu3Ti, Cu3Si, and Cu4Si phases. A 50‐nm TiNx layer prepared by reactive sputtering was observed to be an effective diffusion barrier between Cu and CoSi2 or CrSi2. A 30‐nm layer of TiNx simultaneously grown with TiSi2 by rapid thermal annealing proved effective between Cu and TiSi2 up to 500 °C.
TL;DR: In this article, an improved semiconductor device interconnect comprising a conductive layer with an underlying diffusion barrier metal is attached to a doped glass layer by an intermediate metal adhesion layer.
Abstract: An improved semiconductor device interconnect comprising a conductive layer (30) with an underlying diffusion barrier metal (26) is attached to a doped glass layer (20) by an intermediate metal adhesion layer (22). The metal adhesion layer (22) is deposited onto the doped glass layer (30) prior to the formation of contact openings (24) in the doped glass layer (30) and the subsequent formation of the interconnect metallization. In one embodiment, a titanium diffusion barrier (26) is deposited onto a doped glass layer (30) having an aluminum metal adhesion layer (22) thereon and contact openings (24) therethrough. The titanium is annealed to form a silicide (28) in a substrate region (14) exposed by the contact opening (24) and an aluminum interconnect (32) is formed contacting the silicide region (28).
TL;DR: In this article, a process for fabricating an improved semiconductor device is disclosed wherein a protective layer of Al 2 O 3 is selectively formed to encapsulate a refractory-metal conductor.
Abstract: A process for fabricating an improved semiconductor device is disclosed wherein a protective layer of Al 2 O 3 is selectively formed to encapsulate a refractory-metal conductor. To form the Al 2 O 3 layer, first an Al/refractory-metal alloy is selectively formed on the surface of the refractory-metal conductor, then the Al/refractory-metal alloy is reacted with O 2 . The resulting Al 2 O 3 encapsulation layer acts as an O 2 diffusion barrier preventing the oxidation of the refractory-metal during subsequent process steps used to fabricate the semiconductor device. In addition, the Al 2 O 3 layer improves the mechanical compatibility of the refractory-metal conductor with other materials used to construct the semiconductor device, such as, for example, improving the adhesion of an overlying layer of passivation glass to the refractory-metal conductor.
TL;DR: In this article, a stable contact structure of Al3Ta/Ta-N/N/Si was obtained by interposing the Ta-N film as a diffusion barrier between a Si-Ta film and a Si substrate.
Abstract: In order to obtain a stable contact structure applicable to Si–LSI thin film technology, we have produced the contact structure of Al3Ta/Ta–N/Si by interposing the Ta–N film as a diffusion barrier between Al3Ta film and Si substrate. The contact structure was heat-treated at various temperatures in vacuum, and the behavior of mass transport across the interfaces of both Al3Ta/Ta–N and Ta–N/Si caused by the heating process was examined by Auger depth analysis. Also, on the basis of X-ray diffraction and XPS analysis, the barrier properties of the Ta–N film were examined with respect to the crystalline state and the chemical bonding state of the film. It is revealed that the thermal stability of this contact structure is closely related to the stoichiometry of the Ta–N film used as a diffusion barrier.
TL;DR: In this article, a local interconnect system for VLSI integrated circuits is presented, which allows contacts to be misaligned with the moat boundary, since the titanium nitride local interfconnect layer can be overlapped from the exposed moat up on to the field oxide to provide a bottom contact and diffusion barrier for a contact hole which is subsequently etched through the interlevel oxide.
Abstract: A local interconnect system for VLSI integrated circuits. During self-aligned silicidation of exposed moat and gate regions in a nitrogen atmosphere, a conductive titanium nitride layer is formed overall. Normally this conductive layer is stripped to avoid shorting out devices. However, the present invention patterns this conductive layer, thereby providing a local interconnect with the sheet resistance of the order of one ohm per square. Moreover, this local interconnect level permits contacts to be misaligned with the moat boundary, since the titanium nitride local interconnect layer can be overlapped from the moat up on to the field oxide to provide a bottom contact and diffusion barrier for a contact hole which is subsequently etched through the interlevel oxide. This local interconnect level fulfills all of the functions which a buried contact layer could fulfill, and fulfills other functions as well.
TL;DR: In this paper, a three-layer sandwich is formed over the contact region and then annealed in free nitrogen, and material from the titanium layer adjacent to the substrate migrates thereinto to produce a highly conductive diffusion region of titanium silicide.
Abstract: A device is provided by forming a diffusion barrier at the interface between a metalized contact and the surface of a semiconductor substrate. A three-layer sandwich is formed over the contact region and then annealed in free nitrogen. The sandwich is made of a titanium nitride layer interposed between layers of titanium. During the anneal, material from the titanium layer adjacent to the substrate migrates thereinto to produce a highly conductive diffusion region of titanium silicide. Concurrently during the anneal the other layer of titanium, which is exposed to the nitrogen atmosphere, is converted into a backing layer of titanium nitride which enhances the barrier effect of the titanium nitride layer at the center of the sandwich structure. The conversion of titanium to titanium nitride causes a physical expansion in the layer involved. This serves to enhance the thickness of the barrier layer at all locations, but of particular significance at the corners of the contact well. A diffusion region of controlled depth and the deposition of minimal amounts of titanium remote from the contact side itself are advantageous results of the disclosed process.
TL;DR: In this article, a trench capacitor within an integrated circuit is provided which is filled with solid elemental metal, which is characterized by high electrical conductivity and can be used to form a metal contact or Schottky diode; contacts to the substrate; metal diffusion barrier layer; and interconnection metallization.
Abstract: A trench capacitor within an integrated circuit is provided which is filled with solid elemental metal. This metal-filled trench capacitor is formed by the following steps. First a trench is conventionally formed within a silicon substrate. A dielectric film is then blanket deposited onto the substrate and within the trench, so that the walls and bottom surface of the trench are completely covered. A metal-containing liquid solution is next deposited within the trench, and heated to a temperature sufficient to thermally decompose the metal compound within the liquid solution and drive off any solvent from the solution, thereby leaving a plate of elemental metal within the trench capacitor. The metal-filled capacitor is accordingly characterized by high electrical conductivity. The method may also be utilized to form a metal contact to a buried layer within an integrated circuit; a rectifying contact or Schottky diode; contacts to the substrate; metal diffusion barrier layer; and interconnection metallization.
TL;DR: The mechanism of failure of p+/n and n+/p junctions under AlSi/TiN/Ti and Al-Si/ZrN/ZR systems at contact holes has been investigated in this article when the total force of the barrier metal in the metallization system was defined as the product of the film stress and the film thickness.
Abstract: The mechanism of failure of p+/n and n+/p junctions under Al-Si/TiN/Ti and Al-Si/ZrN/Zr systems at contact holes has been investigated When the total force of the barrier metal in the metallization system, which is defined as the product of the film stress and the film thickness, is larger than 3×105 dyn/cm, the junction leakage current increases on p+/n diodes, but not on n+/p diodes after annealing at 500°C This increase is caused by the formation of dislocation loops in p+-Si The formation depends on the annealing temperature, the total force of barrier metal and the B concentration
TL;DR: In this paper, the authors reported superconducting transition of crystalline YBa2Cu3O7?? (123) films at 650°C on SiO2, but not on (100) Si substrates.
Abstract: By direct deposition onto hot substrates, using laser ablation, crystalline YBa2Cu3O7?? (123) was obtained at 650°C on SiO2, but not on (100) Si substrates. The 123 film did not show a superconducting transition due to interfacial reactions. The failure temperature of insulating buffer layers, such as tantalum oxide and hafnium oxide, is around 500 °C. Although MgO and BaZrO3 show a high stability in contact with 123 at 900 °C, they fail as a diffusion barrier at much lower temperatures. Below 400 °C barium diffuses through MgO, which itself remains unaffected. Using BaZrO3 the same happens around 700 °C. BaF2 fails as a diffusion barrier below 400 °C. Using laser ablation, high quality 123 films were grown on ZrO2 buffer layers above 650 °C. For the first time we report superconducting transitions of 123 deposited at 650 °C onto an amorphous metal alloy, Ir45Ta55. The problems encountered using conducting buffer layers are either a low reaction temperature with 123 (HfB2 and HfN) or oxidation of the metal alloy (Ir45Ta55) around 400 °C. Intermediate noble metal layers silver and Ag/Au/Ag could not prevent oxygen diffusion towards the underlying buffer layer.
TL;DR: In this paper, the fluorine atoms are distributed in an external protective diffusion barrier layer, and the diffusion gradient decreases from the external face surface of the material to the core region thereof.
Abstract: Ceramic superconductor materials, e.g., of rare earth/alkaline earth metal/transition metal/oxygen type, contain an effective stabilizing amount of fluorine atoms distributed therein in a concentration gradient decreasing from the external face surface of the material to the core region thereof; advantageously the fluorine atoms are principally distributed in an external protective diffusion barrier layer.
TL;DR: In this paper, a 50 nm TiNx(x≊1) layer is observed to be an effective diffusion barrier up to about 500°C between Cu and CoSi2.
Abstract: Thermally induced interactions of Cu with CoSi2, with and without interposed TiNx layers, have been studied using Rutherford backscattering spectrometry, Auger electron spectroscopy, and x‐ray diffraction. Cu diffuses through a preformed CoSi2 layer to form the structure Cu/CoSi2/Cu3Si/Si at temperatures above 300 °C, and no dissociation of CoSi2 occurs. A 50 nm TiNx(x≊1) layer is observed to be an effective diffusion barrier up to about 500 °C between Cu and CoSi2.
TL;DR: In this paper, the activation energies of formation for NbCx and NbSiy, phases were determined from these measurements, and the results suggest that A12O3 may be a promising diffusion barrier between Nb and Ta metal matrices and SiC ceramic reinforcements.
Abstract: Interdiffusion and reactions occurring at high temperatures between refractory metals (Nb and Ta) and ceramic materials (SiC and A12O3) have been investigated. Diffusion couples were fabricated by depositing Nb and Ta films of ~l-μm thickness onto polished ceramic substrates. These diffusion couples were vacuum annealed at high temperatures for various times. Interfacial reactions were evaluated using optical metallography, Auger electron spectroscopy (AES), scanning electron microscopy (SEM), and transmission electron microscopy (TEM). Kinetic studies in the 800 °C to 1200 °C temperature range for the Nb/SiC system indicated that Nb2C initially forms, followed by the more stable NbCxSiy phase. In some instances, layered structures containing the phases NbC, Nb2C, and NbCxSiy, were observed. The activation energies of formation for the NbCx and NbCxSiy, phases were determined from these measurements. Results from the Ta/SiC system were found to be similar to those from the Nb/SiC system. In both Nb/Al2O3 and Ta/Al2O3 diffusion couples, annealing for up to 4 hours in the 1100 °C to 1200 °C range did not result in any significant reactions. These results suggest that A12O3 may be a promising diffusion barrier between Nb and Ta metal matrices and SiC ceramic reinforcements.
TL;DR: In this paper, a construction element for current conduction between adjacent flat, smooth and stacked high-temperature fuel cells containing a ceramic solid electrolyte is described, which construction element has a core (1) which determines the geometrical shape and is made of a heat-resistant nickel-base or iron-base alloy or of Cr, Mo, W or Fe or of heatresistant doped Ni3Si and, as a protective layer, a metallic casing (3) which cannot be oxidised by O2 at operating temperature and is also an interlayer made of
Abstract: Construction element for current conduction between adjacent flat, smooth and stacked high-temperature fuel cells containing a ceramic solid electrolyte, which construction element has a core (1) which determines the geometrical shape and is made of a heat-resistant nickel-base or iron-base alloy or of Cr, Mo, W or Fe or of heat-resistant doped Ni3Si and, as a protective layer, a metallic casing (3) which cannot be oxidised by O2 at operating temperature and is made of Au, Pd or Pt or an alloy of these elements, and also an interlayer (2) made of Ni3Si as a diffusion barrier between core (1) and casing (3).
TL;DR: In this article, a measuring cell for an electrochemical gas sensor having an electrolytic chamber and a measuring electrode as well as a counter electrode is presented, where a temperature sensitive element is provided in the immediate proximity of these passages and faces toward the ambient.
Abstract: The invention is directed to a measuring cell for an electrochemical gas sensor having an electrolytic chamber and a measuring electrode as well as a counter electrode. In the direction facing the ambient, the measuring electrode includes a diffusion membrane as well as a diffusion barrier. The diffusion barrier is made of a material which is a good conductor of heat and is provided with a plurality of passages. A temperature-sensitive element is provided in the immediate proximity of these passages and faces toward the ambient. With this configuration, the temperature dependency of the diffusion capacity of the gas sample passing through the diffusion barrier can be included in the processing of the signal indicative of the measurement.
TL;DR: In this article, thin films of Y1Ba2Cu3O7−x superconductor have been deposited on ZrO2, SrTiO3 and Si using XeCl pulsed excimer laser (λ = 308 nm).
TL;DR: In this paper, a multilament superconducting strand for use at industrial frequencies and made from an initial billet comprising an initial niobium-titanium alloy surrounded by an anti-diffusion barrier layer which is in turn surrounded by a copper-based matrix material, with the strand being made from the billet by successive stages of extrusion, wire-drawing, and assembly, wherein the strand includes 5×10 5 to 5 × 10 6 filaments each constituted by the super-conducting core reduced to a diameter in the range 50 nm to
Abstract: A multifilament superconducting strand for use at industrial frequencies and made from an initial billet comprising a superconducting core niobium-titanium alloy surrounded by an anti-diffusion barrier layer which is in turn surrounded by a copper based matrix material, with the strand being made from the billet by successive stages of extrusion, wire-drawing, and assembly, wherein the strand includes 5×10 5 to 5×10 6 filaments each constituted by the superconducting core reduced to a diameter in the range 50 nm to 150 nm, the filaments being separated from one another by a distance lying in the range 30 nm to 100 nm, which distance is occupied by the anti-diffusion layer and the matrix material. The matrix material contains in excess of 8% manganese when the anti-diffusion layer is made of niobium, or alternatively, the anti-diffusion layer may be of an iron-containing alloy with the matrix containing copper and nickel.
TL;DR: In this article, a method and apparatus for manufacturing a superconductor wire has a wire take-up spool and a feed speed control spool, where the wire passes through a container which holds a diffusion barrier material and is electrophoretically deposited onto the wire substrate and subsequently sintered.
Abstract: A method and apparatus for manufacturing a superconductor wire has a wire take-up spool and a feed speed control spool. A wire substrate is taken from the feed speed control spool and onto the take-up spool as the wire take-up spool is rotated. The wire passes through a container which holds a diffusion barrier material, where the diffusion barrier material is electrophoretically deposited onto the wire substrate and subsequently sintered. The wire is also passed through a container which holds a superconductor material suspended in solution, and a layer of the superconductor material is electrophoretically deposited onto the diffusion barrier. The grains of the superconductor layer are then magnetically aligned and sintered. Also, a silver coating is electrophoretically deposited onto the superconductor layer and sintered. A diffusion bonding inhibitor material is then applied to the silver coating. Then, the silver-coated superconductor wire is spooled and heated to four hundred degrees centigrade (400° C.) for (1) day to oxidize the superconductor layer.
TL;DR: In this paper, the diffusion barrier protected catalyst (DBPC) was proposed to improve the lifetime of Ni 3 N catalyst by incorporating gas-to-surface diffusion resistance and decreasing the NO component in the ambient gas phase to a greater extent than the CO component.
Abstract: In spite of its high activity in the initial period, Ni 3 N is easily oxidised to the deactivation product during the NO/CO reaction at 200°C. We propose a novel concept, the «diffusion barrier protected catalyst» (DBPC), by which this active but sensitive catalyst can survive as long as the atmosphere surrounding the DBPC is reductive. Incorporation of gas-to-surface diffusion resistance magnifies the reducing atmosphere by decreasing the component of lower concentration (NO) in the ambient gas phase to a greater extent than the component of higher concentration (CO) so as to keep the surface metallic and active. The experimental results demonstrate that the DBPC method applied to the Ni 3 N catalyst improved not only the lifetime of the catalyst but also integrated turnover number (the total number of NO molecules reduced at one surface Ni atom until deactivation occurs), achieving at least a 330-fold increase
TL;DR: In this paper, a co-sputtering process is described for the deposition of WSi0.4 layers for Schottky gates of self-aligned MESFETs.
Abstract: A co-sputtering process is characterized which allows the deposition of WSi0.4 layers for Schottky gates of GaAs self-aligned MESFETs. The process parameters were optimized to yield films with low stress, good adhesion and a high interface stability during 800°C n+ implant activation anneal. The good diffusion barrier properties of the Schottky metal can be attributed to the amorphous nature of the film. This implies a natural explanation of the optimum film composition. Employing various analytical methods the gate metal/GaAs interface was characterized after 800°C anneal. I−V diode measurements were performed to obtain contact electrical properties such as barrier height and ideality factor. MESFETs with different channel implants down to 10 keV were fabricated to confirm the good stability of the Schottky contact.
TL;DR: In this article, Austrian Mn-Al alloys (20−32 W/O Mn, 7−10 Al, 2−3 Si, 1C) have satisfactory oxidation resistance up to 950°C under isothermal conditions in air.
Abstract: Austenitic Mn-Al alloys (20–32 W/O Mn, 7–10 Al, 2–3 Si, 1C) were found to have satisfactory oxidation resistance up to 950°C under isothermal conditions in air. Surface enrichment of aluminum is a necessary condition for obtaining an almost pure alumina scale for uses at higher temperatures. Four different Mn-steels were Al-coated by the Capuano electroplating process. In all the steels there was an increase in the hot-oxidation resistance. The best results were obtained with steels containing both Al and Si, and this for temperatures up to 1100°C. No spalling was noticed during rapid cooling of the test pieces. Silicon was found to act as a diffusion barrier to outward iron diffusion. It appears that there is formation of a pure, thin film of alumina from the matrix which interacts with the aluminum diffusing from the superimposed, coating for the formation of good bonds.
TL;DR: In this paper, a plated layer on a base metal layer was arranged to cover the corrosion of an Al electrode, forming a bump electrode shape of high precision, and realizing the high density arrangement of bump electrodes.
Abstract: PURPOSE: To completely cover the corrosion of an Al electrode, form a bump electrode shape of high precision, and realize the high density arrangement of bump electrodes, by arranging a plated layer on a base metal layer, and forming the bump electrodes on the surface flat part of the plated layer or the base metal layer CONSTITUTION: Negative type photo resist 7 is spread on a wafer 1, a region for forming a diffusion barrier metal layer 6 only is opened, and electroplating is performed, thereby forming a gold-plated film 8 The formation of said plated layer is stopped when the thickness becomes equal to that of the photo resist 7, and photo resist 9 is spread on the resist 7 and the layer 8, thereby forming an aperture part 9a on the flat part of the plated film 8 In this state, electroplating of gold is again performed on the plated film 8; the photoresist 7 and the photo resist 9 are finally eliminated; a bonding metal layer 5 is etched and a bump electrode 10 is completed COPYRIGHT: (C)1992,JPO&Japio
TL;DR: In this paper, the effect of deposition pressure and controlled oxygen dosing on the diffusion barrier performance of thin film Ta to Cu penetration was investigated, and it was shown that the barrier failure temperature is dependent upon the deposition conditions and oxygen contamination at the Ta/Cu interface.
Abstract: The effect of deposition pressure and controlled oxygen dosing on the diffusion barrier performance of thin film Ta to Cu penetration was investigated. In-situ resistivity, Auger compositional profiling, scanning electron microscopy and cross-sectional transmission electron microscopy were used to determine the electrical, chemical and structural changes that occur in Cu/Ta bilayers on Si upon heating. A 20 nm Ta barrier allowed the penetration of Cu at temperatures ranging from 320 to 630°C depending on processing conditions. Barrier failure temperature is dependent upon the deposition pressure and oxygen contamination at the Ta/Cu interface. This indicates the importance of understanding how deposition conditions affect diffusion barrier performance.