TL;DR: In this article, a method and an apparatus are provided for performing growth of compound thin films by alternately repeating separate surface reactions of the substances comprising the compound, and a carrier gas affects a diffusion barrier between the surface reaction steps to separate them from each other.
Abstract: A method and an apparatus are provided for performing growth of compound thin films by alternately repeating separate surface reactions of the substances comprising the compound. A carrier gas affects a diffusion barrier between the surface reaction steps to be separated from each other. The gas phase diffusion barrier is also applied to separate the source regions of different reacting vapors both from each other and from the surface reaction zone.
TL;DR: The concept of a diffusion barrier is discussed in this article in the context of thin-film metallization systems, and the conditions that an effective thinfilm diffusion barrier should meet are enumerated.
Abstract: The concept of a diffusion barrier is discussed in the context of thin‐film metallization systems. The conditions that an effective thin‐film diffusion barrier should meet are enumerated. The dominant role of defects in determining the kinetic properties of a barrier layer is pointed out, and the consequent importance of the method of deposition and the parameters prevailing during deposition are stressed. Examples of the practically important cases of the stuffed barrier, the passive compound barrier, and the sacrificial barrier are given, with special emphasis on the latter as applied to Al contacting of silicide layers. Unconventional ways of forming multiple or novel diffusion barriers are briefly mentioned as well.
TL;DR: In this paper, the authors demonstrate the thermal stability of titanium nitride as a high-temperature diffusion barrier, and demonstrate that no degradation of cell performance is observed after the same heat treatment if the TiN layer is ≳1700 A.
Abstract: To demonstrate the thermal stability of titanium nitride as a high‐temperature diffusion barrier, the TiN‐Ti‐Ag metallization scheme has been tested on shallow‐junction (∼2000 A) Si solar cells. Electrical measurements on reference samples with the Ti‐Ag metallization scheme show serious degradation after a 600 °C, 10‐min annealing. With the TiN‐Ti‐Ag scheme, no degradation of cell performance is observed after the same heat treatment if the TiN layer is ≳1700 A. The glass encapsulation of cells by electrostatic bonding requires such a heat treatment.
TL;DR: In this paper, the effect of oxygen impurities on the Ni/Ni2Si interface has been investigated via ion implantation using x-ray photoelectron spectroscopy (XPS), 4He + backscattering, and 16O(d,alpha)14N nuclear reactions.
Abstract: The effect of oxygen impurities on the Ni/Ni2Si interface has been investigated via ion implantation using x-ray photoelectron spectroscopy (XPS), 4He + backscattering, and 16O(d,alpha)14N nuclear reactions. Oxygen dosages corresponding to peak concentrations of 1, 2, and 3 atomic percent were implanted into Ni films evaporated on Si (100) substrates. The oxygen, nickel, and silicon core lines were monitored as a function of time during in situ growth of the Ni silicide to determine the chemical nature of the diffusion barrier known to form in the presence of oxygen impurities. It is shown that neither Ni oxide or mixed compounds such as Ni2SiO4 are involved in the barrier formation. The data demonstrate that as the advancing Ni/Ni2Si interface encounters oxygen in the Ni film, silicon suboxides (Si2O3, Si2O, and SiO) are formed. As more oxygen is encountered, Si takes on a full coordination of oxygen, forming SiO2. When a sufficient layer of SiO2 has formed, Ni metal is no longer able to diffuse through to the Si/Ni2Si interface to continue the solid phase reaction. It has been determined under UHV annealing conditions that the amount of oxygen necessary to stop the Ni diffusion is 2.2×10^16 O/cm^2. These experiments also provide a novel approach for synthesizing Si oxides and suboxides in a metallic matrix for examining relaxation effects in XPS as well as providing model compounds for Si/SiO2 interfacial studies.
TL;DR: In this paper, a nuclear fuel element consisting of a zirconium or ZIRconium alloy container and nuclear fuel pellets is provided for use in the core of a nuclear reactor.
Abstract: A nuclear fuel element consisting of a zirconium or zirconium alloy container and nuclear fuel pellets is provided for use in the core of a nuclear reactor. The zirconium or zirconium alloy container has an inner coating of copper in proximity to the nuclear fuel, and is separated from the zirconium or zirconium alloy by an intermediate zirconium oxide diffusion barrier layer. The copper layer and the intermediate zirconium oxide diffusion barrier of the composite cladding reduce perforations or failure in the zirconium or zirconium alloy cladding substrate caused by stress corrosion cracking or metal embrittlement. Good bonding of the copper to the oxide zirconium and zirconium alloy prevents scaling of copper from the composite cladding during the loading of the fuel element with fuel pellets.
TL;DR: A wire filament or multifilament wire or cable having an expanded metal or foraminous metal concentrically or semiconcentrically layered along the length of the wire so that the spaces or holes in the metal open radially of the filament as mentioned in this paper.
Abstract: A wire filament or multifilament wire or cable having an expanded metal or foraminous metal concentrically or semiconcentrically layered along the length of the wire so that the spaces or holes in the metal open radially of the wire or filament. The expanded or foraminous metal can be used in said wires or filaments as a strengthening layer, a conducting layer, or a diffusion barrier layer.
TL;DR: In this article, a scanning Auger microanalysis was conducted on the surface and in depth on the thin film structure before and after heating at 300 ˚C for 4 h. This characterization has led to improved understanding of the bonding problems and variation of contact resistance with this metallization system.
Abstract: The gold–nickel–copper system, with nickel the intended diffusion barrier, has been used extensively in the electronics industry for wire spring connectors, thin films on ceramic, and connectors on printed circuit boards. Although no visible contamination can be seen on the surface of the gold, poor bonding or high contact resistance frequently occurs. It has been assumed that some grain boundary diffusion of nickel has been occurring through the 2 μm gold film. A scanning Auger microanalysis was conducted on the surface and in depth on the thin film structure before and after heating at 300 °C for 4 h. Two‐dimensional Auger analysis, after heating, showed the nickel to be distributed along the grain boundaries on the surface of the gold film. Subsequent Auger depth profiling showed the nickel layer to be oxidized and approximately 50 A in depth. This characterization has led to improved understanding of the bonding problems and variation of contact resistance with this metallization system.
TL;DR: In this paper, the formation of refractory metal (tungsten, molybdenum and tantalum) silicides by reaction of the metal with crystalline and polycrystalline silicon at temperatures above 900°C indicates that WSi2 formation can be inhibited by certain processing techniques.
Abstract: An investigation of the formation of refractory metal (tungsten, molybdenum and tantalum) silicides by reaction of the metal with crystalline and polycrystalline silicon at temperatures above 900°C indicates that WSi2 formation can be inhibited by certain processing techniques. These techniques utilize the growth of an SiO2 diffusion barrier about 20 A thick on crystalline silicon and the deposition of tungsten films in vacuum ambients that will ensure oxygen incorporation (P ≥ 2 × 10−7 Torr). The reactivity of vacuum-deposited tungsten films results in the formation of an isolating oxide between the deposited silicon and tungsten films and the maintenance of the stability of the SiO2 diffusion barrier between tungsten films and a crystalline silicon substrate. This barrier is effective up to 1050°C in hydrogen ambients containing 15–20 ppm H2O. These procedures, however, are ineffective in preventing the formation of MoSi2 or TaSi2 at or above 900°C. A possible explanation for these results is that the tungsten film contains some level of oxygen due to the gettering of residual oxygen in the vacuum. In addition, the outgassing of the silicon source may enhance the level of oxygen at the evaporated W-Si interface. When the composite layer is annealed at high temperatures in a hydrogen ambient, the oxygen diffuses readily out of the bulk of the tungsten film to the interface, probably forming Sio2 which is more stable than WO3. The resulting thin SiO2 film has sufficient integrity to prevent silicon diffusion into the tungsten, thereby preventing WSi2 formation. This property of tungsten makes it inherently useful for buried-metal films in silicon devices.
TL;DR: In this paper, a fabrication technique for making various devices in which a certain type of glass is used as a surface protection layer is described for optical type devices and certain semiconductor devices.
Abstract: A fabrication technique is described for making various devices in which a certain type of glass is used as a surface protection layer. The glass layers are formed by particle bombardment (generally sputtering or E-beam) of a glass target. Devices with such surface layers are also described. Such glass layers are highly advantageous as encapsulating layers, diffusion barrier layers, etc., particularly for optical type devices and certain semiconductor devices. Particularly important is the preparation procedure for the glass target used in the bombardment process. The glass layers are moisture stable, act as excellent barriers against diffusion, and are usable up to quite high temperatures (i.e., in diffusion doping procedures) without cracking or peeling. The glass layers also provide long-term protection against atmosphere components including water vapor, oxygen, atmosphere pollution contaminants, etc., and can be removed by standard etching techniques.
TL;DR: In this paper, the interdiffusion of vacuum-deposited Cu/Ni bilayers is investigated for annealing at temperatures from 500 to 800°C Backscattering spectra, electrical sheet resistance data and X-ray analysis confirm independently that strong inter-diffusion sets in at 400°C after annealed for 15 min and conclude that thin nickel films will not perform as reliable diffusion barrier for copper in metallization schemes with silicon
TL;DR: In this article, the Schottky barrier diodes and test samples for metallurgical studies have been prepared by e-gun evaporation of various thin metal films.
Abstract: Schottky barrier diodes and test samples for metallurgical studies have been prepared by e-gun evaporation of various thin metal films. We have characterized the diodes by the barrier height as determined from forward IV measurements. The concentration profiles of the elements have been investigated by 2 MeV He+ backscattering. In agreement with earlier investigations we have found the structures 111Si/Pd2Si/Al and 111Si/PtSi/Al to be electrically and metallurgically unstable upon annealing. Ti is shown to stabilize the barrier height by acting as a sacrificial barrier between Al and the silicides.
TL;DR: In this article, rare earth disilicide Schottky barriers are used as low resistance contacts (Schottky barrier of ≲0,4 eV) to n-type Si and high resistance contacts to p-type si.
Abstract: Rare earth disilicide Schottky barriers are used as low resistance contacts (Schottky barrier of ≲0,4 eV) to n-type Si and high resistance contacts (Schottky barrier of > 0,7 eV) to p-type Si. High (≳0,8 eV) and low (≲ 0,4 eV) energy Schottky barriers can be formed contemporaneously on an n-doped silicon substrate. Illustratively, the high energy Schottky barrier is formed by reacting platinum or iridium with silicon; the low energy Schottky barrier is formed by reacting a rare earth with silicon to form a disilicide. A composite layer of Pt on W is an effective diffusion barrier on Gd and prevents the Gd from oxidation.
TL;DR: In this article, the gate electrodes (28, 38) are formed from a polysilicon layer (128), which is then covered by a mask including a silicon oxide layer (130) and a silicon nitride layer (132).
Abstract: In a process for forming a CMOS integrated circuit (10) having polysilicon gate electrodes (28, 38) the polysilicon gate electrodes (28, 38) are simultaneously doped with impurities of a single conductivity type, independently of the semiconductor substrate (18). The invention enables the avoidance of the penetration problem which arises when boron is utilized to dope polysilicon. After forming the gate electrodes (28, 38) from a polysilicon layer (128), they are covered by a mask including a silicon oxide layer (130) and a silicon nitride layer (132). Then sources (22, 34) and drains (24, 32) of the n-channel and p-channel transistors (12, 14) are formed and an implantation or diffusion barrier (148) is grown over the sources (22, 34) and drains (24, 32). The mask (130, 132) is removed over the gate electrodes (28, 38) which are then doped with an n-type impurity. Polysilicon resistors (50) may be formed by initially doping the polysilicon layer (128) to a low level of conductivity and protecting the resistor areas (50) by a further mask (138), which may be of polysilicon or silicon nitride, during subsequent doping to a high level of conductivity.
TL;DR: In this paper, a method for producing a superconductive wire of multifilaments having components comprising niobium and aluminum encased in copper or a copper alloy, wherein the multifilament configuration and the formation of a super-conductive Al5 phase are positively developed from the components disposed in a copper or copper alloy tube having an interior metallic coating serving as a diffusion barrier, by cold forming and subsequent heat treatment.
Abstract: A method for producing a superconductive wire of multifilaments having components comprising niobium and aluminum encased in copper or a copper alloy, wherein the multifilament configuration and the formation of a superconductive Al5 phase are positively developed from the components disposed in a copper or copper alloy tube having an interior metallic coating serving as a diffusion barrier, by cold forming and subsequent heat treatment.
TL;DR: In this article, the formation of nickel silicides and vanadium silicides were studied for annealed metal films deposited on silicon substrates by depth profiling using secondary ion mass spectrometry and X-ray diffraction.
TL;DR: In this paper, a bonding pad metallization for stress sensitive semiconductor devices such as semiconductor lasers or the like is proposed, with a diffusion barrier layer which inhibits the migration of conventional bonding materials such as indium solder.
Abstract: The invention is directed to a bonding pad metallization for stress sensitive semiconductor devices such as semiconductor lasers or the like. An attendant advantage is a diffusion barrier layer which inhibits the migration of conventional bonding materials such as indium solder.
TL;DR: In this paper, the penetration of platinum into silicon in the Ti/Pt/Au beam lead metallization system was investigated using scanning electron microscopy, electron probe microanalysis and X-ray diffraction.
TL;DR: The interface between silicon and thermally grown silicon dioxide is almost certainly the best studied solid-solid interface known as discussed by the authors, and a precise control of the thickness of the oxide layer and its dielectric properties is necessary for the successful fabrication of silicon devices.
Abstract: The interface between silicon and thermally grown silicon dioxide is almost certainly the best studied solid-solid interface known. For silicon devices, we must produce oxides on silicon that are highly stable, present a diffusion barrier to undesired impurities, and form an interface with the silicon substrate that has a low density of fixed charge and interface traps. In addition, a precise control of the thickness of the oxide layer and its dielectric properties is necessary for the successful fabrication of silicon devices.
TL;DR: In this paper, a diffusion barrier is proposed to prevent the diffusion of silicon into the metal layer or layers from the semiconductor body, which is composed of the boride, carbide or nitride of a transition metal from one of the groups IVb, Vb or VIb of the periodic system of the elements.
Abstract: If the known contact arrangements for semiconductor components are heated to a relatively high temperature for a prolonged period during manufacture or while in use, the electrical resistance increases and the outer metal layer or layers becomes/become brittle, which reduces the mechanical strength. The reason for this is the diffusion of silicon into the metal layer or layers from the semiconductor body. To prevent this diffusion, a layer (13) is proposed which is effective as a diffusion barrier for silicon and which is situated between the semiconductor body (10) or the first layer (12) of the contact arrangement and the outer metal layer (14). This diffusion barrier is composed of the boride, carbide or nitride of a transition metal from one of the groups IVb, Vb or VIb of the periodic system of the elements. It has been shown that this layer prevents the diffusion of silicon even at those temperatures which are far above the temperatures necessary during the manufacture of the semiconductor component.
TL;DR: To achieve the desired Cr-Cr202/Al-Cu laminate chip metalization, first Cr is deposited with the evaporation chamber back-filled with water vapor to a partial pressure of 1 to 4 × 10¿3 Pa, followed by standard Al Cu evporation, lift-off or subetch, sinter, and insulation processing.
Abstract: To achieve the desired Cr-Cr202/Al-Cu laminate chip metalization, first Cr is deposited with the evaporation chamber back-filled with water vapor to a partial pressure of 1 to 4 × 10?3 Pa. This is followed by standard Al Cu evaporation, lift-off or subetch, sinter, and insulation processing. The critical process step of bleeding in water vapor during Cr evaporation has to be maintained at an optimum because too much Cr202 will lead to high contact resistance and too little Cr202 will lead to a loss of diffusion barrier effectiveness. It is during the sintering cycle that 'Cr' diffusion into the Al-Cu metallization structure occurs along with formation of limited amounts of Al2O03 TThe presence of Al and Cr oxides in turn limits the formation of Cr and Al intermetallics. This results in an acceptable sheet resistance of the metallization structure. Accelerated testing of interconnecting stripes and various sizes of metal contacts to resistor and transistor devices at different temperature and current levels has been completed. As for Al-Cu metallization test results for Cr-Cr203/Al-Cu can be represented by tf J?n exp(?H ÷ kT) where J is the current density, T is the temperature, k is the Boltzman constant, ?H is the activation energy and n is the current exponent. Thus at constant temperature J2 = J1 × (tf1 ÷ tf2)1/n and since for Cr-Cr203/Al-Cu metallurgy the testing done supports an improvement in electromigration lifetime of 1OX, an activation energy of 0.
TL;DR: In this article, the first layer of the contact is formed prior to passivation, and the second layer is formed after passivation by an oxidizable metal layer and an insulating oxide layer.
Abstract: Metallic contacts to compound semiconductor devices which employ a native oxide for passivation are provided. The metallic contacts of the invention comprise at least two metal layers: a first layer making non-rectifying contact with the semiconductor surface and providing a diffusion barrier and a second layer thereon comprising an easily oxidizable metal. A low resistivity metal layer may optionally be interposed between the two metal layers for improved conductivity. The metallic contact is formed prior to passivation. The diffusion barrier layer prevents diffusion of potentially deleterious materials into the semiconductor, while exposed portions of the oxidizable metal form an insulating oxide during anodic passivation in an electrolyte. The insulating oxide prevents disruption of the electric field distribution in the electrolyte, thereby eliminating passivating oxide and device non-uniformities commonly encountered in the formation of prior art metallic contacts and providing more uniform semiconductor oxide thickness.
TL;DR: In this paper, the authors describe a method for making Xener diodes from silicon wafers of a first conductivity type by chemical vapour deposition of a doped polysilicon layer at below 700 deg.C.
Abstract: Xener diodes are made from silicon wafers of a first conductivity type by chemical vapour deposition of a doped polysilicon layer of second conductivity type at below 700 deg.C; heat treating the wafers at not more than 950 deg.C to diffuse the dopant no more than a few dozen microns into the wafers; removing the wafers from the furnace depositing metal contact layers and encapsulation in a process involving heating the wafers to about 650 deg.C. Pref. the wafers are deoxidised prior to CVD, and are encapsulated in glass after deposition of the contacts, and the metallisation is CVD Ti and Ag formed first by CVD then by electroplating. Esp. for mfr. of Xener diodes of tension less than 3V breakdown potential, i.e. having an extremely abrupt junction. By keeping the encapsulation temp. to 650 deg.C, and using higher melting metals than Al of prior art for the metallisation, problems of short circuiting due to diffusion of metallisation metal during encapsulation are avoided. The polycrystalline Si protects the diffused layer since should the contact metallisation diffuse into the underlying semiconductor layer, it diffuses only into part of the polysilicon layer. This layer also forms a source for the dopant. The diodes can be reproduced satisfactorily on an industrial scale.
TL;DR: In this article, the authors present a method for the heat treatment of composite materials which have a parent material of unalloyed or alloyed steel and a facing material of molybdenum or tantalum.
Abstract: Method for the heat treatment of composite materials which have a parent material of unalloyed or alloyed steel and a facing material of molybdenum or tantalum. For protection during the heat treatment, a protective layer is applied before the heat treatment to the facing layer by plating, in particular explosion plating. The protective layer consists of a material which does not react with the facing layer at the temperatures of the heat treatment and forms a diffusion barrier for oxygen and nitrogen. After the hot working, this material can be removed by etching, grinding or the like.
TL;DR: In this paper, a mask is made using a silicon wafer, which is coated with a thin, p+ doped Si Layer(a), and the troughs of holes are covered with an electrically and thermally conducting material(I), which resists attack by the ions, and has a thickness which prevents the ions from entering the silicon(a,b). Material (I) does not cause any deformation of the mask due to temp changes or internal stress.
Abstract: The mask is made using a silicon wafer(b), which is coated with a thin, p+ doped Si Layer(a). Wafer(b) contains troughs so it forms a grid of ribs below layer(a), which contains through holes(c) extending into the troughs. The bores of holes(c) and the surface of layer(a) are covered with an electrically-and thermally- conducting material(I), which resists attack by the ions, and has a thickness which prevents the ions from entering the silicon(a,b). Material (I) does not cause any deformation of the mask due to temp. changes or internal stress. Material (I) absorbs ions, and is esp. tungsten or tantalum; but a combination of materials which absorb or resist ions may be used. A diffusion barrier of Si3N4 may be located between material (I) and layer(a). Extremely small semiconductor devices can be made using masks which are dimensionally stable and which do not contaminate semiconductors being treated by ions.
TL;DR: In this article, the interfacial reactions between different metals and silicon wafers with a thin oxide layer have been investigated using Auger and ESCA sputter profiling, and it was found that the 30 A thermal oxide was an effective diffusion barrier for Pt but less effective for Au.
Abstract: The reactions that occur between different metals and silicon wafers with a thin oxide layer have been investigated. The oxides were formed by either exposing the chemically cleaned wafer to air at room temperature or by thermally growing 30 A of oxide at 700 °C in dry O2. Al, Pt, and Au contacts were investigated. The interfacial reactions before and after heat treatment at 400 °C for 1 h were characterized using Auger and ESCA sputter profiling. The air grown oxides were found not to prevent intimate contact between the metal and the silicon, and reactions were observed for both heat treated and unheated samples. At 400 °C the 30 A thermal oxide was found to be an effective diffusion barrier for Pt but less effective for Au. The Al reduced the 30 A of SiO2 to form Al2O3 at the interface in what appeared to be a self‐limiting reaction. A comparison between the reactions observed on air grown oxides and 30 A of thermally grown oxide are consistent with observations that the room temperature oxides are not as fully formed as oxides grown at 700 °C.