Topic
Depaneling
About: Depaneling is a research topic. Over the lifetime, 35 publications have been published within this topic receiving 251 citations. The topic is also known as: depanelling & depanel.
Papers
TL;DR: In this paper, an efficient heuristic is developed that determines the component placement sequence, also referred to as the placement path, which best resembles a Traveling Salesman Problem and is tested against a previously published subproblem as well as a real-life working board configuration.
Abstract: This paper proposes a sequencing approach to develop a competent path for the printed circuit board assembly process. An efficient heuristic is developed that determines the component placement sequence, also referred to as the placement path. This NP-complete problem best resembles a Traveling Salesman Problem.1 Thus, it is inherently difficult. The heuristic approach is tested against a previously published subproblem as well as a real-life working board configuration. This heuristic is intended to provide a good, feasible component placement sequence for the assembly of a batch of printed circuit boards with a machine configuration consisting of a moveable X-Y positioning table and a tape-and-reel sliding feeder rack. Even with high speed assembly machines placing in excess of 40000 components per hour (cph), process improvements are possible by increasing the efficiency of the planned placement sequence. This heuristic is developed to identify an improved component placement sequence in a reasonable computation time to allow for future implementation of the methodology in applied situations where time constraints are unavoidable.
33 citations
TL;DR: The objective is tominimize the weighted sum of each assembly PCBcycle time, which is defined as the maximum time a PCB has to spend on each machine, with Lagrangian relaxation techniques.
Abstract: This paper considers the placement of components onto printed circuit boards (PCBs) using surface mount technology. Multiple automatic placement machines, a variety of PCB types and a large volume for each PCB type characterize the environment studied. The problem addressed is that of allocating and arranging the components on several placement machines, organized into one or several assembly lines, while considering a different assembly time if components are located at different feeder locations. The one assembly line problem is equivalent to balancing a multi-model assembly line where models are assembled in small batches without component rearrangement between model changes. The objective is tominimize the weighted sum of each assembly PCBcycle time, which is defined as the maximum time a PCB has to spend on each machine. We solve this problem with Lagrangian relaxation techniques. Industrial case study results are presented. We also compare the global performance of five placement machines if they ar...
23 citations
Patent•
3 Jun 1999TL;DR: A system for manufacturing a print board assembly, which is implemented in a system having a computer for storing parts insertion instruction diagrams and displaying parts insertion instructions, and a soldering unit for soldering a printed circuit board, includes assembling different types of the printed circuit boards from pieces of parts and inspecting them in a multitude of cells as discussed by the authors.
Abstract: A system for manufacturing a print board assembly, which is implemented in a system having a computer for storing parts insertion instruction diagrams and displaying parts insertion instructions, and a soldering unit for soldering a printed circuit board, includes: assembling different types of the printed circuit boards from pieces of parts and inspecting them in a multitude of cells; installing different types of the printed circuit boards in carriers to assemble them separately according to the parts insertion instructions displayed by the computer of each cell, and moving them to the soldering unit through a transfer conveyor line; and returning the carriers having the printed circuit boards completely soldered to each cell identified for the carriers through a return conveyor line.
18 citations
Patent•
26 Feb 1997
TL;DR: In this paper, individual printed circuit boards are moved as a group, after being routed from a panel (111), to a registration nest (140) for holding the individual PCBs until a subsequent processing station is ready to receive a printed circuit board.
Abstract: Individual printed circuit boards (114) are routed from a panel comprised of an array of printed circuit boards. The individual printed circuit boards are moved as a group, after being routed from the panel (111), to a registration nest (140) for holding the individual printed circuit boards. The printed circuit boards rest in the registration nest until a subsequent processing station is ready to receive a printed circuit board. At the appropriate time, each printed circuit board is moved one at a time to a subsequent processing station. A second group of printed circuit boards is routed from a second panel while the first group of printed circuit boards rests in the registration nest and is moved one at a time to the subsequent processing station. A sensor reads features on the panel or on individual printed circuit boards and the routing program is modified or stopped in response to certain panel features.
18 citations
16 Jul 2003
TL;DR: In this article, the authors described the process, materials, and solder joint formation of package stacking as part of the SMT process, where two packages are placed on top of each other during the traditional surface mount placement process and then soldered together during the surface mount technology reflow.
Abstract: The need for continued miniaturization, functional densification and integration in handheld electronics products provides the strong incentive for printed circuit board (PCB) assembly in three-dimensions (3D). One way to accomplish 3D assembly is through the use of die stacking in chip scale packages (CSP), where the dice are stacked internally in the package. The other way to accomplish 3D assembly is through the use of package stacking. This is the process where two packages are placed on top of each other during the traditional surface mount placement process and then soldered together during the SMT (surface mount technology) reflow. In this paper, package stacking as part of the SMT process is described. The process, materials, and solder joint formation are characterized, and key issues highlighted.
18 citations
Related Topics (5)
Performance Metrics
| Year | Papers |
|---|---|
| 2017 | 1 |
| 2015 | 3 |
| 2013 | 3 |
| 2012 | 1 |
| 2009 | 1 |
| 2008 | 1 |