Abstract: An apparatus, program product and method incorporate into an enhanced programmable core model (42) an embedded debug monitor (52) to provide integrated graphical debugging functionality in the model. The debug monitor (52) supports the performance of one or more debug operations on the programmable core model (42) during simulation thereof. In addition, the debug monitor (52) is configured to receive a debug parameter from a user through a graphical user interface (44), and report a result of the debug operation to a user via the graphical user interface (44). Through the use of a graphical user interface (44), interaction with a user is greatly facilitated. Moreover, by embedding the debug monitor (52) within the programmable core model (42), a completely integrated simulation and debug environment may be provided to a user, with debugging functionality similar to that available to software developers and hardware-based processor designers. As a result, validation of a model's performance can be performed more efficiently and with less effort.

Abstract: Book Outline Chapter 1 Specification Product definition Performance constraints and objectives Cost objectives Schedule Hardware options Operating System options Development tool options Chapter 2 Partition Identifying software and hardware elements Determining optimal partitioning between software and hardware Risk management Modeling system behavior Chapter 3 Design phase Hardware design ASICs Boards FPGA's Custom integrated circuits Processor and memory systems Firmware design for low-level hardware driver code Software design to implement the product functionality Chapter 4 Integration phase Marrying hardware prototypes and software Integration and Debug Chapter 5 Validation phase Testing against compliance standards Measuring against performance objectives Return to development phase to correct any performance shortcomings Testing mission critical software for compliance to safety standards Chapter 6 Release Revision control for design software and schematics Final product testing Abuse Environmental RFI compliance Black-box White box Chapter 7 Maintenance and upgrades Product Release Customer Feedback Periodic enhancements or repairs Different design tearns for product support

Abstract: Methods, systems, and articles of manufacture consistent with the present invention provide a development tool that enables computer programmers to design and develop a data flow program for execution in a multiprocessor computer system. The tool allows the programmer to define a region divided into multiple blocks, wherein each block is associated with data operated on by code segments of the data flow program. The development tool also maintains dependencies among the blocks, each dependency indicating a relationship between two blocks that indicates that the portion of the program associated with a first block of the relationship needs the resultant data provided by the portions of the program associated with a second block of the relationship. The development tool supports several debugging commands, including insertion of multiple types of breakpoints, adding and deleting dependencies, single stepping data flow program execution, and the like.

Abstract: A method, apparatus and article of manufacture is provided for debugging within a computer system network. The method uses XML dataflows from/to a console for debugging of instructions located in a server, which has a database management system for retrieving data from a database stored in an electronic storage device coupled to the server. The method uses a debugger manager at the console for commanding and monitoring debugging operations of the server-side instructions, performed by a debugger engine, and uses XML command and status report dataflows for providing a database communication interface between the debugger manager and the debugger engine. Some preferred embodiments use stored procedures in addition to the XML dataflows, and the debugger manager executes in a multi-threaded environment.

Abstract: A software system and method, using a coordination-centric approach, for debugging distributed software environments is described, wherein the distributed software environment produces event traces to be analyzed by a debugging host. Distributed software environments are connected to debugging hosts either directly or indirectly. In a direct connection, a processing element's runtime system collects event records and sends them to a primary runtime debugging architecture, where the event records are time-stamped and causality-stamped and transferred to an event queue on the debugging host. An indirect connection uses an intermediate runtime debugging architecture, which facilitates the transfer of event records from the processing element to the event queue. Event records also may be collected and stored on a flash memory for post-mortem distributed debugging. Event traces are made visible to the runtime system by inserting event recording calls at significant source lines in the distributed software environment.

Abstract: We describe ConTest, a tool for detecting synchronization faults in multithreaded Java™ programs. The program under test is seeded with a sleep(), yield(), or priority() primitive at shared memory accesses and synchronization events. At run time, ConTest makes random or coverage-based decisions as to whether the seeded primitive is to be executed. Thus, the probability of finding concurrent faults is increased. A replay algorithm facilitates debugging by saving the order of shared memory accesses and synchronization events.

Abstract: Since FPGAs are frequently used to improve the time to market for products, shortening the time for validating and debugging FPGA designs is, thus, important. Our paper discusses how directly instrumenting FPGA programming data, or bitstreams, with debugging hardware can improve the debugging productivity for designers and, thus, reduce a design’s time to market. We also provide some background relating to the current state of the art in debugging FPGA designs and describe how bitstream instrumentation can be automated using JHDL, JBits and JRoute. When instrumenting designs with embedded logic analyzers at the bitstream level, we have witnessed design modification speed-ups ranging from about 6 to 19 times over more conventional techniques. We will also briefly mention other applications of bitstream modification in debugging FPGA designs.

Abstract: A system, method and article of manufacture are provided for debugging a computer program. In general, a plurality of threads is identified in a computer program. Selection of one of the threads is allowed. The selected thread is then debugged.

Abstract: A system and method for implementing a debugging graphical program in a main graphical program. A user can associate a debugging graphical program with a wire in a data flow diagram in order to debug and/or analyze the main graphical program. This association does not change or require recompilation of the main graphical program. The debugging graphical program, or smart probe, receives the data from the main graphical program, analyzes this data, and can perform one of several actions. The debugging graphical program can display the data in the wire, generate statistics based on received data, log statistics or data to a file, or perform other analysis functions. The debugging graphical program can also cause the main graphical program into halting execution, entering single stepping mode, etc. The user may choose a debugging graphical program already present, or create one using graphical programming techniques.

Abstract: It has previously been claimed that agent technologies facilitate software development by virtue of their high-level abstractions for interactions. We address a more specific characterization and utility.We believe that it is important to distinguish agent technologies from other software technologies by virtue of a set of unique software characteristics. This is in contrast to much in the literature that concentrates on high-level characteristics that could be implemented with a variety of software techniques. Agent-based software engineering (ABSE), for at least an important class of agents and applications, can be characterized by both model and inner/outer language components. Our experience in developing applications based on longterm asynchronous exchange of agent messages, similar to typical email usage, leads us to believe these unique characteristics facilitate useful software development practices. The utility derives from a stratification of change among the components, ease of collaborative change and debugging even during runtime due to asynchronous text parsing-based message exchange, and reuse of the outer language as well as generic agents as a programming environment.

Abstract: In an authoring system, a user creates and edits a scenario for a robot by using a GUI screen and a mouse. An authoring tool converts the scenario into a mnemonic code called “RCODE”. When an RCODE action-control program is debugged, the RCODE program is extracted and encrypted step by step. The encrypted program is sequentially transferred to the robot by means of radio communication. The interpreter of the robot performs debugging by sequentially interpreting and executing the transferred program.

Abstract: A system and method for debugging a program which is intended to execute on a reconfigurable device. A computer system stores a program that specifies a function, and which is convertible into a hardware configuration program (HCP) and deployable onto a programmable hardware element comprised on the device. The HCP is generated based on the program, specifies a configuration for the programmable hardware element that implements the function, and further specifies usage of one or more fixed hardware resources by the programmable hardware element in performing the function. A test configuration is deployable on the programmable hardware element by a deployment program, where, after deployment, the programmable hardware element provides for communication between the fixed hardware resources and the program. The program is executable by a processor in the computer system, where during execution the program communicates with the one or more fixed hardware resources through the programmable hardware element.

Abstract: Model checking is a practical tool for automated debugging of embedded software. In model checking, a high-level description of a system is compared against a logical correctness requirement to discover inconsistencies. Since model checking is based on exhaustive state-space exploration and the size of the state space of a design grows exponentially with the size of the description, scalability remains a challenge. We have thus developed techniques for exploiting modular design structure during model checking, and the model checker jMocha (Java MOdel-CHecking Algorithm) is based on this theme. Instead of manipulating unstructured state-transition graphs, it supports the hierarchical modeling framework of reactive modules. jMocha is a growing interactive software environment for specification, simulation and verification, and is intended as a vehicle for the development of new verification algorithms and approaches. It is written in Java and uses native C-code BDD libraries from VIS. jMocha offers: (1) a GUI that looks familiar to Windows/Java users; (2) a simulator that displays traces in a message sequence chart fashion; (3) requirements verification both by symbolic and enumerative model checking; (4) implementation verification by checking trace containment; (5) a proof manager that aids compositional and assume-guarantee reasoning; and (6) SLANG (Scripting LANGuage) for the rapid and structured development of new verification algorithms. jMocha is available publicly at ; it is a successor and extension of the original Mocha tool that was entirely written in C.

Abstract: A logic model checker can be an effective tool for debugging software applications. A stumbling block can be that model-checking tools expect the user to supply a formal statement of the correctness requirements to be checked in temporal logic. Expressing non-trivial requirements in logic, however, can be challenging. To address this problem, we developed a graphical tool, called the TimeLine Editor, that simplifies the formalization of certain kinds of requirements. A series of events and required system responses are placed on a timeline. The user converts the timeline specification automatically into a test automaton that can be used directly by a logic model checker or for traditional test-sequence generation. We have used the TimeLine Editor to verify the call processing code for Lucent's PathStar access server against the TelCordia LSSGR [LATA (local access and transport area) Switching Systems Generic Requirements] standards. The TimeLine Editor simplified the task of converting a large body of English prose requirements into formal, yet readable, logic requirements.

Abstract: A debugging subsystem for testing a system-on-a-chip includes an embedded processor and memory and includes at least one debugging subblock monitors a bus between the processor and the memory to detect selected triggering events, counts the number of triggering events detected and when the number of triggering events reaches a predetermined threshold, generates a debugging signal.

Abstract: An active debugging environment for debugging a virtual application that contains program language code from multiple compiled and/or interpreted programming languages The active debugging environment is language neutral and host neutral, where the host is a standard content centric script host with language engines for each of the multiple compiled and/or interpreted programming languages represented in the virtual application The active debugging environment user interface can be of any debug tool interface design The language neutral and host neutral active debugging environment is facilitated by a process debug manager that catalogs and manages application specific components, and a machine debug manager that catalogs and manages the various applications that comprise a virtual application being run by the script host The process debug manager and the machine debug manager act as an interface between the language engine specific programming language details and the debug user interface

Abstract: Different program slicing methods are used for maintenance, reverse engineering, testing and debugging. Slicing algorithms can be classified as static slicing and dynamic slicing methods. In several applications the computation of dynamic slices is preferable, since it can produce more precise results. In this paper, we introduce a new forward global method for computing backward dynamic slices of C programs. In parallel to the program execution, the algorithm determines the dynamic slices for any program instruction. We also propose a solution for some problems specific to the C language (such as pointers and function calls). The main advantage of our algorithm is that it can be applied to real-size C programs, because its memory requirements are proportional to the number of different memory locations used by the program (which is in most cases far smaller than the size of the execution history which is, in fact, the absolute upper bound of our algorithm).

Abstract: A system and method for debugging a program which is intended to execute on a reconfigurable device. A computer system stores a program that specifies a function, and which is convertible into a hardware configuration program (HCP) and deployable onto a programmable hardware element comprised on the device. The HCP is generated based on the program, specifies a configuration for the programmable hardware element that implements the function, and further specifies usage of one or more fixed hardware resources by the programmable hardware element in performing the function. A test configuration is deployable on the programmable hardware element by a deployment program, where, after deployment, the programmable hardware element provides for communication between the fixed hardware resources and the program. The program is executable by a processor in the computer system, where during execution the program communicates with the one or more fixed hardware resources through the programmable hardware element.

Abstract: Debugging multi-threaded programs is notoriusly hard. Probably the worst type of bug occurring in multi-threaded programs is a data race. There is therefore a great need for tools to automatically detect data races during execution. This article presents, TRaDe, a novel approach to detect races in object-oriented languages using a topological approach. An implementation of TRaDe based on the Sun JVM 1.2.1 is compared with existing tools. TRaDe proves to be a factor 1.6 faster than any known race detection tool for Java and has memory requirements similar to the best competing tools.

Abstract: The verification of digital designs, i.e., hardware or embedded hardware/software systems, is an important task in the design process. Often more than 70% of the development time is spent for locating and correcting errors in the design. Therefore, many techniques have been proposed to support the debugging process. Recently, simulation and test methods have been accompanied by formal methods such as equivalence checking and property checking. However their industrial applicability is currently restricted to small or medium sized designs or to a specific phase in the design cycle. In this paper, we present a method for verifying temporal properties of systems described in an executable description language. Our method allows the user to specify properties about the system in finite linear time temporal logic. These properties are translated to a special kind of finite state machines which are then efficiently checked on-the-fly during each simulation run. Properties may be placed anywhere in the system description and violations are immediately indicated to the designer.

Abstract: Development of multithreaded applications is particularly tricky because of their non-deterministic execution behaviors. Tools that support the debugging and performance timing of such applications are needed. Key to the construction of such tools is the ability to repeat the nondeterministic execution behavior of a multithreaded application. A clean separation between the application and the system that runs it facilitates supporting that ability. This paper presents a platform for constructing such tools in a context in which any separation between the application and the underlying system (and between both and the platform's own instrumentation code) has been obscured. DejaVu supports deterministic replay of nondeterministic executions of multithreaded Java programs on the Jalapeno virtual machine (running on a uniprocessor). Jalapeno is written in Java and its optimizing compiler regularly integrates application, virtual machine, and DejaVu instrumentation code into unified machine-code sequences. DejaVu ensures deterministic replay through symmetric instrumentation-side-effect identical instrumentation in both record and replay modes-and remote reflection which exposes the state of an application without perturbing it.

Abstract: The present invention discloses a method and system of extracting relevant information from a collection of router configuration files and using the information to populate a data model. Each section of the router configuration files is read and parsed in a pre-specified order reflecting the dependencies within a single configuration file. Customized information about the network nodes, not reflected in the router configuration files, can be input as well into the data model. Consistency checks and policy checks can then be performed against the data. The data model provides a network-wide view of the topology and configuration, which is crucial for a variety of network engineering tasks.

Abstract: We introduce the notion of a slice of a distributed computation. A slice of a distributed computation with respect to a global predicate is a computation which captures those and only those consistent cuts of the original computation which satisfy the global predicate. We show that a slice exists for a global predicate iff the predicate is a regular predicate. We then give an efficient algorithm for computing the slice and show applications of slicing to testing and debugging of distributed programs.

Abstract: This article describes the implementation of a debugger for lazy functional languages like Haskell. The key idea is to construct a declarative trace which hides the operational details of lazy evaluation. However, to avoid excessive memory consumption, the trace is constructed one piece at a time, as needed during a debugging session, by automatic re-execution of the program being debugged. The article gives a fairly detailed account of both the underlying ideas and of our implementation, and also presents performance figures which demonstrate the feasibility of the approach.

Abstract: An Internet-based, secure communications system is utilized for enabling communications between a video game tester, project coordinator and others with a game developer A master bug log which compiles all uncovered bugs is accessible by a game developer and other authorized system users via a web server, which stores bug tracking system applications programs and associated data bases Such a master bug log includes a file attachment capability permitting a digitized image file replicating a video game display screen sequence depicting the bug, to be attached for downloading to, for example, a game developer Bugs may be sorted, for example, so that a game developer can retrieve only those bugs having a digitized file attachment Sorting may take placed based on any of a large number of fields entered in the master bug log The present exemplary embodiments permit customized fields to be added and used as sort criteria For example, in a racing game, bugs may be categorized and sorted based upon involvement with a particular vehicle or driver Game and debugging related messages may be exchanged between testers, project coordinators, and corporate contacts If the game developer normally communicates in, for example, Japanese, e-mail type format messages are translated so that significant game related messages may be promptly analyzed by all parties involved An editing function is advantageously utilized to permit, for example, a tester to enter a bug description and a project coordinator to edit the tester's description The illustrative embodiments of the present invention advantageously use multiple security layers to preclude one developer from accessing information related to a game under test developed by another developer

Abstract: Debugging concurrent Java programs is a difficult task because of multiple control flows and inherent nondeterminism. It requires techniques not provided by traditional debuggers such as tracing, visualization, and automated error analysis. Therefore, we have developed the JaVis environment for visualizing and debugging concurrent Java programs. The information about a running program is collected by tracing. The Unified Modeling Language (UML) is used for the visualization of traces. Traces are automatically analyzed for deadlocks. The tracing is implemented using the Java Debug Interface (JDI) of the Java Platform Debugger Architecture. The visualization is integrated into the UML CASE tool Together.

Abstract: A mechanism for debugging a transformation document is disclosed, wherein a debugging mechanism interacts with a user interface to enable a user to specify one or more breakpoints. The user may specify a breakpoint at a particular location in the transformation document or a source document. In addition, the user may specify one or more breakpoints using an expression, or based upon XSL messages. In addition to interacting with the user interface, the debugging mechanism also interacts with a transformation processor, which is the mechanism that actually processes the source and transformation documents to derive a result document. Before and after each processing action, the transformation processor sends a pre-action and a post-action message, respectively, to the debugging mechanism. The debugging mechanism uses the information in these messages to determine whether a breakpoint has been reached. If a breakpoint has been reached, then processing of the documents is halted until further instruction is received from the user. In this manner, the user is able to see intermediate processing results, which aids in debugging the transformation document.

Abstract: Although software engineers have enjoyed tremendous productivity increases as more of their tasks have become automated, debugging remains as labor-intensive and painful as it. was 50 years ago. An engineer or programmer must still set up hypotheses to use in identifying and correcting a failure's root cause. The author describes a new algorithm that promises to relieve programmers of the hit-or-miss approach to debugging. Delta Debugging uses the results of automated testing to systematically narrow the set of failure-inducing circumstances. Programmers supply a test function for each bug and hardcode it into any imperative language. The test function checks a set of changes to determine if the failure is present or if the outcome is unresolved, then feeds that information to the Delta Debugging code. As we discover more about the structure of these circumstances and the resulting causality chain, we come closer to passing much of the boredom and monotony of debugging onto machines. Debugging can be just as disciplined, systematic, and quantifiable as any other area of software engineering-which means that we should eventually be able to automate at least part of it. Ultimately, debugging may become as automated as testing-not only detecting failures, but also revealing how they came to be.