Abstract: Two experimental studies are described of the effect on performance of alternative program representations in different components of program debugging tasks. The use of diagrammatic notation provides useful information when the debugging task is mainly concerned with tracing execution flow in a program. In more complex tasks involving the identification of procedures commonly used under fault conditions, the use of flowcharts still increases the speed with which faults are identified, and reduces irrelevant testing, but does not reduce the incidence of errors likely to lead to inaccurate fault identification.

Abstract: This paper provides an extensive update to an earlier survey article [23] which reviewed the state of the art and likely future trends in the field of firmware engineering. The current survey covers the areas of design and specification of microprograms, firmware construction techniques, testing, verification and debugging methods, and maintenance. The survey relates firmware engineering techniques to the analogous techniques for software. An extensive set of over 80 references has been provided.

Abstract: Symbolic traces increase error-detection capabilities of program tests and indicate the extent of their coverage. This instrumentation system generates traces automatically upon program execution.

Abstract: Interactive program development tools are being increasingly recognized as helpful in the construction of programs. This paper describes an integrated incremental program development system for Pascal called Pathcal. Pathcal contains facilities for creation, editing, debugging and testing of procedures and programs. The system facilities are all Pascal procedures or variables and because of this allows the programmer to program the system in itself.

Abstract: This paper presents analysis and design considerations for Ada Programming Support Environments (APSEs) to support interactive debugging and testing of embedded, real time software at the Ada source code level. The analysis is based on the “Stoneman” requirements specification for APSEs (1). Important factors in the analysis and design of Ada debugging and testing support systems include the requirement for a source level system, the host machine-target machine configurations, the real time and concurrent nature of target software, and the KAPSE virtual machine interface to the APSE data base. Although this paper is specifically concerned with debugging and testing issues, the methods utilized and the results obtained are of general applicability.The following sections of the paper address general analysis considerations, source level support environments, design considerations for an interactive source level debugger, and KAPSE design considerations.

Abstract: Debugging aids for high-level languages supporting structured data types should provide diagnostic information in a form terminologically as close as possible to that of the original source code. In addition, it is desirable that such software be portable. The package HEAPTRACE satisfies both the above criteria. It is a precompiler for Pascal programs which enables the user to trace the heap, selectively dumping dynamically-created records in a high-level format. It is portable as it is written entirely in Pascal; furthermore, since it is implemented as additions and modifications to a well-known compiler, its principles may easily be built into any Pascal compiler or diagnostics system. However, there is a small price to pay for achieving portability in that three possibly desirable features cannot be satisfactorily implemented in a machine-independent manner.

Abstract: Program development can be greatly speeded by a dump analysis program which makes the state of a program more visible to the programmer. A single comprehensive analysis presenting as much of the relevant material in as concise a manner as possible has proved superior in use to the alternative of interactive analysis one item-at-a-time. The methods adopted in the STAB utility to achieve comprehensive and concise output are described. The system and compiler modifications necessary to support this type of system are discussed.

Abstract: Purpose and Procedure. An exploratory study was conducted to determine what personal, environmental and program-related factors affect the process of discovering errors in computer software. The literature regarding each of the two prevailing philosophies concerning program debugging is review

Abstract: This paper describes the design philosophy underlying a debugging assistant which will help novice programmers debug arbitrary programs of their own design. The assistant synthesizes plans which are suitable for carrying out a particular set of intentions. The intentions may either be specified in advance (by us), or obtained from the student at debugging-time. The plans are represented in an abstract plan-language, and are compared against a similar representation of the student's own code in an attempt to find anomalies. The system focusses mainly on teleological bugs (unachieved intentions), but can also help to pinpoint the source of more complex conceptual bugs, even though it cannot recommended specific patches.

Abstract: PURPOSE:To eliminate the need for developing programs for each user by making the program debugging for a sub-CPU executable from a main CPU console provided exclusively to a main CPU. CONSTITUTION:A main CPU11, a sub-CPU12 cooperating with this via a common bus 13, and a main CPU console 16 for performing program debugging for the main CPU11 are contained, and the main CPU11 has the highest priority interruption function for the sub-CPU12. In the case of performing the program debugging for the sub-CPU12 from the console 16 with such computer system, the highest priority interruption is applied beforehand from the CPU11 to the CPU12, by which the program debugging from the console 16 to the CPU12 is accomplished.

Abstract: PURPOSE:To increase memory capacity by improving program debugging process efficiency by writing a program in a memory corresponding to high-order bits written in several registers which discriminate address regions of the memory. CONSTITUTION:Decoder 3 write the high-order bits of several addresses discriminating memory regions in register 2 where specific addresses selected corresponding to the contents of address bus 5 are allotted. When those high-order bits agree with address high-order bits from bus 5, access to memory 1 is attained through comparator 4. On the other hand, when a region discriminated by high-order bits from register 2 agrees with that of memory 13 such as RAM where a program has been written, a DISABLE signal is applied to memory 13 via the decoder 10 make memories 1 and 13 effective and ineffective, and CPU14 is reset by monostable multi vibrator 11 to attain accurate, rapid and highly-efficient debugging. Consequently, the same region is shared among several memories to increase the memory capacity.

Abstract: A version of structured FORTRAN named STAR is introduced. STAR allows recursive subroutines. Implementation problems such as parameter passing by value and local variable stacking are discussed. The major difficulty in the preprocessor approach is debugging. We claim that execution profiles are strong debugging aids, and demonstrate how to debug a STAR program at source language level with the clue in the profiles plus assertion statements. We make use of a quicksort program as an example.

Abstract: The traditional use of abstract machine models is to provide a conceptual framework for software design and to aid portability and machine independence. Access to the abstract machine model from the higher-level system on which it is based provides a powerful tool for software development. This paper describes a technique in which the higher-level system is interfaced to the underlying abstract machine, thus allowing use of the higher-level system to analyse and debug its own implementation. The application of this technique in the implementation of SL5 is given as an example. Experience with the use of the facility and a discussion of basic design considerations are included.

Abstract: Recent progress in the field of computer hardware makes reasonable the search for improvements in software reliability by using larger and faster computers, which permit the usage of redundant programs or the application of redundancy during the execution. The basic idea is to memorize what has been tested during the debugging, licensing or burn-in phase of software and to switch to the safe side if any program status appears during on line operation that had not been tested before. Concerning control sequence checking, it is supervised during program execution whether the program path used has already been tested. Three alternatives are considered: The first stores the tested paths as a tree, which describes the connections between the consecutive arcs. The second one associates an identification number to each program arc and stores the string of numbers, that identify each tested path. The third maps each program path on a number and stores it. In the same way also three checking methods for addressing arrays are feasible: The first memorizes the tested sequences of addressing as a tree structure, the second memorizes the tested sequences of addressing as a string of numbers and the third maps the sequence of addressing, used during a program run, on a single number. The size of the overhead in program execution time and memory space required is a function of the paths and mappings memorized. The application of one or more of these methods seems reasonable primarily for safety relevant programs which have to meet nearly identical requirements for long periods of operation time, and where safety actions are normally appropriate if input conditions change to unanticipated constellations.

Abstract: A computer program was developed to aid ASSEMBLY language programmers of mini and micro computers in solving the man machine communications problems that exist when scaled integers are involved. In addition to producing displays of quasi-steady state values, INFORM provides an interactive mode for debugging programs, making program patches, and modifying the displays. Auxiliary routines SAMPLE and DATAO add dynamic data acquisition and high speed dynamic display capability to the program. Programming information and flow charts to aid in implementing INFORM on various machines together with descriptions of all supportive software are provided. Program modifications to satisfy the individual user's needs are considered.

Abstract: The goal of the research described in this thesis was to build a system that supports, without interfering with, the activity of systematic software design and takes upon itself mechanical activities the designer can be spared. Two of the main activities which constitute the process of software creation are: 1.Designing a solution to the problem. 2. Implementing the design. The activity of design has to be performed by the programmer himself, it can only be aided by the computer. Producing a program from a complete design is a mechanical activity the computer can take upon itself. These observations lead to the following objectives that a software design system should meet: 1. Providing tools that support the design activity and enable maximum flexibility. 2. Recognizing the lowest level primitives of the design as the target language and producing the program in this language. A system along these guidelines was implemented. It permits the user to write definitions which refine high level design decisions into lower levels and, at the same time, serve as syntax descriptions and translation rules for the languages used in the design. The system operates in two user-controlled passes. In the first pass the user's definitions are read, either interactively or from external files, and the syntax rules are stored in a dictionary. In the second pass a syntax driven language processor uses the dictionary to compile the user's program into the target language which consists of the lowest level constructs of the design. Due to the freedom the programmer has in design, several kinds of syntactic ambiguities may be introduced with - or without - the user's attention. Unless caused by user errors, the translator tries to resolve these ambiguities to match the designers intentions. In order to reduce the amount of time and space required for parsing, long texts are divided into subtexts which are translated separately. Guidance as to which subtexts are separately translatable is provided by the user in a natural way by composing the design of statements. A command language enables the user to control the passes, to look at the contents of the dictionary and of external files, to monitor the translation process for debugging purposes, to store dictionaries for later use and retrieve them and to modify special symbols used in definitions. The system is implemented in Simula. A second system is presently being implemented as part of POL (Problem Oriented Language), a system for writing and using application languages. POL's metalanguage enables the user to build - or extend object languages by writing new syntax rules. The tools of the development system described above are incorporated into the metalanguage in order to aid the application programmer in the design and compilation of the semantic routines of these rules.

Abstract: A language-oriented approach to computer architecture starts with a high-level language, from which an "ideal" program representation and execution environment is derived, which in turn determines an "ideal" processor architecture. This is in contrast to the conventional approach wherein a single fixed instruction set supports all languages. In order to examine and evaluate the issues raised by the language-oriented approach, a methodology is presented for deriving successive levels in a design hierarchy consisting of the following components: an abstract syntax and abstract semantics for the language; derivation and interpretation of a token stream and a bit-oriented code stream; language processor architecture; and program monitoring facilities. The methodology is applied to a particular machine-independent high-level language in order to obtain detailed data concerning static program size and dynamic execution characteristics. A language-specific representation, postfix code, is designed according to this methodology. Postfix code is up to one fifth the size of conventional machine code and is simple to generate. A computer architecture is designed for interpretive execution of bit-oriented code streams. The 32-bit processor has a control store for micro-coded interpreters, hardware maintenance of the code stream, table-driven variable-width field extraction and operator dispatch in parallel with micro-code execution, and two micro-level stacks. The processor is unbiased with regard to the source language in that it defines neither the form of the instruction stream, nor the formats of data structures. A micro-coded postfix interpreter is used to execute a number of program modules compiled into postfix code. The postfix execution is compared with a conventional implementation and shown to be superior in every measured quantity; for example it has half as many instruction loads. A novel feature of postfix code is its ability to be decompiled into source text, including variable names. This provides the basis for a display-oriented program development and monitoring environment which can decompile and display the program text during a debugging session, with the cursor following the execution locus while in single-step mode. Breakpoints are set by moving the cursor to the desired point in the displayed text.

Abstract: BANDAID is an intelligent computer-assisted instruction (ICAI) system designed for students learning to program in BASIC. The major thesis is that beginning students need a friendly environment, that is, one in which information about the language and the system are immediately available. The system accepts most commands without switching levels: BASIC lines are parsed on input with very specific error messages. An editor allows corrections of BASIC lines. The program can be traced while running, and an indefinite number of HELP comments can be written for the system. Without leaving the BASIC environment, the user can interact with the CMS monitor of the main machine running the program. Although no English language comments or questions are allowed, the system is modular so that additions of restrictive dialogue interaction and guided tutoring are possible. Illustrations are presented showing the capabilities of the system. The paper also presents some of the implementation details of BANDAID. A flexible system requires implementation in LISP, so examples of how the system programmer interacts with LISP during debugging are given. Although still incomplete, the system runs satisfactorily and can be used easily by beginning students and by psychologists interested in how people learn complex subjects.

Abstract: We present in this paper an original approach of Debugging. The general goal in Automatic Verification of Programs is to prove that a program is correct or incorrect. This does not generally provide enough information to catch the bugs. On the opposite, the purpose of the debugging system LAURA, that we have designed and implemented, is to find the errors. In order to debug a student program, the LAURA system uses a procedural description of the program task, under the form of a program model. Debugging is then viewed as a comparison of two graphs, built from the student program and from the program model. The system can apply powerful semantic transformations on the graphs to increase their resemblances and to identify subgraphs that perform a same task. The LAURA system has shown to be able to determine the correctness of programs implemented in various ways, very different from the program model. It can also express sophisticated diagnostics and set up proper corrections.

Abstract: PURPOSE:To ensure an effective debugging in a simple constitution by switching the microprogram loaded previously through the OFF-time interface to the side of the real-time interface and then confirming the faulty area through the trial. CONSTITUTION:The microprogram to be debugged is loaded previously into RAM1 through OFF-time interface 3, and selector 4 is switched toward real-time interface 2 via operation panel 32 in order to start real-time device 21. Thus, the trial starts for the microprsogram in RAM1 in real time. The operator decides the trial result through operation of device 21. And in case some fault is detected, the retrial is given to confirm the faulty area. In such way, an effective debugging is possible in a simple constitution.

Abstract: : The design, implementation, debugging, validation, use, and modification of a computer simulator for the study of satellite communication protocols are reported. An important objective of the effort was to apply state-of-the-art software engineering techniques in the design and construction of the simulator. Experience with seven specific techniques is described.

Abstract: PURPOSE:To simplify an adjustment of equipment operation by easily finding the abnormal operation of an equipment by using an equipment-side debugging unit for a laboratory automation system. CONSTITUTION:To central processor 1, terminal 3 is connected via circuit 2 and data line 4 from this terminal 3 is connected to switch 5 alternating equipment 7 and debugging unit 9. Equipment-side data line 6 of switch 5 is connected to equipment 7, and data line 8 on the debugging unit side to debugging unit 9. Then, the same control signal as that of a laboratory automation system, generated by the use of debugging unit 9 and switch 5, is sent from switch 5 to equipment 7 and through the operation of switch 5, a pulse is generated by a pulse generating circuit provided to debugging unit 9; and pulses, a control signal generated by equipment 7, are latched by a latch circuit and this latched control signal is displayed by a display unit, thereby simplifying an adjustment of the operation of equipment 7.

Abstract: The use of digital logic simulation in the design of integrated circuits has long been established. In this role, however, simulation in general has remained a non-interactive CAD tool. In an attempt to alter this situation a simulator has been developed which will permit the designer to interact with the circuit, thus making simulation an even more effective design tool particularly in its use for debugging incorrect designs.