Abstract: A real-time database provides the predictable, high speed data access required for on-line applications, while providing flexible searching capabilities. The data retrieval routines include the option to "read-through-lock" to access data in locked data tables, the capability to directly access to data using tuple identifiers, and the capability to directly access unformatted data from input areas which contain blocks of unformatted data. The data updating routines include an option to omit index updating when updating data and an option to update data in a locked data table. Multiple indexes can be defined for a data table. Thus, high speed searches can be performed based on a variety of data fields. The data storage and retrieval mechanisms are independent and there are hash index tables that connect the multiple index keys to the data tables. The data table structure includes a column defined for storing tuple identifier strings. These tuple identifiers can be used as pointers for chaining to related data stored in other data tables. The datas base has relatively small programmatic memory. There is a common structure for user data tables, index tables and system tables. The database includes a minimum number of routines with certain routines providing multiple functionality.

Abstract: Insight into complex column heat flow facilitates extension of Underwood's method to columns with sidestream strippers and sidestream enrichers. This presentation is much simpler than previous ones. The same insights show that even though these configurations are more energy efficient, they require a larger temperature range for operation than analogous simple column sequences. Introduction When designing a distillation column, it is imperative that the minimum reflux ratio is known. This parameter is critical; it determines a lower limit to column operation. The reflux ratio sets the internal flow rates of the column which, in turn, determine the utility consumption and column diameter. At some point as the reflux ratio decreases, one or more of the operating lines of the column will intersect the equilibrium surface. These intersection points are known as pinch points. An infinite number of trays are required to pass through a pinch point. Thus, the pinch points determine a minimum value for the reflux ratio. Normally, a column is operated just slightly above this minimum value. To find the minimum reflux ratio rigorously, a set of simultaneous nonlinear mass and energy balances and equilibrium relationships must be solved. This approach is often difficult In order to find a solution quickly several shortcut methods have been developed. The most notable of these shortcut calculations is the classic method of Underwood (1946,1948). For separations with constant relative volatility and constant molar overflow, an algebraic construct is used to obtain a simple solution procedure. Although Underwood only considers simple columns, the analysis can be extended to complex column configurations. Recent works address the issue of shortcut methods for complex columns. Glinos and Malone present the correct algorithm for analyzing a column with a sidestream stripper (1985a, 1985b) and a column with a sidestream enricher (1985a). The side stripper analysis is developed for a ternary mixture; the generalization to the n component case is assumed to hold, but is not proved. The authors base their results on estimating the location of the pinch point in the side column. A step in their development assumes that the composition of the liquid return stream from the side column is at the pinch composition. While true for the ternary case, this assumption is not always true, and in fact, as it will be shown, not necessary to make. For complex columns the overall minimum reflux is achieved only when each column is at its respective minimum. The authors observe and use this fact but do not prove it. In a later paper Glinos and Malone (1988) formulate several design rules as to when to favor various complex column configurations. The criteria for these design rules is the overall reboil rate. It will be shown, however, that the temperature range over which a complex configuration operates is also an important design consideration. Hdkowski and Krolikowski present a method to find the minimum energy requirements for a side stripper and side enricher (1987). They restrict their analysis to ternary mixtures, and the development is very complex algebraically. Underwood's method is used as a basis for an optimization procedure. The appropriate vapor flow rate is minimized subject to internal mass balances and pinch point constraints. By choice of the proper objective function, they minimize the overall reflux. An analytical solution is obtained by observing the effect of the decision variables on the objective function. The authors then compare complex columns to the equivalent simple column sequences on an energy usage basis. Because the analysis is limited to ternary mixtures, their results are not generalized to an n component mixture. With the complexity of the algebra involved in their derivation, such an extension would not be easy. There is a much cleaner and more general approach to obtain these results for multicomponent columns. This is a principle contribution of this work. This paper presents a straightforward generalized multicomponent Underwood analysis for several complex column configurations. First, the side stripper and side enricher are analyzed using Underwood's basic principles. Insight into complex column heat flow allows for the formulation of a simple solution strategy. This strategy is readily extended to multiple side strippers and side enrichers. Finally, complex columns are compared to analogous simple column sequences. By using the same heat flow insights, it will be shown that complex columns are more energy efficient, but suffer from larger temperature drops across the whole configuration. Simple Columns A simple column is defined as a column with one feed and two product streams (Figure 1). The column is equipped with one condenser and one reboiler. The reflux ratio for a simple column is defined as R = § (1) and the reboil ratio is defined as Components that appear in both of the product streams are said to distribute. In a similar manner, components which appear exclusively in only one of the product streams are termed non-distributing. When splitting feeds, it is convenient to designate key components. Components are ranked in a list according to their relative volatility from the lightest to the heaviest. The lightest component which distributes is designated as the light key. The heaviest component which distributes is designated as the heavy key. If the key components are adjacent to each other, and if they appear largely in only one product stream, then the split is said to be sharp. For non-sharp splits, components between the keys will appear in both product streams. Before the analysis can begin, a brief discussion on column specifications is needed. The overall goal of the separation system will be to isolate pure component products. Thus, sharp splits are assumed throughout the discussion. It will be assumed that the composition and thermal condition of the feed are specified. No restriction will be placed on the quality of the feed. Additionally, the product streams must be specified in some fashion. For this discussion the composition of all of the product streams will be given. Once the specifications are made, minimum reflux may be determined. There are only two assumptions underlying Underwood's method: constant relative volatility and constant molar overflow. For this situation the method gives an exact solution. To derive the Underwood equations for a simple column, mass balances are written around tray n in the rectifying section + Di O) and tray m in the stripping section = ^ V i Bi At minimum reflux the operating lines will intersect the equilibrium surface. This situation, known as the pinch condition, requires an infinite number of stages. After considerable manipulation, the mass balances (written at the pinch conditions) are transformed into the well known equations

Abstract: A matrix display apparatus fabricated in low mobility material includes integrated commutating circuitry for applying data signals to the display elements. The commutating circuitry includes demultiplexing circuitry coupled to a first set of latch elements. These latch elements are coupled to a second set of latch elements via transmission gates, and the output terminals of the second set of latch elements are coupled to column buffers. The demultiplexing circuitry includes pass transistors to coupled display signals to respective ones of the first set of latches. The first set of latches are preconditioned by appropriate timing signals so that the demultiplexor pass transistors operate in a common source mode to shorten the overall switching time of the commutating circuitry.

Abstract: A method and associated apparatus for accessing a plurality of DRAMs in the static column mode by a high performance instruction processor to provide minimum wait state accessing thereby. The method comprises the steps of, having the instruction processor emit each instruction address as an address containing a bank number field, a row address field, and column address field; providing a table for storing a set of open pages being the current row address for each bank where a bank is associated with a respective one of the plurality DRAMs; for each instruction address emitted from the instruction processor, determining whether there is a match between the row address stored in the table and the row address emitted from the instruction processor employing the bank number as an index into the table of open pages; if the two addresses match, continuing the memory access to the indicated bank in a continuing static column mode; and, if the two addresses do not match, overwriting the old address for the indicated bank in the table with the new row address and continuing the memory access by beginning a new static column mode access to the indicated bank. In the preferred embodiment, the method includes, as necessary, aborting the access in progress if the two addresses do not match prior to beginning the new static column mode access to the indicated bank and advising the instruction processor that the access in progress is being aborted and being begun again.

Abstract: A method of minimizing memory access time on a memory with multiplexed address inputs between data stored in locations in memory in the same row but in different columns. First data is accessed at a predetermined column and row location. The predetermined row location of the first data is then recorded. The location of second data is then recorded. Then the locations of the first and second data are compared. A row compare signal is generated if the row value of both first and second data are identical. Only the column address is varied in response to the row compare signal.

Abstract: A semiconductor memory includes a memory cell array having a plurality of bit lines and a plurality of word lines arranged intersecting with the bit lines. A plurality of memory cells are arranged at intersections of the bit lines and the word lines, respectively. Word line selecting circuitry selects one of the word lines responsive to a row address and reads out to each of the bit lines information stored in the memory cell associated with the selected word line. A plurality of sense amplifiers are associated with corresponding rows of the memory for detecting and amplifying the information stored in respective memory cells. A first column selector circuit selects the sense amplifiers corresponding to a column address when the column address is applied and reads information held in the sense amplifier. Blocks are formed by dividing the memory cell array into groups of bit lines, each of the groups comprising a predetermined number of bit lines with block information transferred simultaneously from corresponding ones of the groups of bit lines of a selected block when the column address corresponding to the selected block is applied. Data registers hold information of an associated block. A second column selector reads data corresponding to the column address from the data register when the column address is applied.

Abstract: A graphics processor is coupled to a plurality of RAMs (Random Access Memories) for storing a frame of a display. The processor provides a separate RAS (Row Address Strobe) signal and a separate CAS (Column Address Strobe) signal to each of the memories so that row and/or column addresses to each of the RAMs can be latched using a staggered timing sequence. Data can be written into or read from memory using this staggering technique, wherein overall data transfer rate is faster than the memory cycle time of each of the RAMs.

Abstract: A memory cell array of an EEPROM is divided into bit columns including 8192 words, each column being a unit for 8-bit access. An input data latch of 8 bits×32 words receives 8-bit data when data is written in the memory cell array. When the data is written in the memory cell array, a write controller permits the input data latch to receive the 8-bit data, then refers to an access ID latch to discriminate only the data received within a predetermined time by the input data latch, and writes only the received data into a predetermined divided region of the memory cell array.

Abstract: A data processor includes an array of a plurality of processing elements haivng ports connected to neighboring elements. Elements at each end of a column have interconnected ports so that data can be sequentially cycled through the column elements. Elements at each end of a row have switchably interconnected ports so that in one mode data can be sequentially cycled through the row elements. The processor further includes a shift register switchably coupled to each row and memory apparatus coupled to the shift registers. The shift registers are switchable such that in a second mode data can be sequentially cycled through the shift registers and the corresponding row elements. The processor also includes an input shuffle matrix for reformatting data for facilitating data storage and recall during processing, thereby increasing overall system throughput. A method includes storing data in bit planes and shifting data a plurality of bit positions before writing the shifted data to memory, thereby further increasing throughput. Data processing may be used for edge detection from an image including a plurality of picture elements (pixels).

Abstract: The RAM includes sub-arrays having odd and even memory locations, respectively. A data move instruction results in externally generated row and column address signals which are decoded to cause a first memory location, in one of the sub-arrays, to be selected and data to be read. The next memory location in sequence, in the other of the sub-arrays, is then selected, without necessity for an additional set of row address signals, for writing of the read information. The row decoder includes row indexing circuitry actuatable upon receipt of a shift signal signifying that the first memory location is in the last column of a given row. When the shift signal is received, the write location is automatically selected to be in the succeeding row.

Abstract: Apparatus and method for broadcasting a data word from a row of broadcasting processing elements of a two-dimensional parallel processing system along the columns thereof to other rows of receiving elements in the system is disclosed. The parallel processing system is of the SIMD type, each such element being connected to at least communicate bits to the element adjacent thereto in its column. The sequence of instructions applied to the processing elements is effective to cause the efficient broadcast of the data word, with each processing element turning off upon receiving the complete data word in a shift register therein.

Abstract: Conventional methods for measuring soil bulk density do not allow one to observe three-dimensional density distribution in a nondestructive manner. X-ray tomography, or computer-assisted tomography (CT), was originally developed for medical purposes, but offers the possibility of studying other matter within the density range of human body components. We have applied CT to the study of packing arrangement and density of soil columns used in experiments concerning water transport and wastewater purification. The result show that CT is a valuable tool in describing column experiments. CT has elucidated the packing procedure for soil columns, factors of importance for water flow, and has reduced uncertainties about the experimental conditions. The information obtained by CT is essential for making comparisons with other experiments and has initiated vital improvements in column construction.

Abstract: In a semiconductor memory system of the serial column access type, a redundant column is used for replacing a defective column. Redundant data lines are connected to the redundant column through a redundant column selection gate. A defective address detection circuit detects the address of a defective column to enable the redundant column selection gate. An address counter is provided for a defective address detection circuit. A redundant column selection circuit selects the redundant column in response to a detection signal from the defective address detection circuit. A data line switching circuit switches, in redundant column select mode, the data lines connecting to a data input/output drive circuit from said regular data lines to the redundant data lines. With this circuit arrangement, in a redundant column select mode, the regular data lines are separated from the data input/output drive circuit. Therefore, even if a shift register constituting a regular column selection circuit operates and the defective column selection gate is enabled to set up a connection of the defective column to the regular data lines, the error data from the defective column is never output. Further, the shift register is operable irrespective of the defecting column detection.

Abstract: To examine the chemical forms of neptunium (V) in aqueous solutions, the solubility was measured by an ultrafiltration method. The existence of three species of NpOj, NpOjOH and NpOj (OH)2 were expected from the resulting pH-dependent solubility curve. Their hydrolytic data were obtained as follows; log0, =5.7, log03 = 8.6 and log Ksp = 10.7 at ionic strength of 0.01 M. A high performance liquid chromatography was applied to study the migration behaviour of neptunium (V) in a quartzpacked column. The presence of two components of neptunium (V) which were different from each other in the migration velocity was demonstrated successfully. The one component was the unretarded component moving with the eluent, and the other the retarded component. The distribution coefficient of the retarded component decreased with the increasing ionic strength of the eluent and increased with the increasing pH. Mechanisms of the migration behaviour are discussed for each component.

Abstract: A keyboard and keyboard system for use in an electronic device having a plurality of keys. A matrix of keys in rows and columns with each key being defined by an intersection of a row and column wire is used. Either the rows or columns function as initial inputs and the other of the rows or columns function as an initial driver. After a key press, the initial input is changed to a secondary driver and all initial drivers are changed to secondary inputs. The secondary inputs are then read to detect which key has been pressed and the row and the column are connected at the appropriate intersection representing the key which has been pressed. The keyboard system decodes each intersection to define the representation of each key and the representation is communicated to the associated electronic device. A method for detecting input from a keyboard is also disclosed.

Abstract: We reconsider the problem of determining the shape of the strongest column having a given length / and volume V. Previous results [13,7] have given optimal shapes for which the cross section vanishes at certain points. Although these results are mathematically correct, Theorem 1 below explains what is wrong with these anomalous shapes.

Abstract: A digital memory system wherein a plurality of frames in the memory, each frame holding a page of data, may be rapidly accessed utilizing static column dynamic random access memories (SCRAMs). The SCRAM devices are configured such that a page of data is located on corresponding rows of a plurality of SCRAM devices, the corresponding rows being referred to as frames. Once a row has been activated into static column mode, successive accesses to the same row may be made very rapidly. In the presently preferred embodiments, a plurality of banks are provided, each bank being capable of holding one page of data in static column mode. In the preferred embodiments, a tag register and comparator are provided which are associated with each bank. The tag register contains a portion of the address which previously caused an access to its corresponding bank. An address is presented to all the tag registers and comparators. If a match occurs, a memory access to the bank corresponding to the matching tag register may be made while the row in the selected bank is still in static column mode.

Abstract: An apparatus and/or method utilizing a computer, for creating a relational database (63, 65 and 67), the relational database contains a plurality of relations and each of the relations contains one or more colums and rows. A column has one or more values, which all have a common characteristic. Each value of the column corresponds to one of the rows of the relation. Each row contains some or more values in each value is from a different column. The values in each row have one or more characteristics. The creation of a relational database occurs in three steps. First, for each characteristic of the relational database, a set containing a plurality of unique values is formed. Second, for each relation of the relational database, one or more subsets of each set containing unique values of the relation is formed. Each of the subsets contains one or more of the unique values of one of the sets. Third, the relations of the relational database are formed. More particularly, for each subset associated with a particular relation, one of the columns of the relation is formed. Each column contains one or more of each unique value in the subset, and each unique value of the column occurs in one or more rows of the relation.

Abstract: A single-step digital-to-analog converter includes a multiplicity of individual interconnected sources disposed in a matrix having matrix rows and matrix columns; a decoder apparatus connected to the matrix for addressing the individual sources, the decoder apparatus including a column decoder for addressing at least the more significant part of an n-bit-wide digital word to be converted and a row decoder in the form of a thermometer decoder. Logic apparatus is connected between the decoder apparatus and the matrix for determining the matrix column of one of the individual sources being addressed and for suppressing switching over of the individual sources of others of the columns. The logic apparatus includes first and second logic devices, the first logic device being connected between the column decoder and the matrix for deriving further column information (E i ) and additional information (S i ) from column information (X i ) in accordance with the logical equations: E i =S i and S i =E i E i-l . The second logic device being assigned to each of the individual sources (Q ik ) in accordance with logic equations that determine the connected state of a matrix column.

Abstract: A Random Access Memory having a fast Clear operation includes a cell array (10) which has a plurality of memory cells arranged in rows and columns. Each of the rows is selected by word lines (12) and the data is output on column lines (14). Each of the word lines (12) is selected by a row decode circuit (20) or a Clear signal through OR gates (22). The Clear signal selects all of the word lines (12) such that each row in the cell array (10) is selected. The bit line associated with each column are pulled to ground through an N-channel transistor (36) and a bit line bar pulled high through a P-channel transistor (38). In addition, the V CC supply to the array (10) is decoupled from the memory cells by a P-channel transistor (40).

Abstract: A charge injection device image sensor, having increased sensitivity and dynamic range, utilizes a two-dimensional array of cells having m rows each with n cells arranged in n columns. A video preamplifier is connected to each associated column to amplify, in parallel, video signals from that one column, responsive to all of the n cells along a particular one of the m rows being simultaneously enabled. The rows are scanned in mutually-exclusive fashion. Each of the n amplified column signals is separately stored. The stored column signals are sequentially readout to provide the sensor video output signal.

Abstract: An automatic program generating device and method which involves the dividing of a whole work to be processed into a plurality of tasks and providing a plurality of free-setting task elements. The free-setting task elements each include an incomplete program. The tasks and free-setting task elements are arranged about an inner matrix configuration provided on a frame body such that a respective one of the tasks represents each row (or column) of the matrix and a respective one of the free-setting task elements represents each column (or row) of the matrix. The intersections of the columns and rows of the matrix define cross-points upon which are positioned a plurality of different types of fixed task element marks. The fixed task elements represent various operation program parts stored in a memory device. A reading device interprets the position and type of the fixed task element marks and relays that information to a fetching device which fetches the appropriate operation program part represented by the fixed element task mark and combines it with the incomplete program of the free-setting task element associated with the fixed task element mark so as to generate a complete program.

Abstract: The invention relates to the monitoring of the availability of logic resources, and particularly that of cells of a data memory of the RAM type, in which randomly received data are written. To do this, the invention provides a circuit for setting up the addresses of available data cells as a function of the free and occupied states of the data cells. The circuit comprises an array (1) of one-bit, at least write-addressable cells (2C, 2L) for storing availability-state bits for the data cells, and means (30 to 3J-1, 6L, 40 to 4I-1, 6C) connected to the outputs of all the cells of the array (100 to 1I-1J-1) for detecting those cells of the array each containing a free state bit ("1"). Preferably the address of a free data cell is set up by selecting in priority order, row by row and column by column, one of the cells of the array containing a free state bit.

Abstract: A non-volatile semiconductor memory device has a plurality of memory cells which are coupled to a plurality of row or column lines through which a high voltage is supplied in a data write operation and a plurality of switching circuits, each of which is coupled to the corresponding row or column line. In a data write operation, only one of switching circuits is turned on to supply the high voltage to only one row or column lines coupled to a memory cell in which a data is to be written.

Abstract: A memory is described which incorporates redundancy in the form of one or more redundant columns. An applied binary address is first distributed between predecoders which form a 1-out-of-2n code from n bits received. For each non-redundant column there is available a part of a main decoder, each part receiving a different combination of the bits supplied by the predecoders, thus selecting the column. For each redundant column there is provided a redundancy decoder. The latter decoder receives all bits supplied by the predecoders, each time via a series connection of a activatable gating element and a fuse element. Per predecoder the outputs of the series connections are combined in a wired logic function. Each wired logic function forms an input signal of the actual redundancy decoder. When a redundant column is to be addressed, all fuse elements but one of a group are opened and the gating elements are activated. A memory column to be replaced is then uncoupled by way of another fuse element.