Capacitance–voltage profiling

Abstract: Depletion layer properties have been calculated for diffused junctions in silicon and germanium as a function of reverse voltage and of diffusion parameters for the gaussian and the complementary error function distributions. These results bridge the gap between the linearly graded behavior generally exhibited by suck junctions at low voltage and the step behavior exhibited at high voltage. For total depletion layer thickness and capacitance, the transition from graded to step junction behavior extends over about one decade of voltage. For depletion layer thickness on a single side of the junction, it extends over several decades. Depletion layer thickness and peak electric field are presented graphically as a function of voltage for a variety of junction depths and impurity concentration functions. The ranges for which the. step and graded junction approximations are valid are apparent from these charts. The results were obtained by an analytical integration of Poisson's equation, and a subsequent use of the IBM 704 for a numerical evaluation of the transcendental equations obtained.

Abstract: A power field effect device has a high voltage blocking junction which intersects the device surface under the gate electrode. That intersection is a closed plane geometric figure whose center is within the body region of the device rather than in the more heavily doped base region of the device. The figure preferably is everywhere convex and has a maximum width of substantially less than the depletion width, at breakdown, of a corresponding parallel plane junction. The device breakdown voltage is higher than the breakdown voltage of a corresponding junction having a cylindrical edge with a straight axis. In a preferred embodiment, the high voltage blocking junction has a plurality of such intersections with the device surface, each situated beneath a segment of the gate electrode. In a bipolar embodiment, the gate electrode may be omitted.

Abstract: A new method of semiconductor operation has been conceived, developed and applied to produce a revolutionary new semiconductor design. The method is that of merging depletion regions for purposes of operation, isolation and control of channel current in a junction field-effect transistor. Using this method depletion regions are made to merge with suitable biasing in an intervening layer interposed between the gate and channel of a junction field-effect device and the interaction of the depletion regions is used for isolation and coupling to alter the associated depletion region in the channel of the junction field-effect device. A number of embodiments are disclosed of the new junction field-effect transistor controlled by merged depletion regions. In each embodiment a channel of one conductivity type material is formed in a semiconductor body of opposite type material. A gate region of the same conductivity type material as the channel is placed near enough to the channel so that when the gate junction is reversed bias, the gate depletion region merges with the channel junction depletion region in the intervening layer. When the two depletion regions have merged, the gate controls the channel current in a manner similar to conventional devices. Because the output and input and control connections are of the same conductivity type material, no metal contacts or interconnections are required. The lack of need for metal interconnects makes the device better suited to integrated circuits than any other device. In addition, the depletion regions surrounding the gate and channel isolate the gate and channel from other semiconductor regions of the same conductivity type and thus isolation regions are not required for the junction field-effect transistor controlled by mergers depletion regions. Consequently, use of the invention can result in the densest form of logic available today. Such devices hold the promise of improved performance in almost every semiconductor device application and can be used in almost every application where MOS and junction field-effect devices are now used.

Abstract: A field effect semiconductor device and method of controlling the device by merged depletion regions are provided. The device includes, in combination, first (22) and second (24) spaced apart PN junctions. Depletion regions (36, 38 and 40, 42) associated with the junctions have boundaries displaced from their respective junctions as a function of the doping concentration on either side of the junctions. The junctions are spaced apart by a distance with allows overlap of the depletion regions (38, 40) positioned therebetween. By applying a reverse bias to one (22) of the PN junctions the conductivity on the side (34) of the second PN junction (24) remote from the first PN junction (22) can be varied through the effect of merged depletion regions.