TL;DR: In this article, a compressible variable capacitance sensor for determining the presence, size, position, and type of an object such as a human body part includes two flexible conductor elements separated by a nonconductive compressible element.
Abstract: A compressible variable capacitance sensor for determining the presence, size, position, and type of an object such as a human body part includes two flexible conductor elements separated by a non-conductive compressible element. The capacitance of the capacitance sensor changes as a function of force applied by an object on the capacitance sensor. A controller senses the capacitance of the capacitance sensor and controls a device accordingly. The device may be a movable closed opening such as a window in which the controller controls the window as a function of the monitored capacitance to prevent pinching of the object. The device may also be a seat in which the controller determines the characteristics of the seat occupant based on the monitored capacitance.
TL;DR: In this paper, the authors proposed a variable capacitor constituted such that a dielectric layer whose dielectrics constant is changed by the application of an external voltage is held between an upper electrode layer and a lower electrode layer, wherein a plurality of capacitance-producing regions a, b are connected to each other.
Abstract: It is an object of the invention to provide a variable capacitor constituted such that, even when an external control voltage is applied, a stable dielectric constant of the dielectric layer can be obtained. A variable capacitor constituted such that a dielectric layer whose dielectric constant is changed by the application of an external voltage is held between an upper electrode layer and a lower electrode layer, wherein a plurality of capacitance-producing regions a, b are connected to each other.
TL;DR: In this paper, a hybrid capacitor associated with an integrated circuit package provides multiple levels of excess, off-chip capacitance to die loads, including a low inductance, parallel plate capacitance embedded within the package, and electrically connected to a second source of off-chamber capacitance.
Abstract: A hybrid capacitor associated with an integrated circuit package provides multiple levels of excess, off-chip capacitance to die loads. The hybrid capacitor includes a low inductance, parallel plate capacitor embedded within the package, and electrically connected to a second source of off-chip capacitance. The parallel plate capacitor is disposed underneath a die, and includes a top conductive layer, a bottom conductive layer, and a thin dielectric layer that electrically isolates the top and bottom layers. The second source of off-chip capacitance is a set of self-aligned via capacitors, and/or one or more discrete capacitors, and/or an additional parallel plate capacitor. Each of the self-aligned via capacitors is embedded within the package, and has an inner conductor and an outer conductor. The inner conductor is electrically connected to either the top or bottom conductive layer, and the outer conductor is electrically connected to the other conductive layer. The discrete capacitors are electrically connected to contacts from the conductive layers to the surface of the package. During operation, one of the conductive layers of the low inductance parallel plate capacitor provides a ground plane, while the other conductive layer provides a power plane.
TL;DR: In this article, the degradation of the breakdown voltage and stress resistance of the peripheral part of the opening 24, which is due to the coverage of the capacitor dielectric film, can be suppressed.
Abstract: A capacitor which includes a lower electrode 12 formed on a substrate 10 ; an insulation film 16 having an opening 24 on the lower electrode 12 ; a capacitor dielectric film 30 formed on the lower electrode 12 in the opening 24 and having a larger thickness at a peripheral part of the opening 24 than at a central part of the opening; and an upper electrode 32 formed on the capacitor dielectric film 30 . Thus, degradation of the breakdown voltage and stress resistance of the peripheral part of the opening 24 , which is due to the coverage of the capacitor dielectric film, can be suppressed.
TL;DR: In this paper, an improved two-frequency method of capacitance measurement for the high-k gate dielectrics is proposed, where the intrinsic capacitance, loss tangent, parasitic series inductance, and series resistance are extracted by independently measuring the capacitor at two different frequencies.
Abstract: An improved two-frequency method of capacitance measurement for the high-k gate dielectrics is proposed. The equivalent circuit model of the MOS capacitor including the four parameters of intrinsic capacitance, loss tangent, parasitic series inductance, and series resistance is developed. These parameters can be extracted by independently measuring the capacitor at two different frequencies. This technique is demonstrated for high-k SrTiO/sub 3/ gate dielectrics and the results show that the calibrated capacitances are invariant over a wide range of frequency. In addition, the extracted loss tangent, inductance and resistance are independent on gate voltage and frequency. The effect of series resistance on the frequency dispersion of the capacitance can be also explained by this model. These results indicate that this modified technique can be incorporated in the routine capacitance-voltage (C-V) measurement procedure providing the physically meaningful data for the high-k gate dielectrics.
TL;DR: In this paper, the structure and methods for forming capacitors for integrated circuits are described, including a rhodium-rich structure (24), an oxide layer (26), and a top electrode (40) over the capacitor.
Abstract: Structures and methods are disclosed for forming capacitors for integrated circuits. The capacitor includes a rhodium-rich structure (24), a rhodium oxide layer (26) in direct contact with the rhodium-rich structure (24), a capacitor dielectric (30) in direct contact with the rhodium oxide layer (26) and a top electrode (40) over the capacitor. The rhodium-rich structure (24) can include rhodium alloys and the capacitor dielectric (30) preferably has a high dielectric constant.
TL;DR: In this article, the authors proposed an improved dielectric filter with an improved Q factor of a resonator, a low loss, and a high attenuation, where the resonator electrodes are electro-magnetically coupled to each other to form a tri-plate structure.
Abstract: A dielectric filter includes resonator electrodes, an inter-stage coupling capacitor electrode, and an input/output coupling capacitor electrode on dielectric substrates, respectively. The resonator electrodes are electro-magnetically coupled to each other to form a tri-plate structure, are made of a metallic foil embedded in a resonator dielectric substrate. Another dielectric filter includes an upper shield electrode dielectric substrate, an inter-stage coupling capacitor dielectric substrate, a resonator dielectric substrate, and an input/output coupling capacitor dielectric substrate which are made of a composite dielectric material including a high-dielectric-constant material and a low-dielectric-constant material. The above described arrangement provides the dielectric filter with an improved Q factor of a resonator, a low loss, and a high attenuation.
TL;DR: In this paper, a data transmission-reception unit which operates by means of the energy of a received electromagnetic wave and serves as a main circuit is constituted, with a sensor circuit (130) as an additional circuit, and a transponder (100) having a sensor power circuit (150) only connected to the sensor circuit.
Abstract: A data transmission-reception unit which operates by means of
energy of a received electromagnetic wave and serves as a main circuit,
is provided with a sensor circuit (130) as an additional circuit, and a
transponder (100) having a sensor power circuit (150)
only to the sensor circuit is constituted. From a sensor charging
circuit of an interrogator (230), an electromagnetic wave of a lower
frequency different from a frequency of electromagnetic wave for data
communication is radiated, or loop coil-shaped charging antennas (102,202) are
electromagnetic-coupled to thereby charge a capacitor for the sensor
power circuit. Thereby, a secondary battery and the capacitor such
as a large scale capacitor can be easily charged from an outside, and
further, a power consumption for the capacitor can be restrained.
TL;DR: In this article, a capacitance sensor system and method includes a capacitive sensor as an array of sensor electrodes E1 near the surface of the integrated circuit and charge pump circuits (5) for measuring the capacitance C14 (20) at each sensor electrode.
Abstract: A capacitance sensor system and method includes a capacitive sensor as an array of sensor electrodes E1 (1) near the surface of the integrated circuit and charge pump circuits (5) for measuring the capacitance C14 (20) at each sensor electrode. Shield electrodes E4 (4) and unused sense electrodes are used for background capacitance cancellation at each array location. The shield electrodes E4 (4) are switched between the circuit supply potentials in a manner synchronous to the capacitance sensing at the sense electrodes. The improved background capacitance cancellation allows all circuitry to be located outside the sensor array. The capacitance data is used to determine the positions of fingerprint artifacts and other fingerprint features.
TL;DR: In this article, a thin film integrated multilayer capacitor with substantially enhanced capacitance density suitable for Dynamic Random Access Memory (DRAM) and other integrated capacitor applications is formed into a trench or cavity structure with a completely self-aligned atomic layer deposition (ALD) process flow.
Abstract: A thin film integrated multilayer capacitor with substantially enhanced capacitance density suitable for Dynamic Random Access Memory (DRAM) and other integrated capacitor applications is formed into a trench or cavity structure with a completely self-aligned atomic layer deposition (ALD) process flow. Each conductor layer is etched with a wet etch to create recesses between the adjacent insulating layers, which recesses are seamlessly filled with dielectric using an ALD process, so that no part of the conductor is ever exposed to ambient atmosphere. Only silicon-based dielectric materials contact the silicon substrate, and the contact area between silicon and the capacitor is minimized both at the top and the bottom. The dielectric layers comprise Al 2 O 3 , ZrO 2 , or HfO 2 , which is deposited using an ALD process. Capacitance density is greatly enhanced to a C/∈ of above 1500 fF/μ 2 .
TL;DR: In this article, the authors proposed a fully differential sampling circuit which reduces a sampling error to suppress the occurrence of a second harmonic component, which is due to voltage dependence of a capacitance of the capacitor formed on a semiconductor substrate.
Abstract: To provide a fully differential sampling circuit which reduces a sampling error to suppress the occurrence of a second harmonic component The sampling error is resulted from voltage dependence of a capacitance of the capacitor formed on a semiconductor substrate The present invention includes a first sampling capacitor 27, a second sampling capacitor 28, four switches 31, 32, 33′, and 34 for charging and discharging the first sampling capacitor 27, four switches 41, 42, 43′, and 44 for charging and discharging the second sampling capacitor 28, and a fully differential operational amplifier 20 including a first integral capacitor 25 and a second sampling capacitor 26 An upper layer electrode 28 b and a lower layer electrode 28 a of the second sampling capacitor 28 are opposite to the first sampling capacitor 27 in connecting direction (state)
TL;DR: In this paper, a circuit and system for sensing and measuring the mutual capacitance between a sensor capacitor having one grounded lead and a target and providing a direct digital output of the measured capacitance is disclosed.
Abstract: A circuit and system for sensing and measuring the mutual capacitance between a sensor capacitor having one grounded lead and a target and providing a direct digital output of the measured capacitance is disclosed. The circuit and system includes a relaxation oscillator coupled to a sensor capacitor and a fixed resistor. The fixed resistor and the sensor capacitor in conjunction with the relaxation oscillator provide a time varying output signal that has a period that is proportional to the mutual capacitance of the sensor capacitor and a target and resistance of the fixed resistor. The circuit and system can also include circuitry to compensate for the input capacitance of one or more amplifiers used in the relaxation oscillator. The circuit and system can also include circuitry to effectively increase the resistance of the fixed resistor by a predetermined constant. This allows a smaller resistance value for the fixed resistor to be used with the concomitant reduction in the size of the fixed resistor, which reduces the parasitic capacitance of the fixed resistor. A guard electrode can be formed coaxially surrounding the fixed resistor and coupled to an input amplifier in the circuit to further reduce the parallel parasitic capacitance of the fixed resistor. An interval timer can be coupled to the output of the relaxation oscillator to provide an accurate measurement of the period of the output signal. This value, or the frequency of the output signal, may be used by a calculation module to accurately determine the value of the mutual capacitance and the value of the measured variable. In addition, the system may include predetermined calibration signals that are used as correction values.
TL;DR: A capacitance type humidity detecting sensor has two electrodes opposing each other with a gap interposed therebetween to form a capacitor on a silicon substrate with a silicon oxide film formed on a surface thereof as discussed by the authors.
Abstract: A capacitance type humidity detecting sensor has two electrodes opposing each other with a gap interposed therebetween to form a capacitor on a silicon substrate with a silicon oxide film formed on a surface thereof. A moisture-sensitive film is formed so as to cover the two electrodes with a silicon nitride film interposed therebetween. The silicon nitride film protects the two electrodes from moisture passing through the moisture-sensitive film. The capacitance formed between the two electrodes changes in accordance with ambient humidity. A switched capacitor circuit formed in a circuit element portion processes a signal indicative of a change in the capacitance formed between the two electrodes.
TL;DR: In this paper, the authors proposed a parallel capacitor structure that includes at least one internal conductive layer, two additional conductor layers added on opposite sides of the internal conductor, and inorganic dielectric material.
Abstract: A parallel capacitor structure capable of forming an internal part of a larger circuit board or the like structure to provide capacitance therefore. Alternatively, the capacitor may be used as an interconnector to interconnect two different electronic components (e.g., chip carriers, circuit boards, and even semiconductor chips) while still providing desired levels of capacitance for one or more of said components. The capacitor includes at least one internal conductive layer, two additional conductor layers added on opposite sides of the internal conductor, and inorganic dielectric material (preferably an oxide layer on the second conductor layer's outer surfaces or a suitable dielectric material such as barium titanate applied to the second conductor layers). Further, the capacitor includes outer conductor layers atop the inorganic dielectric material, thus forming a parallel capacitor between the internal and added conductive layers and the outer conductors.
TL;DR: In this paper, a linearly tunable microelectromechanical systems (MEMS) capacitor with 608 comb fingers changing the overlap area is developed, and the capacitance is 1.4 pF and 10% tuning range at 8V.
Abstract: The linearly tunable microelectromechanical systems (MEMS) capacitor with 608 comb fingers changing the overlap area is developed. Unlike the conventional micromachined capacitor using the gap between the parallel plates, the proposed capacitor adopts the overlap area as the tuning parameter. In addition, the tuning range of the proposed capacitor has large nominal capacitance C0, whereas the parallel plates have a range of C0/3 theoretically. The 6-μm-thick single-crystal silicon MEMS structure is bonded to the pyrex glass substrate using the glass–silicon anodic bonding technique and the chemical mechanical polish (CMP) to make the desired capacitor. Single-crystal silicon was chosen as a capacitor structure material because it has excellent mechanical properties greater than those of polysilicon and aluminium as the structure material, and the pyrex glass is used as a substrate instead of silicon to reduce the RF losses through the substrate over the high-frequency range. The measured capacitor shows a nominal capacitance of 1.4 pF, and 10% tuning range at 8V. The capacitor model is also developed to explain the parasitic effect over the high-frequency range and proved by using the Serenade software of the Ansoft Corporation.
TL;DR: In this paper, a method for detecting a change in capacitance of a capacitive sensing element having a nominal capacitance value is disclosed, which includes coupling the sensing element to a first oscillator.
Abstract: A method for detecting a change in capacitance of a capacitive sensing element having a nominal capacitance value is disclosed. In an exemplary embodiment, the method includes coupling the sensing element to a first oscillator (42), the first oscillator generating a first frequency dependent on the capacitance value of the first sensing element. The first frequency is compared to a reference frequency generated by a reference oscillator (40). The change in capacitance from the nominal capacitance value is detected if the first frequency differs from said reference frequency by a determined frequency value.
TL;DR: Capacitive proximity sensing is carried out by detecting a relative change in the capacitance of a "scoop" capacitor formed by a conductor and a surrounding ground plane as mentioned in this paper, and the presence or absence of an object or body portion in close proximity to or contact with a device can be determined by comparing TouchVal with a predetermined threshold value.
Abstract: Capacitive proximity sensing is carried out by detecting a relative change in the capacitance of a “scoop” capacitor formed by a conductor and a surrounding ground plane Charge is transferred between the “scoop” capacitor and a relatively large “bucket” capacitor, and a voltage of the bucket capacitor is applied to an input threshold switch A state transition (eg, from low to high, or high to low) of the input threshold switch is detected and a value (TouchVal) indicative of a number of cycles of charge transfer required to reach the state transition is determined The presence or absence of an object or body portion in close proximity to or contact with a device can be determined by comparing TouchVal with a predetermined threshold value (TouchOff) In order to lessen the time required for detection, and/or improve the sensitivity thereof, the bucket capacitor may initially be charged to a repeatable non-zero reference level closer to the charge level that will cause a state transition TouchOff can be adjusted to take into account environmentally induced (non-touch related) changes in the capacitance of the scoop capacitor Power management may be provided in a user operated data input device utilizing the inventive proximity sensing
TL;DR: In this paper, a method for providing high dielectric constant decoupling capacitors for semiconductor structures was proposed, which can be fabricated by depositing high Dielectric Constant material between adjacent conductors on the same level, between conductors in successive levels, or both, to provide very large capacitance value without any area or reliability penalty.
Abstract: Apparatus and method for providing high dielectric constant decoupling capacitors for semiconductor structures. The high dielectric constant decoupling capacitor can be fabricated by depositing high dielectric constant material between adjacent conductors on the same level, between conductors in successive levels, or both, to thereby provide very large capacitance value without any area or reliability penalty.
TL;DR: In this paper, a temperature compensated oscillator keeping the area of a capacitor array and the bit number of a memory from increasing and allowing for high precision is provided, and an adjusting method of such a resonator and an integrated circuit for temperature-compensated oscillation is also provided.
Abstract: A temperature compensated oscillator keeping the area of a capacitor array and the bit number of a memory from increasing and allowing for high precision is provided. A adjusting method of such a resonator and an integrated circuit for temperature compensated oscillation are also provided. A capacitor array and a variable capacitance diode are connected and used as a load capacitance in an oscillation circuit, and the capacitance value of the former is digital-controlled and that of the latter is analog-controlled, so that the amount of compensation data necessary for the digital control is reduced and highly precise temperature compensation is permitted.
TL;DR: In this paper, the root-mean-squared potential of an AC signal characterized by a frequency f is disclosed and a meter for measuring the potential of the AC signal is described.
Abstract: A meter for measuring the root-mean-squared potential of an AC signal characterized by a frequency f is disclosed. The meter includes first and second capacitors. The AC signal is applied to the first capacitor, which includes first and second plates separated by a distance that depends on the root-mean-squared potential of the AC signal, but not on changes in the AC signal that occur over a time of 1/f. The second capacitor has first and second plates separated by a distance that depends on the separation of the first and second plates in the first capacitor. A detection circuit measures the capacitance of the second capacitor. The first plate of the first capacitor is preferably connected to the first plate of the second capacitor by a non-conducting mechanical link.
TL;DR: In this paper, the authors describe a portable stray-immune capacitance meter based on a four-phase charge transfer measuring circuit, which can be used as an industrial capacitance transducer with 0.20 mA current output.
Abstract: Most existing portable capacitance meters are not stray-immune, i.e., their measurements are affected by stray capacitance between the measurement terminals and earth. Therefore, it is difficult to measure small capacitance, say less than 10 pF, using those meters. This article describes a portable stray-immune capacitance meter based on a four-phase charge transfer measuring circuit. It has two measurement ranges, 2 and 20 pF. The resolution for the two different measurement ranges is 0.001 and 0.01 pF, respectively. Together with a current-to-voltage converter, it can also be used as an industrial capacitance transducer with 0–20 mA current output.
TL;DR: In this article, a switched capacitor digital to analog converter includes first and second converter segments having respective first-and second arrays of binary weighted capacitors, and each capacitor of the first segment has a first electrode connected to a first common node and a second electrode connected through respective switches to one of first and secondary reference voltage terminals.
Abstract: A switched capacitor digital to analog converter includes first and second converter segments having respective first and second arrays of binary weighted capacitors. Each capacitor of the first segment has a first electrode connected to a first common node and a second electrode connected through respective switches to one of first and second reference voltage terminals. Each capacitor of the second segment has a first electrode connected to a second common node and a second electrode connected through respective switches to one of the first and second reference voltage terminals. The converter includes a coupling capacitor connected between the first and second common nodes and capacitance means connected between the first common node and a reference voltage terminal. The coupling capacitor and capacitance means have capacitances, C s and C ATT respectively, that substantially satisfy the relationship: (2 p −1)·C s −C ATT =2 p ·C, where p is the number of bits coded in the first converter segment and C is the unit capacitance.
TL;DR: In this article, a decoupling capacitance for LSIs was developed by using a (Ba,Sr)TiO 3 (BST) Chemical Solution Deposition (CSD) film and fine-pitch electrode structure.
Abstract: Because of the rapid progress of LSI technology, the operating frequency of LSIs is increasing and the power supply voltage is decreasing. To use high-performance LSIs effectively, new decoupling capacitors that can suppress the switching noise generated by LSIs and stabilize the supply voltage are required. We have developed a capacitor which can satisfy these requirements around the 300 MHz frequency range by using a (Ba,Sr)TiO 3 (BST) Chemical Solution Deposition (CSD) film and fine-pitch electrode structure. Two 200 nm-thick BST dielectric layers are deposited on an Si wafer with an Au-base electrode. The solder bump terminal for mounting to the circuit board is formed on the top Cr/Pt/Au electrode. The developed capacitor has a capacitance density of 2 μF/cm 2 , an inductance of 30 pH, a resonant frequency around 230 MHz, and a breakdown voltage of 10 V. This paper describes the material technology of the dielectric BST film and thin-film electrode of the new capacitor.
TL;DR: In this paper, a storage module is provided including one or more capacitors, a sensor to measure the temperature of the capacitor(s), and a control device that controls the voltage at the capacitors so that the maximum voltage at either the storage module and/or the individual capacitors increases as the temperature decreases.
Abstract: Systems and methods are disclosed to store electrical energy in, for example, a vehicle. In an example system, a storage module is provided including one or more capacitors, a sensor to measure the temperature of the capacitor(s), and a control device that controls the voltage at the capacitor(s) so that the maximum voltage at the storage module and/or the individual capacitor(s) increases as the temperature decreases. The aging of the capacitor(s) and in particular electrochemical capacitors strongly depends on the temperature in addition to the operating voltage. Controlling the capacitor voltage based on temperature can, therefore, substantially reduce the aging of the capacitor(s).
TL;DR: In this paper, a non-contact capacitive proximity sensing system is used to activate a toy when a finger, lips or other body part is close to a sensing area in the form of a hidden flat conductor under the surface of a toy so that actual touching of the sensor is not required to activate any of the functions of the toy.
Abstract: For toys that respond to touch to trigger a particular response, an activation system utilizes a non-contact capacitive proximity sensing system that permits activation when a finger, lips or other body part is close to a sensing area in the form of a hidden flat conductor under the surface of a toy so that actual touching of the sensor is not required to activate any of the functions of the toy. Low capacitance coaxial cable buried in the toy is used to connect the sensing area to the capacitance detection circuit so that only the capacitance of the sensing area is measured. Proximity sensing activation occurs when there is an increase in capacitance at the sensing area due to the proximity of a body part, with the change in capacitance being detected through the use of an RC circuit in the feedback loop of an oscillator whose frequency decreases when sensed capacitance increases. Self-calibrating techniques involving adaptive threshold adjustment provide for fail safe sensing in all environments and across unit-to-unit component variations, with the thresholds being set each time the toy is turned on, then adjusted over time as necessary. In one embodiment, multiple sensing areas are sequentially addressed through a multiplexing circuit and all audio circuitry is turned off during sensing to prevent capacitance sensing errors.
TL;DR: In this article, a tunable capacitor that introduces significantly less loss, if any, costs less and is smaller than previously available, is presented, where a bias electrode is coupled to a bias material, such that the capacitor electrodes and the bias electrode are not touching.
Abstract: A tunable capacitor that introduces significantly less loss, if any, costs less and is smaller than previously available. A bias electrode is coupled to a FE material. The capacitor electrodes are electro-magnetically coupled to the FE material, such that the capacitor electrodes and the bias electrode are not touching. Only non-conductive material is in the gap defined by the capacitor electrodes. The bias electrode is used to apply a variable DC voltage to the FE material. A capacitor electrode serves as a DC ground for producing a variable DC field between the bias electrode and the capacitor electrodes.
TL;DR: In this paper, a method for fabricating an increased capacitance metal-insulator-metal capacitor using an integrated copper dual damascene process is described, which can be extended to form a parallel capacitor, a series capacitor, stacked capacitors, and so on.
Abstract: A method for fabricating an increased capacitance metal-insulator-metal capacitor using an integrated copper dual damascene process is described. A first dual damascene opening and a pair of second dual damascene openings are provided in a first dielectric layer overlying a substrate. The first and second dual damascene openings are filled with a first copper layer wherein the filled first dual damascene opening forms a logic interconnect and the filled pair of second dual damascene openings forms a pair of capacitor electrodes. The first dielectric layer is etched away between the pair of capacitor electrodes leaving a space between the pair of capacitor electrodes. The space between the pair of capacitor electrodes is filled with a high dielectric constant material to complete fabrication of a vertical MIM capacitor in the fabrication of an integrated circuit device. The fabrication of the capacitor can begin at any metal layer. The process of the invention can be extended to form a parallel capacitor, a series capacitor, stacked capacitors, and so on.
TL;DR: In this paper, the authors validate models of the SCM by comparing the calculated SCM signal to the measured signal for a variety of sample parameters, measurement conditions, and capacitance sensors from different manufacturers.
Abstract: The accuracy with which two-dimensional carrier profiles can be extracted from scanning capacitance microscopy (SCM) images of doped structures in silicon depends on the model used to interpret the SCM differential capacitance data. This work validates models of the SCM by comparing the calculated SCM signal to the measured signal for a variety of sample parameters, measurement conditions, and capacitance sensors from different manufacturers. The magnitude of the capacitance sensor high-frequency voltage is measured and its effect on ΔC–V curves and extracted carrier profiles is quantified. Two nonidealities commonly observed in SCM signals, U-shaped C–V curves and double zero crossing in the SCM signal at the p–n junctions, are related to the measurement parameters and explained.
TL;DR: In this paper, a dielectric capacitor layer consisting of freely selectable materials and having any thickness can be formed in this way, which is especially advantageous in that it enables via holes to be etched in a significantly more simple manner than according to prior art.
Abstract: According to the invention, in order to produce an integrated semiconductor product comprising integrated metal-insulator-metal capacitors, a dielectric protective layer (5) and a dielectric auxiliary layer (16) are first deposited on a first electrode (2). Said protective layer and said auxiliary layer (16) are then removed (17) from the region above the first electrode, and a dielectric layer (6) is produced, the pile of metallic strips (7, 8, 9) for the second electrode being applied to said dielectric layer. The metal-insulator-metal capacitor is then structured according to known etching methods. Dielectric capacitor layers consisting of freely selectable materials and having any thickness can be formed in this way. The present invention is especially advantageous in that it enables via holes to be etched in a significantly more simple manner than according to prior art, as the remaining dielectric capacitor layer covering the metallic strips does not need to be etched through.
TL;DR: In this paper, the authors proposed a method of making a capacitive distance sensor that includes one or more sensor cells each with first and second capacitor plates, and selected one of the capacitor patterns based on the expected size of the object and on the total perimeter values determined for the capacitor pattern.
Abstract: This invention is directed to a method of making a capacitive distance sensor that includes one or more sensor cells each with first and second capacitor plates. The method includes determining an expected range of sizes of objects the sensor will be used to detect and determining a total perimeter value for each of a plurality of capacitor patterns. Each capacitor pattern includes a different arrangement of the first and second capacitor plates and the total perimeter value is the sum of the perimeter values for the first and second capacitor plates. The method selects one of the capacitor patterns based on the expected size of the object and on the total perimeter values determined for the capacitor patterns. The selecting step includes selecting whichever one of the capacitor patterns has the largest total perimeter value if the object is smaller than each of the one or more sensor cells.