TL;DR: In this paper, a physical model is proposed which relates the effective dielectric constant of unsaturated mineral soils at TDR frequencies to their volumetric water content, porosity, and specific surface area.
Abstract: Understanding the relation between the effective dielectric constant (relative permittivity) of soils and their volumetric water content is important because measurements of the dielectric constant of soils by capacitance sensors, time domain reflectometry (TDR) probes, and remote-sensing radar devices are used to determine their moisture content. In the present study a physical model is proposed which relates the effective dielectric constant of unsaturated mineral soils at TDR frequencies to their volumetric water content, porosity, and specific surface area. It is assumed that the solid, water, and air components form a mixture of composite spheres and that the radial order of the single-phase concentric shells depends on the saturation degree of the medium. The dielectric constant of the aqueous phase is smaller than that of free water, because of interfacial solid-liquid forces, and the dependence of this reduction on the moisture content and on the specific surface area is represented here via a general approximated relationship. The model prediction is based on readily available soil properties (porosity, specific surface area, or texture), and it does not require any calibration. Tests of the model predictions against measurements made here on 3 porous media and against published data for an additional 19 media resulted in a promising agreement, with the proposed model's predictions being better than those given by the commonly used empirical relations for mineral soils. It is believed that the model performance could be further improved by better representation of the saturation degree-dependent, three-phase configuration by considering nonspherical soil particles and by a more realistic incorporation of interfacial relaxation processes.
TL;DR: In this paper, a high Q MEMS capacitor that can be continuously tuned with a large tuning ratio or reversibly trimmed using an electrostatic force was presented. But the tuning error was not addressed.
Abstract: A high Q MEMS capacitor that can be continuously tuned with a large tuning ratio or reversibly trimmed using an electrostatic force. The tunable capacitor has a master/slave structure in which a control voltage is applied to the master (control) capacitor to set the capacitance of the slave (signal) capacitor to which an RF signal is applied via a suspended mechanical coupler. The master-slave structure reduces tuning error by reducing the signal capacitor's surface area and increasing its spring constant, and may eliminate the need for discrete blocking inductors by electrically isolating the control and signal capacitors. The trimmable capacitor provides an electrostatic actuator that selectively engages a stopper with teeth on a tunable capacitor structure to fix the trimmed capacitance.
TL;DR: In this article, the authors assess the capabilities of recently developed multisensor capacitance probes and monitoring systems to measure the dynamics of soil water content under long-term field-scale conditions, and to quantify in real-time the spatial variation of soil Water content under plow-tillage (PT) and no-tilage (NT) corn (Zea mays L).
Abstract: Water is often the primary factor limiting plant growth, and it is the primary agent for moving plant nutrients and pesticides to streams and groundwater. This study was conducted to assess the capabilities of recently developed multisensor capacitance probes and monitoring systems to measure the dynamics of soil water content under long-term field-scale conditions, and to quantify in real time the spatial variation of soil water content under plow-tillage (PT) and no-tillage (NT) corn (Zea mays L). Probes were placed at eight nontraffic interrow locations, with cable lengths ranging from 25 to 125 m, on a 0.5-ha field site. The capacitance sensors were centered at four soil depths and readings were taken every 10 min by the data-logging system. Real-time dynamics of soil water change following 82 mm of rainfall in the spring were used to identify the apparent water-holding capacity within the sensor depths (5–55 cm) under NT as 171 mm and 155 mm under PT. Rates of soil water loss with a full canopy of corn were 90% of high evapotranspiration (ET) demand. Breaking points were observed and calculated between high and low rates of soil water loss, under full canopy and high ET demand. Changes from high to low rates of soil water loss were more evident in PT plots (62% reduction) than in NT plots (46% reduction). At the end of three drying cycles during the growing season, there was an average of 37 mm more water (5–55-cm soil depth) under NT than PT. The multisensor capacitance probes proved to be highly sensitive and robust for field-scale, real-time, soil water research.
TL;DR: In this article, a programmable integrated circuit capacitor array includes a plurality of binarily weighted capacitors and switches that selectively couple the capacitors in parallel between first and second terminals.
Abstract: A programmable integrated circuit capacitor array includes a plurality of binarily weighted capacitors (16) and a plurality of switches (18) selectively coupling the capacitors in parallel between first and second terminals. A control circuit (10) responds to a plurality of capacitance selection inputs (CS0,1,2) in conjunction with a plurality of trim inputs (TR0,1) and a sign input (TRS) to produce a plurality of selection signals (SEL0,1...7) on control electrodes of the switches to couple one or more of the capacitors and thereby provide an accurate value of the desired capacitance between the first and second terminals despite any manufacturing deviations in capacitance per unit area.
TL;DR: In this paper, a variable capacitor is provided with an absorbent material, which absorbs the liquid phase of the propellant in the pump housing and acts as a dielectric between two stationary conductive plates provided in the housing.
Abstract: Reservoir volume in a drug delivery device is sensed by providing a capacitor, the capacitance of which varies with bellows position or, alternatively, with the amount of propellant liquid absorbed in a dielectric material. In one embodiment, a capacitance is provided between a surface of the bellows, which acts as a first capacitor plate, and a conductive surface disposed proximate the bellows, which acts as a second capacitor plate. As the bellows moves from its extended full position to its collapsed empty position, the area of overlap, and therefore the capacitance between the first and second plates varies from a maximum value to a minimum value. In another embodiment, a variable capacitor is provided with an absorbent material. The absorbent material absorbs the liquid phase of the propellant in the pump housing and acts as a dielectric between two stationary conductive plates provided in the housing. The amount of liquid propellant absorbed in the absorbent material varies with the reservoir volume. When the reservoir is in its full, expanded position, more liquid propellant is absorbed in the absorbent material. When the reservoir is in its compressed empty position, more of the propellant exists as vapor within the pump housing and therefore less liquid propellant is absorbed in the absorbent material. The dielectric properties of the capacitor are therefore higher and the capacitance is therefore maximized when the reservoir is in its full, extended position. Conversely, the dielectric properties are lower and the capacitance minimized when the reservoir is in its compact, empty position.
TL;DR: In this article, a three-dimensional capacitance model based on Poisson's equation was proposed for a helical surface plate capacitance sensor with respect to sensitivity, accuracy and flow regime independency.
TL;DR: A multi-layer ceramic capacitor and method of manufacturing the capacitor, the capacitor having signal vias surrounded by an area containing a material having a low dielectric constant, the via and surrounding area of low-dielectric-constant material inserted in a material with a high dielectoric constant is described in this article.
Abstract: A multi-layer ceramic capacitor and method of manufacturing the capacitor, the capacitor having signal vias surrounded by an area containing a material having a low dielectric constant, the via and surrounding area of low dielectric constant material inserted in a material having a high dielectric constant.
TL;DR: In this paper, a physically based model was used to calibrate capacitance probes in terms of relative permittivity (er), which can then be used to estimate soil water content.
Abstract: . Capacitance probes are a fast, safe and relatively inexpensive means of measuring the relative permittivity of soils, which can then be used to estimate soil water content. Initial experiments with capacitance probes used empirical calibrations between the frequency response of the instrument and soil water content. This has the disadvantage that the calibrations are instrument-dependent. A twofold calibration strategy is described in this paper; the instrument frequency is turned into relative permittivity (dielectric constant) which can then be calibrated against soil water content. This approach offers the advantages of making the second calibration, from soil permittivity to soil water content. instrument-independent and allows comparison with other dielectric methods, such as time domain reflectometry. A physically based model, used to calibrate capacitance probes in terms of relative permittivity (er) is presented. The model, which was developed from circuit analysis, predicts, successfully, the frequency response of the instrument in liquids with different relative permittivities, using only measurements in air and water. lt was used successfully to calibrate 10 prototype surface capacitance insertion probes (SCIPS) and a depth capacitance probe. The findings demonstrate that the geometric properties of the instrument electrodes were an important parameter in the model, the value of which could be fixed through measurement. The relationship between apparent soil permittivity and volumetric water content has been the subject of much research in the last 30 years. Two lines of investigation have developed, time domain reflectometry (TDR) and capacitance. Both methods claim to measure relative permittivity and should therefore be comparable. This paper demonstrates that the IH capacitance probe overestimates relative permittivity as the ionic conductivity of the medium increases. Electrically conducting ionic solutions were used to test the magnitude of this effect on the determination of relative permittivity. The response was modelled so that the relative permittivity, independent of ionic conductivity, could be determined in solutions with an electrical conductivity of up to 0.25 S m-1. It was found that a solution EC of less than 0.05 S m-1 had little impact on the permittivity measurement.
TL;DR: In this paper, a variable area capacitance with a flexible electrode responsive to a physical effect and a rigid electrode with a predetermined surface contour is dimensioned to provide a specific change in capacitance, with deflection of the flexible electrode.
Abstract: A variable area capacitor with a flexible electrode responsive to a physical effect and a rigid electrode with a predetermined surface contour. The surface contour is dimensioned to provide a specific change in capacitance with deflection of the flexible electrode. A thin dielectric layer maintains a substantially fixed spacing between the two electrodes. Preferred embodiments include a pressure sensor, microphone and accelerometer. A differential transconductance amplifier detects changes of the variable capacitor in a low-impedance, bridge-like circuit and feeds back current to balance the bridge. The voltage that controls the feedback current is proportional to capacitance over a wide dynamic range.
TL;DR: In this article, a semiconductor device having reduced parasitic capacitance and, consequentially increased integrated circuit speed, is achieved by removing sections of dielectric interlayers which do not support conductive patterns, as by anisotropic etching, to form air gaps which can remain or are filled in with a dielectrics material having a low dielectoric constant.
Abstract: A semiconductor device having reduced parasitic capacitance and, consequentially increased integrated circuit speed, is achieved by removing sections of dielectric interlayers which do not support conductive patterns, as by anisotropic etching, to form air gaps which can remain or are filled in with a dielectric material having a low dielectric constant. In another embodiment, a conformal dielectric coating is deposited, having a low dielectric constant.
TL;DR: In this paper, a thin-film technology multi-layer capacitance with enhanced capacitance and/or reduced space requirement was proposed, where the dielectric layers of which are alternately disposed between electrode layers on a substrate.
Abstract: A thin-film technology multi-layer capacitor with enhanced capacitance and/or reduced space requirement. The dielectric layers of which are alternately disposed between electrode layers on a substrate. Through alternate electrode layer connections, parallel interconnection of the individual capacitor layers is obtained. The result is that the individual capacitances are additive, while the temperature response can be optimized by a suitable choice or combination of different dielectric layers.
TL;DR: In this article, a phase-locked loop (PLL) frequency synthesizer with a variable capacitance voltage controlled oscillator (VCO) was proposed to synthesize high-frequency signals, such as wireless communication signals.
Abstract: A method and apparatus for synthesizing high-frequency signals, such as wireless communication signals, includes a phase-locked loop (PLL) frequency synthesizer with a variable capacitance voltage controlled oscillator (VCO) that has a discretely variable capacitance in conjunction with a continuously variable capacitance. The discretely variable capacitance may provide coarse tuning adjustment of the variable capacitance to compensate for capacitor and inductor tolerances and to adjust the output frequency to be near the desired frequency output. The continuously variable capacitance may provide a fine tuning adjustment of the variable capacitance to focus the output frequency to match precisely the desired frequency output. The continuously variable capacitance may be formed by using a plurality of separate capacitance circuits. The individual capacitance circuits may include two capacitors coupled to a variable resistance element. The variable resistance element may be a transistor controlled by an analog control voltage. The total capacitance of the continuously variable capacitance may be substantially linear with respect to the phase of the VCO output while the individual capacitance circuits exhibit nonlinear behavior.
Abstract: A multilevel capacitor structure compatible with CMOS processing for use in switched capacitor circuits is disclosed. The capacitor structure has an associated parasitic capacitor which is placed in such a way so as to minimize the impact on the performance of a the switched capacitor circuit. The parasitic capacitor is formed between a first plate of the shielded capacitor and a diffusion well within a substrate. The diffusion well is connected to a quiet voltage reference source to isolate the shielded capacitor from noise present on the substrate. The shielded capacitor has a first plate that is fabricated from a first conductive material such as polycrystalline silicon or polycide, a second plate fabricated from a second conductive material such as a first level of metal on an integrated circuit, and a third capacitor plate fabricated from a second level of metal of an integrated circuit. The first plate and the third plate are connected to give a total capacitance given by the sum of capacitances between the first plate and second plate and between the second plate and third plate.
TL;DR: In this paper, two conductors are located to partially surround the flow chamber so that the material flows between the conductors, where more than one chamber is used, and a measurement circuit connected to conductors provides an output corresponding to a difference between test and reference frequencies.
Abstract: A capacitive sensor includes one or more chambers through which a material can flow. Two conductors are located to partially surround the flow chamber so that the material flows between the conductors. Where more than one chamber is used, additional conductors are provided. A measurement circuit connected to the conductors provides an output corresponding to a difference between test and reference frequencies. A display indicates the measured capacitance as a continuous-scale, proportional representation or a binary representation. The sensor system can measure volume charge density of a fluid or parameters responsive to changes in volume charge density, such as flow velocity.
TL;DR: An asymmetric electrochemical capacitance has at least a larger capacitance electrode and a smaller capacitance electrodes, with an electrolyte therebetween as mentioned in this paper, and the larger capacance has a larger absolute capacitance than the smaller capacance.
Abstract: An asymmetric electrochemical capacitor has at least a larger capacitance electrode and a smaller capacitance electrode, with an electrolyte therebetween. The larger capacitance electrode has a larger absolute capacitance than the smaller capacitance electrode. The capacitor thus has an overall capacitance which is approximately the absolute capacitance of the smaller capacitance electrode. The electrodes may be made of different materials, with the larger capacitance electrode made of the material having a larger specific capacitance. The larger capacitance electrode may thus be the same physical size as or smaller than the smaller capacitance electrode.
TL;DR: In this article, a method for forming a capacitor includes forming a substrate having a node location to which electrical connection to a capacitor is to be made, forming an inner capacitance plate over the node location, the inner capacitor plate having an exposed sidewall; forming an oxidation barrier layer over the exposed inner capacitor plates sidewall.
Abstract: A method for forming a capacitor includes forming a substrate having a node location to which electrical connection to a capacitor is to be made; forming an inner capacitor plate over the node location, the inner capacitor plate having an exposed sidewall; forming an oxidation barrier layer over the exposed inner capacitor plate sidewall; forming a capacitor dielectric plate over the inner capacitor plate, the oxidation barrier layer restricting oxidation of the inner capacitor plate sidewall during formation of the capacitor dielectric plate; and forming an outer capacitor plate over the capacitor dielectric plate. A capacitor is further described which includes an inner capacitor plate having at least one sidewall; an oxidation barrier layer positioned in covering relation relative to the at least one sidewall; a capacitor dielectric plate positioned over the inner capacitor plate; and an outer capacitor plate positioned over the capacitor dielectric plate. In the preferred form of the invention, an insulating dielectric layer is positioned on the oxidation barrier layer, the insulating dielectric layer being of a different composition than the oxidation barrier layer.
TL;DR: The capacitance probe is an attractive device for monitoring soil moisture automatically as discussed by the authors, however, its sphere of influence is rather small (a few cubic centimetres only) and it is not suitable for field-scale monitoring.
Abstract: Summary
The capacitance probe is an attractive device for monitoring soil moisture automatically. However, its sphere of influence is rather small (a few cubic centimetres only). We have analysed the possibility of monitoring moisture at the field scale using only a few probes (≤3). We calibrated each probe by establishing a direct relation between the field average soil moisture θf and the signal given by the probe. As in earlier studies, we found that a linear relation is generally suitable. A classical statistical analysis was performed to assess the error of a single probe. When replicate probes were installed, we obtained replicate estimates of θf. We proposed an estimator θf that combines all replications optimally.
Three experiments each lasting several months were carried out on bare tilled fields to evaluate the probe against gravimetric measurements. Our results show that the calibrations differ significantly from one probe to another. Once calibrated, the capacitance probe provided accurate soil moisture measurements (70% of the calibration relations had residual standard deviations < 0.02m3m−3), but it is advisable to have at least two replicate probes. Soil water storage was well estimated by combining four to seven probes to establish the moisture profile, despite the error induced by each probe. Moreover, the temporal variations in water storage were accurately measured by the probes. We found an error of 0.6 mm day−1 (standard deviation) in daily variation of the water storage, which partly involved the error made on the reference measurements (gravimetric method).
TL;DR: In this article, a variable capacitance array with multiple capacitance modules (508, 540 and 550) is proposed to calibrate a wide range of devices to improve the response to power fluctuations by maintaining a consistent relationship between the capacitive value (510, 542, 544, 552 and 556) and the parasitic capacitance in each capacitance module.
Abstract: The invention provides a unique apparatus and method which varies the capacitance coupled to a circuit. In one embodiment, the variable capacitance comprises a unique variable capacitance array (402) with multiple capacitance modules (508, 540 and 550) which can be selectively enabled. Each capacitance module has a capacitive value (510, 542, 544, 552 and 556) and a corresponding parasitic capacitance. The invention provides high linearity, low spread, improves the response to power fluctuations by maintaining a consistent relationship between the capacitive value (510, 542, 544, 552 and 556) and the parasitic capacitance in each capacitance module (508, 540 and 550). For example, the invention can be used with devices to provide a linear variation of capacitance. In addition, the invention can be used to calibrate a wide range of devices.
TL;DR: In this paper, a cylindrical cell is used to measure the density and the dielectric constant of a soil sample placed within the cell and a multiple rod probe is designed to contact spikes driven into the ground to measure in-place soil density and moisture content.
Abstract: A method and apparatus for measuring in-place soil density and moisture content. A cylindrical cell is disclosed which may be used to measure the density and the dielectric constant of a soil sample placed within the cylindrical cell. Also disclosed is a multiple rod probe which is designed to contact spikes driven into the ground to measure the in-place dielectric constant of soil. The multiple rod probe includes adjustable studs which ensure complete contact with the spikes. Both measurements are performed using time domain reflectometry. The present invention develops equations for determining the density of the soil in-place from the measured dielectric constant of the soil in-place and the measured density and dielectric constant of the soil in the cylindrical cell.
TL;DR: In this paper, a method for forming a capacitance useful with semiconductor devices is described and a contact formed in a layer of an insulating material of a semiconductor device is presented.
Abstract: A capacitor useful with semiconductor devices and a method for forming such a capacitor is provided. The capacitor comprises a contact formed in a layer of an insulating material of a semiconductor device; a first electrode formed on the layer of insulating material, the first electrode contacting the contact and having a nodular shape; a layer of a dielectric material formed on the first electrode; and a second electrode formed on the layer of the dielectric material. Desirably, the dielectric layer of the capacitor is formed from a high dielectric constant material. In another embodiment, the capacitor includes a layer of a barrier material positioned between the contact and the first electrode.
TL;DR: For high-accuracy signal processing of differential-capacitance transducers, an interface circuitry is developed based on a relaxation oscillator that can detect the capacitance change as small as 0.1% of the total capacitance in 10 /spl mu/s.
Abstract: For high-accuracy signal processing of differential-capacitance transducers, an interface circuitry is developed based on a relaxation oscillator. The interface consists of an integrator, a differentiator, and a comparator, and it uses two capacitors of the transducer-one for the integration and the other for the differentiation. This configuration allows the ratiometric operation in the amplitude domain and provides a square wave whose amplitude is proportional to the ratio of the capacitance difference between the two transducer capacitors to their sum. A circuit analysis shows that the interface can detect the capacitance change as small as 0.1% of the total capacitance in 10 /spl mu/s. Experimental results are also given to confirm the analysis.
TL;DR: In this article, the authors presented a method of treating a dielectric layer 24 with O2 plasma and ozone environment, which can be useful in forming a capacitor 12 dielectrics 24.
Abstract: In one embodiment, the present invention provides a method of treating a dielectric layer 24. First, the dielectric layer is heated while being subjected to an O2 plasma. After that, the dielectric layer is heated while being subject to an ozone environment. This method can be useful in forming a capacitor 12 dielectric 24. In turn, the capacitor could be used in a DRAM memory device.
TL;DR: In this paper, the authors compared 23 soil water sensors representing eight different types of sensors: a Troxler Neutron Gage, a Sentry 200-AP capacitance probe, Aqua-Tel capacitance sensors, TDR with two-and four-rod waveguides, gypsum blocks, Watermark® electrical resistance blocks, and Agwatronics® heat dissipation blocks.
Abstract: Numerous sensors are currently available to measure soil water content. Although several studies have
compared relative sensor performance in the field, there have been no reports of sensor comparisons with carefully
controlled soil water contents. Weighed soil columns were used to compare 23 soil water sensors representing eight
sensor types. Included in the study were: a Troxler neutron gage, a Troxler Sentry® 200-AP capacitance probe, Aqua-
Tel® capacitance sensors, time domain reflectometry (TDR) with two- and four-rod waveguides, gypsum blocks,
Watermark® electrical resistance blocks, and Agwatronics® heat dissipation blocks. Measurement errors of the
volumetric water content of the soil were determined for each sensor over a range of water contents from the maximum
water holding capacity to below 5%.
A loam and a sandy loam soil were wetted to the maximum water holding capacity and subsequently drained through
four cycles. Sensors were calibrated using data from the first cycle and measurement errors for each sensor were
determined using those calibrations in three additional cycles. Measurements outside the range of 0 to 50% volumetric
soil water content were discarded. Of 64 possible readings in the test, only the neutron gage and the Aqua-Tel capacitance
sensor gave 64 viable readings. The Sentry capacitance probe had the lowest measurement error and yielded 62 of
64 viable readings. Watermark sensors had measurement errors similar to the electrical capacitance sensors, but
averaged 57 of 64 viable readings. In order of decreasing performance, the Aqua-tel electrical capacitance sensor, the
Sentry electrical capacitance probe, the neutron gage, and the Watermark sensors performed best in this study when
accuracy, reliability, durability, and installation factors were considered.
TL;DR: Fractal shapes can be used to maximize the length of the perimeter of adjacent capacitor conductive components in a single metal layer as mentioned in this paper, where the Koch Islands and Minkowski Sausage families of fractals are particularly well suited for generating capacitor-conductive component perimeter shapes.
Abstract: Linear integrated circuit capacitors having greater capacitance per unit area by using lateral flux. One embodiment comprises a two metal layer capacitor wherein each metal layer is comprised of two capacitor conductive components. The capacitor conductive components are cross-coupled so that the total capacitance is the sum of the vertical flux between the metal layers, and the lateral flux along the edges between the two capacitor conductive components in each of the metal layers. The lateral flux between the capacitor conductive components in a single metal layer increases the capacitance per unit area and decreases the bottom-plate parasitic capacitance. Increasing the length of the common edge formed by capacitor conductive components in a metal layer increases the capacitance per unit area. In one lateral flux capacitor, each metal layer is comprised of a plurality of rows, alternate rows are coupled together such that lateral flux is generated between each of the rows. The rows are also cross-coupled with rows in adjacent metal layers to provide vertical flux. Fractal shapes can be used to maximize the length of the perimeter of adjacent capacitor conductive components in a single metal layer. The Koch Islands and Minkowski Sausage families of fractals are particularly well suited for generating capacitor conductive component perimeter shapes. These fractals are generated by selecting an initiator shape and repeatedly applying a generator. The fractal shapes are generated by a computer program based upon user input parameters.
TL;DR: In this paper, a chip capacitor is arranged on a microstrip conductor forming the microstrip line, and the dielectric material and electrodes provided on both ends of the line are connected.
Abstract: A chip capacitor is arranged on a microstrip conductor forming a microstrip line. The chip capacitor has a dielectric material and electrodes provided on both ends thereof. The electrodes of the chip capacitor are connected to the microstrip conductor. A resonance frequency is decided by the length of the microstrip conductor between the electrodes of the chip capacitor, the dielectric constant and the thickness of the dielectric substrate and the capacitance value of the chip capacitor.
TL;DR: In this article, computer-implemented methods and apparatus for extracting and computing parasitic capacitance values and capacitances respectively, from a physical design of an integrated circuit are described.
Abstract: Computer-implemented methods and apparatus for extracting and computing parasitic capacitance values and capacitances respectively, from a physical design of an integrated circuit are described. In one embodiment, the physical design comprises a plurality of layered conductors which are disposed within a first dielectric material. At least one conductor of the plurality of conductors is identified, and for the identified conductor, the first dielectric material is replaced for calculational purposes with a second (fictitious) dielectric material having a dielectric constant which is higher than the dielectric constant of the replaced dielectric material. In general, the second dielectric may have a different dielectric constant for each identified layer or elevation. Parasitic capacitance values are then computed for the integrated circuit. In a preferred embodiment, spaced-apart conductors at a common substrate elevation are identified, and a distance between the conductors is determined. If the determined distance exceeds a predetermined distance value, the first dielectric material is replaced with the second dielectric material. Such provides a basis for extracting parasitic capacitance values and computing one or more parasitic capacitances which more accurately represents the effect of the presence of fill structures within the physical integrated circuit.
TL;DR: In this article, a linear capacitor is formed in an IC which has horizontally oriented interconnect layers that are vertically separated by dielectric material, and two separated metal plates of the capacitor are electrically connected to the conductors of different vertically-separated metal interconnect layer.
Abstract: A linear capacitor formed in an IC which has horizontally oriented interconnect layers that are vertically separated by dielectric material. Two separated metal plates of the capacitor are electrically connected to the conductors of different vertically-separated metal interconnect layers. The metal plates extend substantially vertically through the thicker dielectric material separating the interconnect layers, to provide a relatively high capacitance per unit of surface consumed. The interconnect layers to which the plates are connected are separated from a substrate of the IC by at least one layer of dielectric, to reduce parasitic effects. Forming the capacitor plates and the interconnect layers from at least some of the same metals simplifies construction and reduces cost, while providing linear response characteristics. Placing the capacitor between the interconnect layers avoids consuming space on the substrate to construct the capacitor.
TL;DR: A vertical plate capacitor is formed in interlayer dielectric material which separates conductors of upper and lower interconnect layers by a method which avoids the accumulation of residual materials from chemical mechanical polishing (CMP) as discussed by the authors.
Abstract: A vertical plate capacitor is formed in interlayer dielectric material which separates conductors of upper and lower interconnect layers by a method which avoids the accumulation of residual materials from chemical mechanical polishing (CMP). The method comprises the steps of forming a capacitor via into the interlayer dielectric material, forming a first conductive layer having a U-shaped portion into the capacitor via, forming U-shaped capacitor dielectric material in the U-shaped portion of the first conductive layer, forming a second conductive layer having a U-shaped portion in the U-shaped capacitor dielectric material, filling an interior of the U-shaped portion of the second conductive layer with a plug material, and polishing after the capacitor via is entirely occupied by these elements.
TL;DR: In this article, a phase-locked loop (PLL) frequency synthesizer with a variable capacitance was described, and a capacitor circuit was proposed for coupling a voltage node between the capacitor and the transistor to the signal node when the transistor is in an off state.
Abstract: A method and apparatus for synthesizing high-frequency signals is disclosed that overcomes integration problem associated with prior implementations while meeting demanding phase noise and other impurity requirements. In one embodiment, a phase-locked loop (PLL) frequency synthesizer is disclosed having a voltage controlled oscillator (VCO) with a variable capacitance that includes a discretely variable capacitance in conjunction with a continuously variable capacitance. The discretely variable capacitance may provide coarse tuning adjustment of the variable capacitance, and the continuously variable capacitance may provide a fine tuning adjustment of the variable capacitance. In a further detail, a capacitor circuit is disclosed for the discretely variable capacitance that includes a transistor that selectively couples a capacitor between a signal node and ground and a means for coupling a voltage node between the capacitor and the transistor to the signal node when the transistor is in an “off” state. The means for coupling may be a second transistor.
TL;DR: A capacitance detecting circuit which can ensure flexibility in application without restriction imposed by a capacitance arrangement such as a single capacitance, differential capacitance or electrostatic servo and like arrangements, to a great advantage includes an operational amplifier having an inverting input terminal and an output terminal between which a feedback capacitance component is connected.
Abstract: A capacitance detecting circuit which can ensure flexibility in application without restriction imposed by a capacitance arrangement such as a single capacitance, differential capacitance, differential capacitance electrostatic servo and like arrangements, to a great advantage includes an operational amplifier having an inverting input terminal and an output terminal between which a feedback capacitance component is connected, a capacitance sensor having an electrostatic capacitance subjected to change under action of an external force, a switch for electrically charging the capacitance component of the capacitance sensor by connecting a charge/discharge terminal of the capacitance component to a reference voltage at a first clock timing for discharging the feedback capacitance component and switching the charge/discharge terminal to the feedback capacitance component at a second clock timing to transfer electric charge, and a sample-and-hold circuit for converting the transferred electric charge to the sensor output voltage.