Abstract: A subset of recently disclosed burst-error correcting codes are described. The procedure for constructing these codes is very simple. An illustrative example is included. The codes are very efficient for most burst lengths. It is found that the efficiency approached maximum possible for burst-error correcting codes as the burst length increases beyond 10. By virtue of the fact that the codes are cyclic, the circuitry of the codes is very simple. It is shown that the decoder circuitry is similarly simple and suitable for LSI.