About: Boolean function is a research topic. Over the lifetime, 10089 publications have been published within this topic receiving 201604 citations. The topic is also known as: Boolean operation.
TL;DR: This paper proposes an approach to reversible logic synthesis using a new complexity measure based on shared binary decision diagrams with complemented edges (instead of truth tables or PPRM forms), which can be used with arbitrary libraries of reversible logic gates and arbitrary cost functions.
Abstract: Reversible logic has applications in many fields, including quantum computing. Synthesis techniques for reversible circuits are not well developed, even for functions with a small number of inputs and outputs. This paper proposes an approach to reversible logic synthesis using a new complexity measure based on shared binary decision diagrams with complemented edges (instead of truth tables or PPRM forms, as in the previous algorithms). The approach can be used with arbitrary libraries of reversible logic gates and arbitrary cost functions. Experiments show promising results in comparison with the known approaches.
TL;DR: In this paper, a cost function that has found excellent single-output Boolean functions can be generalised to provide improved results for small S-boxes, which is a difficult task: several criteria must be traded off.
Abstract: Substitution boxes (S-boxes) are important components in many modern-day symmetric key ciphers. Their study has attracted a great deal of attention over many years. The emergence of a variety of cryptosystem attacks has shown that substitutions must be designed with great care. Some general criteria such as high non-linearity and low autocorrelation have been proposed (providing some protection against attacks such as linear cryptanalysis and differential cryptanalysis). The design of appropriate S-boxes is a difficult task: several criteria must be traded off and the design space is huge. There has been little application of evolutionary search to the development of S-boxes. In this paper we show how a cost function that has found excellent single-output Boolean functions can be generalised to provide improved results for small S-boxes.
TL;DR: It is shown that the area of any circuit computing a transitive function grows quadratically with the circuit's maximum data rate, expressed in bits/S, which provides a precise analytic expression of an area-time tradeoff for a wide class of VLSI circuits.
Abstract: We introduce a property of Boolean functions, called transitivity which consists of integer, polynomial, and matrix products as well as of many interesting related computational problems. We show that the area of any circuit computing a transitive function grows quadratically with the circuit's maximum data rate, expressed in bits/S. This result provides a precise analytic expression of an area-time tradeoff for a wide class of VLSI circuits. Furthermore (as shown elsewhere), this tradeoff is achievable. We have thus matching (to within a constant multiplicative factor) upper and lower complexity bounds for the three above products, in the VLSI circuits computational model.
TL;DR: This paper presents logic optimization techniques for multilevel combinational networks which apply a sequence of perturbations which result in simplification of the circuit through wires/gates addition and removal which are guided by the ATPG based reasoning.
Abstract: In this paper, we present logic optimization techniques for multilevel combinational networks. Our techniques apply a sequence of perturbations which result in simplification of the circuit. The perturbation and simplification is achieved through wires/gates addition and removal which are guided by the Automatic Test Pattern Generation (ATPG) based reasoning. The main operations of our approaches are incremental transformations of the circuit (such as adding wires/gates and changing gate's functionality) to remove some particular wire, At each iteration, a summary information of such wires/gates addition and removal is precomputed first. Then, a transformation is chosen to remove several wires at once. We have performed experiments on MCNC benchmarks and compared the results to those of misII and RAMBO. Experimental results are very encouraging.
TL;DR: This paper provides a comprehensive framework for the state-space approach to Boolean networks, and reveals the indistinct rolling gear structure of a Boolean network.
Abstract: This paper provides a comprehensive framework for the state-space approach to Boolean networks. First, it surveys the authors' recent work on the topic: Using semitensor product of matrices and the matrix expression of logic, the logical dynamic equations of Boolean (control) networks can be converted into standard discrete-time dynamics. To use the state-space approach, the state space and its subspaces of a Boolean network have been carefully defined. The basis of a subspace has been constructed. Particularly, the regular subspace, Y-friendly subspace, and invariant subspace are precisely defined, and the verifying algorithms are presented. As an application, the indistinct rolling gear structure of a Boolean network is revealed.