Abstract: Approximate computing is an emerging paradigm that, by relaxing the requirement for full accuracy, offers benefits in terms of design area and power consumption This paradigm is particularly attractive in applications where the underlying computation has inherent resilience to small errors Such applications are abundant in many domains, including machine learning, computer vision, and signal processing In circuit design, a major challenge is the capability to synthesize the approximate circuits automatically without manually relying on the expertise of designers In this work, we review methods devised to synthesize approximate circuits, given their exact functionality and an approximability threshold We summarize strategies for evaluating the error that circuit simplification can induce on the output, which guides synthesis techniques in choosing the circuit transformations that lead to the largest benefit for a given amount of induced error We then review circuit simplification methods that operate at the gate or Boolean level, including those that leverage classical Boolean synthesis techniques to realize the approximations We also summarize strategies that take high-level descriptions, such as C or behavioral Verilog, and synthesize approximate circuits from these descriptions

Abstract: In this article, a general theoretical framework is developed for the state estimation problem of stochastic time-varying Boolean networks (STVBNs). The STVBN consists of a system model describing the evolution of the Boolean states and a model relating the noisy measurements to the Boolean states. Both the process noise and the measurement noise are characterized by sequences of mutually independent Bernoulli distributed stochastic variables taking values of 1 or 0, which imply that the state/measurement variables may be flipped with certain probabilities. First, an algebraic representation of the STVBNs is derived based on the semitensor product. Then, based on Bayes’ theorem, a recursive matrix-based algorithm is obtained to calculate the one-step prediction and estimation of the forward–backward state probability distribution vectors. Owing to the Boolean nature of the state variables, the Boolean Bayesian filter is designed that can be utilized to provide the minimum MSE state estimate for the STVBNs. The fixed-interval smoothing filter is also obtained by resorting to the forward–backward technique. Finally, a simulation experiment is carried out for the context estimation problem of the $p53$ - $MDM2$ negative-feedback gene regulatory network.

Abstract: Since it was proposed in 2015 as a generalization of integral properties, the division property has evolved into a powerful tool for probing the structures of Boolean functions whose algebraic normal forms are not available. We capture the most essential elements for the detection of division properties from a pure algebraic perspective, proposing a technique named as monomial prediction, which can be employed to determine the presence or absence of a monomial in any product of the coordinate functions of a vectorial Boolean function \(\textit{\textbf{f}}\) by counting the number of the so-called monomial trails across a sequence of simpler functions whose composition is \(\textit{\textbf{f}}\). Under the framework of the monomial prediction, we formally prove that most algorithms for detecting division properties in literature raise no false alarms but may miss. We also establish the equivalence between the monomial prediction and the three-subset bit-based division property without unknown subset presented at EUROCRYPT 2020, and show that these two techniques are perfectly accurate.

Abstract: The outputs robustness is a property where the outputs of a system are insensitive to disturbances, and the property plays an important role in biological systems or engineering design. This paper presents an approach to analyze the outputs robustness with respect to disturbances (w.r.t. disturbances) for Boolean control networks (BCNs). Based on the wiring digraph of a BCN rather than the state transition digraph, an algorithm is proposed to construct a corresponding permutation digraph and permutation system. Then, we prove that if there exists a pinning controller such that the outputs of a permutation system are robust w.r.t. disturbances, then there must also exist another pinning controller such that the outputs of the corresponding original systems achieve robustness. Furthermore, pinning controllers are designed based on the neighbors of the pinned-nodes rather than all of the nodes. Finally, the proposed method is well demonstrated by a reduced signal transduction network.

Abstract: Data transfer between processing and memory units in modern computing systems is their main performance and energy-efficiency bottleneck, commonly known as the von Neumann bottleneck. Prior research attempts to alleviate the problem by moving the computing units closer to the memory that has had limited success since data transfer is still required. In this chapter, we present mMPU memristive memory processing unit, which relies on a memristive memory to perform computation using the memory cells, and therefore directly tackles the von Neumann bottleneck. In mMPU, the operation is controlled by a modified controller and peripheral circuit without changing the structure of the memory cells and arrays. As the basic logic element, we present Memristor-Aided loGIC (MAGIC), a technique to compute logical functions using memristors within the memory array. We further show how to extend basic MAGIC primitives to execute any arbitrary Boolean function and demonstrate the microarchitecture of the memory. This process is required to enable data computing using MAGIC. Finally, we show how to build the computing system using mMPU, which performs computation using MAGIC to enable a real processing-in-memory machine.

Abstract: The globalization of the IC supply chain has raised many security threats, especially when untrusted parties are involved. This has created a demand for a dependable logic obfuscation solution to combat these threats. Amongst a wide range of threats and countermeasures on logic obfuscation in the 2010s decade, the Boolean satisfiability (SAT) attack, or one of its derivatives, could break almost all state-of-the-art logic obfuscation countermeasures. However, in some cases, particularly when the logic locked circuits contain complex structures, such as big multipliers, large routing networks, or big tree structures, the logic locked circuit is hard-to-be-solved for the SAT attack. Usage of these structures for obfuscation may lead a strong defense, as many SAT solvers fail to handle such complexity. However, in this paper, we propose a neural-network-guided SAT attack (NNgSAT), in which we examine the capability and effectiveness of a message-passing neural network (MPNN) for solving these complex structures (SAT-hard instances). In NNgSAT, after being trained as a classifier to predict SAT/UNSAT on a SAT problem (NN serves as a SAT solver), the neural network is used to guide/help the actual SAT solver for finding the SAT assignment(s). By training NN on conjunctive normal forms (CNFs) corresponded to a dataset of logic locked circuits, as well as fine-tuning the confidence rate of the NN prediction, our experiments show that NNgSAT could solve 93.5% of the logic locked circuits containing complex structures within a reasonable time, while the existing SAT attack cannot proceed the attack flow in them.

Abstract: Quantum-dot Cellular Automata (QCA) is one of the most important computing technologies for the future and will be the alternative candidate for current CMOS technology. QCA is attracting a lot of researchers due to many features such as high speed, small size, and low power consumption. QCA has two main building blocks (majority gate and inverter) used for design any Boolean function. QCA also has an inherent capability that used to design many important gates such as XOR and Multiplexer in optimal form without following any Boolean function. This paper presents a novel design 2:1 QCA-Multiplexer in two forms. The proposed design is very simple, highly efficient and can be used to produce many logical functions. The proposed design output comes from the inherent capabilities of quantum technology. New 4:1 QCA-Multiplexer has been built using the proposed structure. The output waveforms showed the wonderful performance of the proposed design in terms of the number of cells, area, and latency.

Abstract: The problem of minimizing a pseudo-Boolean function, that is, a real-valued function of 0–1 variables, arises in many applications. A quadratization is a reformulation of this nonlinear problem into a quadratic one, obtained by introducing a set of auxiliary binary variables. A desirable property for a quadratization is to introduce a small number of auxiliary variables. We present upper and lower bounds on the number of auxiliary variables required to define a quadratization for several classes of specially structured functions, such as functions with many zeros, symmetric, exact k-out-of-n, at least k-out-of-n and parity functions, and monomials with a positive coefficient, also called positive monomials. Most of these bounds are logarithmic in the number of original variables, and we prove that they are best possible for several of the classes under consideration. For positive monomials and for some other symmetric functions, a logarithmic bound represents a significant improvement with respect to the best bounds previously published, which are linear in the number of original variables. Moreover, the case of positive monomials is particularly interesting: indeed, when a pseudo-Boolean function is represented by its unique multilinear polynomial expression, a quadratization can be obtained by separately quadratizing its monomials.

Abstract: The Deutsch-Jozsa algorithm is essentially faster than any possible deterministic classical algorithm for solving a promise problem that is in fact a symmetric partial Boolean function, named as the Deutsch-Jozsa problem. The Deutsch-Jozsa problem can be equivalently described as a partial function D J n 0 : { 0 , 1 } n → { 0 , 1 } defined as: D J n 0 ( x ) = 1 for | x | = n / 2 , D J n 0 ( x ) = 0 for | x | = 0 , n , and it is undefined for the remaining cases, where n is even, and | x | is the Hamming weight of x. The Deutsch-Jozsa algorithm needs only one query to compute D J n 0 but the classical deterministic algorithm requires n 2 + 1 queries to compute it in the worse case. We present all symmetric partial Boolean functions with degree 1 and 2; We prove the exact quantum query complexity of all symmetric partial Boolean functions with degree 1 and 2. We prove Deutsch-Jozsa algorithm can compute any symmetric partial Boolean function f with exact quantum 1-query complexity.

Abstract: In this letter, a new construction of Z-complementary pairs (ZCPs) with more flexible lengths based on generalized Boolean functions is proposed. Except for the powers of two, the proposed ZCPs exist for all lengths with various widths of the zero correlation zone (ZCZ). There exists a trade-off between the sequence lengths and the ZCZ widths of the proposed ZCPs. Moreover, the peak-to-average power ratio (PAPR) properties of the constructed ZCPs are investigated in this letter. Therefore, the new sequences are useful in applications in communications due to their flexible lengths, various possible ZCZ widths, and good PAPR properties.

Abstract: In this work, we employ the concept of composite representation of Boolean functions, which represents an arbitrary Boolean function as a composition of one Boolean function and one vectorial function, for the purpose of specifying new secondary constructions of bent/plateaued functions. This representation gives a better understanding of the existing secondary constructions and it also allows us to provide a general construction framework of these objects. This framework essentially gives rise to an infinite number of possibilities to specify such secondary construction methods (with some induced sufficient conditions imposed on initial functions) and in particular we solve several open problems in this context. We provide several explicit methods for specifying new classes of bent/plateaued functions and demonstrate through examples that the imposed initial conditions can be easily satisfied. Our approach is especially efficient when defining new bent/plateaued functions on larger variable spaces than initial functions. For instance, it is shown that the indirect sum methods and Rothaus’ construction are just special cases of this general framework and some explicit extensions of these methods are given. In particular, similarly to the basic indirect sum method of Carlet, we show that it is possible to derive (many) secondary constructions of bent functions without any additional condition on initial functions apart from the requirement that these are bent functions. In another direction, a few construction methods that generalize the secondary constructions which do not extend the variable space of the employed initial functions are also proposed.

Abstract: Logic synthesis is a fundamental step in the realization of modern integrated circuits It has traditionally been employed for the optimization of CMOS-based designs, as well as for emerging technologies and quantum computing Recently, it found application in minimizing the number of AND gates in cryptography benchmarks represented as xor-and graphs (XAGs) The number of AND gates in an XAG, which is called the logic network’s multiplicative complexity, plays a critical role in various cryptography and security protocols such as fully homomorphic encryption (FHE) and secure multi-party computation (MPC) Further, the number of AND gates is also important to assess the degree of vulnerability of a Boolean function, and influences the cost of techniques to protect against side-channel attacks However, so far a complete logic synthesis flow for reducing the multiplicative complexity in logic networks did not exist or relied heavily on manual manipulations In this paper, we present a logic synthesis toolbox for cryptography and security applications The proposed tool consists of powerful transformations, namely resubstitution, refactoring, and rewriting, specifically designed to minimize the multiplicative complexity of an XAG Our flow is fully automatic and achieves significant results over both EPFL benchmarks and cryptography circuits We improve the best-known results for cryptography up to 59%, resulting in a normalized geometric mean of 082

Abstract: Recent years have seen increasing employment of decision intelligence in electronic design automation (EDA), which aims to reduce the manual efforts and boost the design closure process in modern toolflows. However, existing approaches either require a large number of labeled data for training or are limited in practical EDA toolflow integration due to computation overhead. This paper presents a generic end-to-end and high-performance domain-specific, multi-stage multi-armed bandit framework for Boolean logic optimization. This framework addresses optimization problems on a) And-Inv-Graphs (# nodes), b) Conjunction Normal Form (CNF) minimization (# clauses) for Boolean Satisfiability, c) post static timing analysis (STA) delay and area optimization for standard-cell technology mapping, and d) FPGA technology mapping for 6-in LUT architectures. Moreover, the proposed framework has been integrated with ABC [1], Yosys [2], VTR [3], and industrial tools. The experimental results demonstrate that our framework outperforms both hand-crafted flows [1] and ML explored flows [4], [5] in quality of results, and is orders of magnitude faster compared to ML-based approaches [4], [5].

Abstract: We give some classes of power maps with low c-differential uniformity over finite fields of odd characteristic, for c = -1. Moreover, we give a necessary and sufficient condition for a linearized polynomial to be a perfect c-nonlinear function and investigate conditions when perturbations of PcN (or not) function via an arbitrary Boolean function is PcN. The affine, extended affine and CCZ-equivalence is also looked at, as it relates to c-differential uniformity.

Abstract: Boolean functional synthesis is a fundamental problem in computer science with wide-ranging applications and has witnessed a surge of interest resulting in progressively improved techniques over the past decade. Despite intense algorithmic development, a large number of problems remain beyond the reach of the state of the art techniques. Motivated by the progress in machine learning, we propose Manthan, a novel data-driven approach to Boolean functional synthesis. Manthan views functional synthesis as a classification problem, relying on advances in constrained sampling for data generation, and advances in automated reasoning for a novel proof-guided refinement and provable verification. On an extensive and rigorous evaluation over 609 benchmarks, we demonstrate that Manthan significantly improves upon the current state of the art, solving 356 benchmarks in comparison to 280, which is the most solved by a state of the art technique; thereby, we demonstrate an increase of 76 benchmarks over the current state of the art. Furthermore, Manthan solves 60 benchmarks that none of the current state of the art techniques could solve. The significant performance improvements, along with our detailed analysis, highlights several interesting avenues of future work at the intersection of machine learning, constrained sampling, and automated reasoning.

Abstract: In somewhat homomorphic encryption schemes (e.g. B/FV, BGV) the size of ciphertexts and the execution performance of homomorphic operations depends heavily on the multiplicative depth. The multiplicative depth is the maximal number of consecutive multiplications for which the homomorphic encryption scheme was parameterized.

Abstract: We show, assuming the (randomized) Gap Exponential Time Hypothesis (Gap-ETH), that the following tasks cannot be done in T(k) · No(k)-time for any function T where N denote the input size: • [MATH HERE]-approximation for Max k-Coverage for any constant e > 0, • [MATH HERE]-approximation for k-Median (in general metrics) for any constant e > 0. • [MATH HERE]-approximation for k-Mean (in general metrics) for any constant e > 0. • Any constant factor approximation for k-Unique Set Cover, k-Nearest Codeword Problem and k-Closest Vector Problem. • (1 + Δ)-approximation for k-Minimum Distance Problem and k-Shortest Vector Problem for some Δ > 0. Since all problems considered here can be trivially solved in NO(k) time, our running time lower bounds are tight up to a constant factor in the exponent. In terms of approximation ratios, Max k-Coverage is well-known to admit polynomial-time [MATH HERE]-approximation algorithms, and, recently, it was shown that k-Median and k-Mean are approximable to within factors of [MATH HERE] and [MATH HERE] respectively in FPT time [20]; hence, our inapproximability ratios are also tight for these three problems. For the remaining problems, no non-trivial FPT approximation algorithms are known. The starting point of all our hardness results is the Label Cover problem (with projection constraints). We show that Label Cover cannot be approximated to within any constant factor in T(k) · No(k) time, where N and k denote the size of the input and the number of nodes on the side with the larger alphabet respectively. With this hardness, the above results follow immediately from known reductions. The hardness of Label Cover is in turn shown via a t-wise agreement testing theorem of the following form: given local boolean functions f1,...,fk on domains S1,...,Sk ⊆ [n], if random t functions "weakly agree" with sufficiently large probability, then we can find a global boolean function g : [n] → {0, 1} that "mostly agrees" with "many" of the local functions. We prove such a statement in the regime where S1,...,Sk are "random-looking" sets of size Θ(n/k).

Abstract: Quantum computations promise the ability to solve problems intractable in the classical setting. Restricting the types of computations considered often allows to establish a provable theoretical advantage by quantum computations, and later demonstrate it experimentally. In this paper, we consider space-restricted computations, where input is a read-only memory and only one (qu)bit can be computed on. We show that $n$-bit symmetric Boolean functions can be implemented exactly through the use of quantum signal processing as restricted space quantum computations using $O(n^2)$ gates, but some of them may only be evaluated with probability $1/2 + O(n/\sqrt{2}^n)$ by analogously defined classical computations. We experimentally demonstrate computations of $3$-, $4$-, $5$-, and $6$-bit symmetric Boolean functions by quantum circuits, leveraging custom two-qubit gates, with algorithmic success probability exceeding the best possible classically. This establishes and experimentally verifies a different kind of quantum advantage -- one where quantum scrap space is more valuable than analogous classical space -- and calls for an in-depth exploration of space-time tradeoffs in quantum circuits.

Abstract: Fully Homomorphic Encryption (FHE) is one of the most promising technologies for privacy protection as it allows an arbitrary number of function computations over encrypted data. However, the computational cost of these FHE systems limits their widespread applications. In this paper, our objective is to improve the performance of FHE schemes by designing efficient parallel frameworks. In particular, we choose Torus Fully Homomorphic Encryption (TFHE) [1] as it offers exact results for an infinite number of boolean gate (e.g., AND, XOR) evaluations. We first extend the gate operations to algebraic circuits such as addition, multiplication, and their vector and matrix equivalents. Secondly, we consider the multi-core CPUs to improve the efficiency of both the gate and the arithmetic operations. Finally, we port the TFHE to the Graphics Processing Units (GPU) and device novel optimizations for boolean and arithmetic circuits employing the multitude of cores. We also experimentally analyze both the CPU and GPU parallel frameworks for different numeric representations (16 to 32-bit). Our GPU implementation outperforms the existing technique [1], and it achieves a speedup of $ 20\times$ for any 32-bit boolean operation and $ 14.5\times$ for multiplications.

Abstract: Mutually orthogonal complementary sets (MOCSs) have received significant research attention in recent years due to their wide applications in communications and radar. Existing MOCSs which are constructed based on generalized Boolean functions (GBFs) mostly have lengths of power-of-two. How to construct MOCSs with non-power-of-two lengths whilst having large set sizes is a largely open problem. With the aid of GBFs, in this paper, we present new constructions of such MOCSs and show that the maximal achievable set size is $1/2$ of the flock size of an MOCS.

Abstract: The disturbance decoupling problem (DDP) whereby the system outputs become insensitive to exogenous signals or disturbances plays a vital role in systems engineering and biological systems. Notably, many biological signalling systems with multiple outputs are usually susceptible to external environmental changes. The authors investigate the DDP for Boolean control networks (BCNs) and present a novel technique based on Boolean algebra to solve the DDP. In particular, the results on the DDP solvability are derived by transforming the system dynamics to a simplified form called output-friendly form. Furthermore, a constructive procedure based on the Karnaugh map to design all possible feedback controllers such that the states affecting the outputs are free from disturbances is proposed. Moreover, the presented results are extended to switched BCNs, and design all possible mode-independent feedback controllers. Finally, some examples including a Boolean model of Escherichia coli are provided to validate the main findings.

Abstract: Microfluidics is a continuously growing field with potential not only in the fields of medical, chemical, and bioanalysis, but also in the domains of optics and information technology. Here, a pressure-driven 3D microfluidic chip is demonstrated with multiple logic Boolean functions. The presence and absence of fluid at the output of the gates represent the binary signals 1 and 0, respectively. Therefore, the logic gates do not require a specially functionalized liquid to operate. The chip is based on a multilevel of poly(methyl methacrylate) (PMMA)-based polymeric sheets with aligned microchannels while a flexible polyimide-based sheet with a cantilever-like structure is embedded to enable a one-directional flow of the liquid. Several Boolean logic functions are realized (AND, OR, and XOR) using different fluids in addition to a half adder digital microfluidic circuit. The outputs of the logic gates are designed to be at different heights within the 3D chip to enable different pressure drops. The results show that the logic gates are operational for a specific range of flow rates, which is dependent on the microchannel dimensions, surface roughness, and fluid viscosity and therefore on their hydraulic resistance. The demonstrated approach enables simple cascading of logic gates for large-scale microfluidic computing systems.

Abstract: Logic synthesis is a fundamental step in hardware design whose goal is to find structural representations of Boolean functions while minimizing delay and area. If the function is completely-specified, the implementation accurately represents the function. If the function is incompletely-specified, the implementation has to be true only on the care set. While most of the algorithms in logic synthesis rely on SAT and Boolean methods to exactly implement the care set, we investigate learning in logic synthesis, attempting to trade exactness for generalization. This work is directly related to machine learning where the care set is the training set and the implementation is expected to generalize on a validation set. We present learning incompletely-specified functions based on the results of a competition conducted at IWLS 2020. The goal of the competition was to implement 100 functions given by a set of care minterms for training, while testing the implementation using a set of validation minterms sampled from the same function. We make this benchmark suite available and offer a detailed comparative analysis of the different approaches to learning

Abstract: Attempts to prove the intractability of the Minimum Circuit Size Problem (MCSP) date as far back as the 1950s and are well-motivated by connections to cryptography, learning theory, and average-case complexity In this work, we make progress, on two fronts, towards showing MCSP is intractable under worst-case assumptions While Masek showed in the late 1970s that the version of MCSP for DNF formulas is NP-hard, extending this result to the case of depth-3 AND/OR formulas was open We show that determining the minimum size of a depth- $d$ formula computing a given Boolean function is N P-hard under quasipolynomial-time randomized reductions for all constant $d\geq 2$ Our approach is based on a method to “lift” depth- $d$ formula lower bounds to depth-( $d+1$ ) This method also implies the existence of a function with a $2^{\Omega_{d}(n^{1/5}}$ ) additive gap between its depth-d and depth-( $d+1$ ) formula complexity We also make progress in the case of general, unrestricted circuits We show that the version of MCSP where the input is a partial function (represented by a string in $\{0,1, ?\}^{\ast}$ ) is not in P under the Exponential Time Hypothesis (ETH) Intriguingly, we formulate a notion of lower bound statements being (P/poly)-recognizable that is closely related to Razborov and Rudich's definition of being (P/poly)-constructive We show that unless there are subexponential-sized circuits computing SAT, the lower bound statements used to prove the correctness of our reductions cannot be (P/poly)-recognizable

Abstract: The resistance of S-box-based cryptosystems to linear cryptanalysis is often determined by the nonlinearity (NL) and the linear approximation probability (LAP) of the underlying S-box. Constructing dynamic bijective S-boxes with high nonlinearity is a challenging problem. In this paper, we propose a novel S-box construction method based on the concept of constrained optimization. The proposed method uses a random-restart hill-climbing algorithm to construct randomized S-boxes and maximize the nonlinearity of each Boolean function under bijectivity constraints. The proposed algorithm dramatically reduced the S-box construction time. Compared to recent S-box construction methods, the proposed method strikes a better balance among the three design objectives of dynamic S-boxes, namely, cryptographic strength, dynamicity, and speed of construction. On the average, the proposed method constructs a new dynamic $8\times 8$ S-box with NL=112 every 118 ms, whereas a NL=110 S-box can be generated in 5.3 ms, which makes it suitable for real time applications. The proposed method also constructs $8\times 8$ S-boxes with NL=114, which is among the highest reported in literature. Moreover, we demonstrate the extensibility of the proposed constrained optimization formulation to improve other S-box design criteria. Namely, we propose an algorithm to optimize the LAP of an S-box while preserving its NL and bijectivity.

Abstract: In this chapter, for decision tables corresponding to functions from an arbitrary closed class of Boolean functions, the depth of deterministic, nondeterministic, and strongly nondeterministic decision trees is studied. The obtained results have some independent interest. Proofs of these results illustrate mainly methods for the proof of lower bounds on complexity of decision trees.