Abstract: Nonlinearity criteria for Boolean functions are classified in view of their suitability for cryptographic design. The classification is set up in terms of the largest transformation group leaving a criterion invariant. In this respect two criteria turn out to be of special interest, the distance to linear structures and the distance to affine functions, which are shown to be invariant under all affine transformations. With regard to these criteria an optimum class of functions is considered. These functions simultaneously have maximum distance to affine functions and maximum distance to linear structures, as well as minimum correlation to affine functions. The functions with these properties are proved to coincide with certain functions known in combinatorial theory, where they are called bent functions. They are shown to have practical applications for block ciphers as well as stream ciphers. In particular they give rise to a new solution of the correlation problem.

Abstract: The problem of encoding the states of a synchronous finite state machine (FSM) so that the area of a two-level implementation of the combinational logic is minimized is addressed. As in previous approaches, the problem is reduced to the solution of the combinatorial optimization problems defined by the translation of the cover obtained by a multiple-valued logic minimization or by a symbolic minimization into a compatible Boolean representation. The authors present algorithms for this solution, based on a novel theoretical framework that offers advantages over previous approaches to develop effective heuristics. The algorithms are part of NOVA, a program for optimal encoding of control logic. Final areas averaging 20% less than other state assignment programs and 30% less than the best random solution have been obtained. Literal counts averaging 30% less than the best random solutions have been obtained. >

Abstract: Abadi, Feigenbaum, and Kilian have considered instance-hiding schemes [1]. Let f be a function for which no randomized polynomial-time algorithm is known; randomized polynomial-time machine A wants to query an oracle B for f to obtain f(x), without telling B exactly what x is. It is shown in [1] that, if f is an NP-hard function, A cannot query a single oracle B while hiding all but the size of the instance, assuming that the polynomial hierarchy does not collapse. This negative result holds for all oracles B, including those that are non-r.e.

Abstract: 1 Fundamental Concepts.- 1.1 Formulas.- 1.2 Propositions and Predicates.- 1.3 Sets.- 1.4 Operations on Sets.- 1.5 Partitions.- 1.6 Relations.- 1.7 Functions.- 1.8 Operations and Algebraic Systems.- 2 Boolean Algebras.- 2.1 Postulates for a Boolean Algebra.- 2.2 Examples of Boolean Algebras.- 2.2.1 The Algebra of Classes (Subsets of a Set).- 2.2.2 The Algebra of Propositional Functions.- 2.2.3 Arithmetic Boolean Algebras.- 2.2.4 The Two-Element Boolean Algebra.- 2.2.5 Summary of Examples.- 2.3 The Stone Representation Theorem.- 2.4 The Inclusion-Relation.- 2.4.1 Intervals.- 2.5 Some Useful Properties.- 2.6 n-Variable Boolean Formulas.- 2.7 n-Variable Boolean Functions.- 2.8 Boole's Expansion Theorem.- 2.9 The Minterm Canonical Form.- 2.9.1 Truth-tables.- 2.9.2 Maps.- 2.10 The Lowenheim-Muller Verification Theorem.- 2.11 Switching Functions.- 2.12 Incompletely-Specified Boolean Functions.- 2.13 Boolean Algebras of Boolean Functions.- 2.13.1 Free Boolean Algebras.- 2.14 Orthonormal Expansions.- 2.14.1 Lowenheim's Expansions.- 2.15 Boolean Quotient.- 2.16 The Boolean Derivative.- 2.17 Recursive Definition of Boolean Functions.- 2.18 What Good are "Big" Boolean Algebras?.- 3 The Blake Canonical Form.- 3.1 Definitions and Terminology.- 3.2 Syllogistic & Blake Canonical Formulas.- 3.3 Generation of BCF(f).- 3.4 Exhaustion of Implicants.- 3.5 Iterated Consensus.- 3.5.1 Quine's method.- 3.5.2 Successive extraction.- 3.6 Multiplication.- 3.6.1 Recursive multiplication.- 3.6.2 Combining multiplication and iterated consensus.- 3.6.3 Unwanted syllogistic formulas.- 4 Boolean Analysis.- 4.1 Review of Elementary Properties.- 4.2 Boolean Systems.- 4.2.1 Antecedent, Consequent, and Equivalent Systems.- 4.2.2 Solutions.- 4.3 Reduction.- 4.4 The Extended Verification Theorem.- 4.5 Poretsky's Law of Forms.- 4.6 Boolean Constraints.- 4.7 Elimination.- 4.8 Eliminants.- 4.9 Rudundant Variables.- 4.10 Substitution.- 4.11 The Tautology Problem.- 4.11.1 Testing for Tautology.- 4.11.2 The Sum-to-One Theorem.- 4.11.3 Nearly-Minimal SOP Formulas.- 5 Syllogistic Reasoning.- 5.1 The Principle of Assertion.- 5.2 Deduction by Consensus.- 5.3 Syllogistic Formulas.- 5.4 Clausal Form.- 5.5 Producing and Verifying Consequents.- 5.5.1 Producing Consequents.- 5.5.2 Verifying Consequents.- 5.5.3 Comparison of Clauses.- 5.6 Class-Logic.- 5.7 Selective Deduction.- 5.8 Functional Relations.- 5.9 Dependent Sets of Functions.- 5.10 Sum-to-One Subsets.- 5.11 Irredundant Formulas.- 6 Solution of Boolean Equations.- 6.1 Particular Solutions and Consistency.- 6.2 General Solutions.- 6.3 Subsumptive General Solutions.- 6.3.1 Successive Elimination.- 6.3.2 Deriving Eliminants from Maps.- 6.3.3 Recurrent Covers and Subsumptive Solutions.- 6.3.4 Simplified Subsumptive Solutions.- 6.3.5 Simplification via Marquand Diagrams.- 6.4 Parametric General Solutions.- 6.4.1 Successive Elimination.- 6.4.2 Parametric Solutions based on Recurrent Covers.- 6.4.3 Lowenheim's Formula.- 7 Functional Deduction.- 7.1 Functionally Deducible Arguments.- 7.2 Eliminable and Determining Subsets.- 7.2.1 u-Eliminable Subsets.- 7.2.2 u-Determining Subsets.- 7.2.3 Calculation of Minimal u-Determining Subsets.- 8 Boolean Identification.- 8.1 Parametric and Diagnostic Models.- 8.1.1 Parametric Models.- 8.1.2 The Diagnostic Axiom.- 8.1.3 Diagnostic Equations and Functions.- 8.1.4 Augmentation.- 8.2 Adaptive Identification.- 8.2.1 Initial and Terminal Specifications.- 8.2.2 Updating the Model.- 8.2.3 Effective Inputs.- 8.2.4 Test-Procedure.- 9 Recursive Realizations of Combinational Circuits.- 9.1 The Design-Process.- 9.2 Specifications.- 9.2.1 Specification-Formats.- 9.2.2 Consistent Specifications.- 9.3 Tabular Specifications.- 9.4 Strongly Combinational Solutions.- 9.5 Least-Cost Recursive Solutions.- 9.6 Constructing Recursive Solutions.- 9.6.1 The Procedure.- 9.6.2 An Implementation using BORIS.- A Syllogistic Formulas.- A.1 Absorptive Formulas.- A.2 Syllogistic Formulas.- A.3 Prime Implicants.- A.4 The Blake Canonical Form.

Abstract: The analysis of linear threshold Boolean functions has recently attracted the attention of those interested in circuit complexity as well as ofthose interested in neural networks. Here a generalization oflinear threshold functions is defined, namely, polynomial threshold functions, and its relation to the class of linear threshold functions is investigated. A Boolean function is polynomial threshold if it can be represented as a sign function ofa polynomial that consists ofa polynomial (in the number ofvariables) number ofterms. The main result ofthis paper is showing that the class ofpolynomial threshold functions (which is called PT1 is strictly contained in the class ofBoolean functions that can be computed by a depth 2, unbounded fan-in polynomial size circuit of linear threshold gates (which is called LT2). Harmonic analysis ofBoolean functions is used to derive a necessary and sufficient condition for a function to be an S-threshold function for a given set S of monomials. This condition is used to show that the number of different S-threshold functions, for a given S, is at most 2 t'/ 1)lsl. Based on the necessary and sufficient condition, a lower bound is derived on the number of terms in a threshold function. The lower bound is expressed in terms of the spectral representation of a Boolean function. It is found that Boolean functions having an exponentially small spectrum are not polynomial threshold. A family of functions is exhibited that has an exponentially small spectrum; they are called "semibent" functions. A function is constructed that is both semibent and symmetric to prove thatPT is properly contained in LT2.

Abstract: Field Programmable Gate Arrays are new devices that combine the versatility of a Gate Array with the user-programmability of a PAL. This paper describes an algorithm for technology mapping of combinational logic into Field Programmable Gate Arrays that use lookup table memories to realize combinational functions. It is difficult to map into lookup tables using previous techniques because a single lookup table can perform a large number of logic functions, and prior approaches require each function to be instantiated separately in a library. The new algorithm, implemented in a program called Chortle uses the fact that a K-input lookup table can implement any Boolean function of K-inputs, and so does not require a library-based approach. Chortle takes advantage of this complete functionality to evaluate all possible decompositions of the input Boolean network nodes. It can determine the optimal (in area) mapping for fanout-free trees of combinational logic. In comparisons with the MIS II technology mapper, on MCNC-89 Logic Synthesis benchmarks Chortle achieves superior results in significantly less time. 1

Abstract: An algorithm is given for computing subsets of the observability don't cares at the nodes of a multilevel Boolean network. These subsets are based on an extension of the methods introduced by S. Muroga et al. (IEEE Trans. on Computers, Oct. 1989) for computing compatible sets of permissible functions (CSPFs) at the nodes of networks composed of NOR gates. The extensions presented are in four directions: an arbitrary logic function is allowed at any node, the don't cares are expressed in terms of both primary inputs and intermediate variables, a new ordering scheme is used. and maximal CSPFs are computed. These ideas are incorporated in an algorithm designed to take full advantage of the power of two-level minimization in multilevel logic synthesis systems. This has been implemented in MIS-II, and results are presented that demonstrate the effectiveness of these techniques. >

Abstract: The authors describe a new approach to technology mapping where matchings are recognized by means of Boolean operations. The matching algorithm uses tautology checking based on Shannon decompositions. They show how to use the symmetry and unateness properties to speed-up the Boolean matching algorithm. They examine how don't care information can be used during Boolean matching. The algorithms have been implemented in program Ceres and tested on the 1989 MCNC benchmark circuits. >

Abstract: The class of polynomial-threshold functions is studied using harmonic analysis, and the results are used to derive lower bounds related to AC/sup 0/ functions. A Boolean function is polynomial threshold if it can be represented as a sign function of a sparse polynomial (one that consists of a polynomial number of terms). The main result is that polynomial-threshold functions can be characterized by means of their spectral representation. In particular, it is proved that a Boolean function whose L/sub 1/ spectral norm is bounded by a polynomial in n is a polynomial-threshold function, and that a Boolean function whose L/sub infinity //sup -1/ spectral norm is not bounded by a polynomial in n is not a polynomial-threshold function. Some results for AC/sup 0/ functions are derived. >

Abstract: The Abraham-Locks-revised (ALR) sum-of-disjoint products (SDP) algorithm is an efficient method for obtaining a system reliability formula. The author describes a minor modification of the ALR algorithm called the Abraham-Locks-Wilson (ALW) method. The new feature is an alternative method of ordering paths and terms. ALW obtains a shorter disjoint system formula on a test example than any previous SDP method and allows small computational savings in processing large paths of complex networks. As there are different ways to obtain a reliability formula it is useful to use an approach which yields the smallest formula relative to computational effort expended. The extra effort in ordering the terms should be reasonably small and usually leads to improved efficiency in the later stages of the algorithm. ALW allows the analyst to operate in a more efficient way on many problems, particularly if the overlap ordering is used in the early stages of processing but is probably ignored for terms that contain a majority of the Boolean variables. >

Abstract: Entropy measures are examined in view of the current logic synthesis methodology. The complexity of a Boolean function can be expressed in terms of computational work. Experimental data are presented in support of the entropy definition of computational work based upon the input-output description of a Boolean function. These data show a linear relationship between the computational work and the average number of literals in a multilevel implementation. The investigation includes single-output and multioutput function with and without don't care states. The experiments conducted on a large number of randomly generated functions showed that the effect of don't cares is to reduce the computational work. For several finite state machine benchmarks, the computational work gave a good estimate of the size of the circuit. Circuit delay is shown to have a nonlinear relationship to the computational work. >

Abstract: A paradigm is presented for the segmentation of images into piecewise continuous patches. Data aggregation is performed via model recovery in terms of variable-order bivariate polynomials using iterative regression. All the recovered models are candidates for the final description of the data. Selection of the models is achieved through a maximization of the quadratic Boolean problem. The procedure can be adapted to prefer certain kinds of descriptions (one which describes more data points, or has smaller error, or has a lower order model). A fast optimization procedure for model selection is discussed. The approach combines model extraction and model selection in a dynamic way. Partial recovery of the models is followed by the optimization (selection) procedure where only the best models are allowed to develop further. The results are comparable with the results obtained when using the selection module only after all the models are fully recovered, while the computational complexity is significantly reduced. The procedure was tested on real range and intensity images. >

Abstract: This paper explores the application of neural network principles to the construction of decision trees from examples We consider the problem of constructing a tree of perceptrons able to execute a given but arbitrary Boolean function defined on Ni input bits We apply a sequential (from one tree level to the next) and parallel (for neurons in the same level) learning procedure to add hidden units until the task in hand is performed At each step, we use a perceptron-type algorithm over a suitable defined input space to minimize a classification error The internal representations obtained in this way are linearly separable Preliminary results of this algorithm are presented

Abstract: A universal lower-bound technique for the size and other implementation characteristics of an arbitrary Boolean function as a decision tree and as a two-level AND/OR circuit is derived. The technique is based on the power spectrum coefficients of the n dimensional Fourier transform of the function. The bounds vary from constant to exponential and are tight in many cases. Several examples are presented. >

Abstract: An exact algorithm for the synthesis of mixed polarity exclusive sum of product (ESOP) expressions for arbitrary size incompletely specified Boolean functions is presented. For more than four input variables, this problem has not been solved yet. A decision function H is constructed for a Boolean function f that describes all possible ESOP solutions to f. The function H plays for the ESOP minimization problem a role analogous to that of the Petrick function for the minimization of the inclusive sum of product expression problem of classical logic. Each product of literals that satisfies the function H corresponds to one ESOP solution of f. The algorithms to create and solve function H are presented. >

Abstract: The paper presents a new method for computing all 2n canonical Reed-Muller forms (RMC forms) of a Boolean function. The method constructs the coefficients directly and no matrix-multiplication is needed. It is also usable for incompletely specified functions and for calculating a single RMC form. The method exhibits a high degree of parallelism.

Abstract: Two of the most commonly used models in computational learning theory are the distribution-free model, in which examples are chosen from a fixed but arbitrary distribution, and the absolute mistake-bound model, in which examples are presented in order by an adversary. Over the Boolean domain

Abstract: Motivated by, the problem of understanding the limitations of neural networks for representing Boolean functions, the authors consider size-depth tradeoffs for threshold circuits that compute the parity function. They give an almost optimal lower bound on the number of edges of any depth-2 threshold circuit that computes the parity function with polynomially bounded weights. The main technique used in the proof, which is based on the theory of rational approximation, appears to be a potentially useful technique for the analysis of such networks. It is conjectured that there are no linear size, bounded-depth threshold circuits for computing parity. >

Abstract: By investigating some families of elementary order-2 matrices, new transforms of real vectors are introduced. When used for Boolean function transformations these transforms are one-to-one mappings in a binary/ternary vector space. The concept of different polarities of considered arithmetic and adding transforms is introduced. The links of arithmetic and adding transforms with classical logic design are discussed. >

Abstract: It is shown that approximate compaction can be efficiently performed in constant parallel time using perfect hash functions. This allows it to be shown that polylogarithmic-threshold functions are in linear AC/sup o/. Next, it is shown that the information-theoretic notion of graph entropy captures some aspect of the difficulty of computing Boolean functions. This is used to derive superlinear lower bounds on the formula size of threshold and other simple Boolean functions. >

Abstract: In this paper, we present a new Boolean resubstitution technique with permissible functions and ordered binary decision diagrams, abbreviated as OBDD[8]. Boolean resubstitution is one technique for multi-level logic optimization. Permissible functions are special don't care sets. We represent the data structure of permissible functions and logic functions at each node in Boolean networks in terms of OBDD. Therefore, logic functions can be flexibly manipulated and rapidly executed. We have previously reported a multi-level logic optimization technique called transduction methods[1] using OBDD in ICCAD'89[7]. We have improved the OBDD operation techniques, so that now OBDD operations can be executed faster than we reported before. We also applied Boolean resubstitution to our multi-level logic synthesis. We present results of experiments employing the improved OBDD operation techniques and applying Boolean resubstitution to our multi-level logic synthesis.

Abstract: A technique for exactly identifying certain classes of read-once Boolean formulas is introduced. The method is based on sampling the input-output behavior of the target formula on a probability distribution which is determined by the fixed point of the formula's amplification function (defined as the probability that a 1 is output by the formula when each input bit is 1 independently with probability p). By performing various statistical tests on easily sampled variants of the fixed-point distribution, it is possible to infer efficiently all structural information about any logarithmic-depth target family (with high probability). The results are used to prove the existence of short universal identification sequences for large classes of formulas. Extensions of the algorithms to handle high rates of noise and to learn formulas of unbounded depth in L.G. Valiant's (1984) model with respect to specific distributions are described. >

Abstract: The limitations of random-self-reducibility are studied, and several negative results are proved. For example, it is shown unconditionally that random Boolean functions do not have random self-reductions, even of a quite general nature. For several natural, but less general, classes of random self-reductions, it is shown that, unless the polynomial hierarchy collapses, nondeterministic polynomial-time computable functions are not random-self-reducible. >

Abstract: The authors unify and extend the various approaches to synthesizing fully testable sequential circuits that can be modeled as finite state machines (FSMs). Classes of redundancies are identified, and equivalent-state redundancies are isolated as those most difficult to eliminate. It is then shown that the essential problem behind equivalent-state redundancies is the creation of valid/invalid state pairs. Techniques are presented for developing differentiating sequences for valid/invalid state pairs created by a fault, as well as techniques for retaining these sequences in the presence of that fault. The notion of fault-effect disjointness is used to investigate optimal and constrained synthesis procedures. Techniques used in this investigation include fault simulation, Boolean covering, algebraic factorization, and state assignment. Experimental results using the synthesis procedures as well as comparisons to previous approaches are presented. >

Abstract: The author investigates the question of whether or not a specific Boolean function in n variables can be interpolated by an analytic function in the same variables whose partial derivatives of all orders span a subspace of low dimension in the space of analytic functions. The upper and lower bounds for this dimension yield some weak circuit lower bounds. For a particular function, an Omega (n/log n)-size lower bound is obtained for its computation by a circuit whose gates are symmetric. For the same function an Omega (n) lower bound is obtained for the circuit with mod/sub k/ gates. >

Abstract: A new logic design timing verification technique named coded time-symbolic simulation (CTSS) is presented. Novel techniques of analyzing the results of CTSS are proposed. Simulation of logic circuits consisting of gates whose delay is specified only by its minimum and maximum values is considered. The cases of possible delay values of each gate are encoded by binary values, and all the possible combinations of the delay values are simulated by means of symbolic simulation. This simulation technique can deal with logic circuits containing feedback loops as well as combinational circuits. An efficient simulator was implemented by using a shared binary decision diagram (SBDD) as an internal representation of Boolean functions. >

Abstract: A Boolean function in disjunctive normal form (DNF) is aHorn function if each of its elementary conjunctions involves at most one complemented variable. Ageneralized Horn function is constructed from a Horn function by disjuncting a nested set of complemented variables to it. The satisfiability problem is solvable in polynomial time for both Horn and generalized Horn functions. A Boolean function in DNF is said to berenamable Horn if it is Horn after complementation of some variables. Succinct mathematical characterizations and linear-time algorithms for recognizing renamable Horn and generalized Horn functions are given in this paper. The algorithm for recognizing renamable Horn functions gives a new method to test 2-SAT. Some computational results are also given.