Abstract: Valiant (1984) and others have studied the problem of learning various classes of Boolean functions from examples. Here we discuss incremental learning of these functions. We consider a setting in which the learner responds to each example according to a current hypothesis. Then the learner updates the hypothesis, if necessary, based on the correct classification of the example. One natural measure of the quality of learning in this setting is the number of mistakes the learner makes. For suitable classes of functions, learning algorithms are available that make a bounded number of mistakes, with the bound independent of the number of examples seen by the learner. We present one such algorithm that learns disjunctive Boolean functions, along with variants for learning other classes of Boolean functions. The basic method can be expressed as a linear-threshold algorithm. A primary advantage of this algorithm is that the number of mistakes grows only logarithmically with the number of irrelevant attributes in the examples. At the same time, the algorithm is computationally efficient in both time and space.

Abstract: A common type of running key generator employed in stream cipher systems consists of n (mostly maximum-length) binary linear feedback shift registers (LFSR's) whose output sequences are combined by a nonlinear Boolean function f. The output of several combining functions previously proposed in the literature is known to be correlated to some input variables with probabilities p up to 0.75 (this holds, e.g. for the generators of Geffe, Pless, or Bruer). These generators have been broken in [2] for LFSR-lengths k < 50 (roughly), according to the computational complexity of the attack (based on an exhaustive search over all phases of the LFSR). But also other generators, e.g. certain types of multiplexed sequence generators, are known to be correlated to LFSR-components. In fact any generator having such correlations may be vulnerable to a correlation attack.

Abstract: This paper presents a variation of the back-propagation algorithm that makes optimal use of a network hidden units by decrasing an "energy" term written as a function of the squared activations of these hidden units. The algorithm can automatically find optimal or nearly optimal architectures necessary to solve known Boolean functions, facilitate the interpretation of the activation of the remaining hidden units and automatically estimate the complexity of architectures appropriate for phonetic labeling problems. The general principle of the algorithm can also be adapted to different tasks: for example, it can be used to eliminate the [0, 0] local minimum of the [-1. +1] logistic activation function while preserving a much faster convergence and forcing binary activations over the set of hidden units.

Abstract: A necessary and sufficient condition on the Walsh-spectrum of a boolean function is given, which implies that this function fulfills the Strict Avalanche Criterion. This condition is shown to be fulfilled for a class of functions exhibiting simple spectral symmetries. Finally, an extended definition of the Strict Avalanche Criterion is proposed and the corresponding spectral characterization is derived.

Abstract: A novel method is presented for verifying functionality in the design of VLSI circuits. The method fits naturally in a methodology based on a hardware description language (HDL). Two programs describe the system under design: (1) its specification and (2) the extracted behavior from its layout. Verifying the design comes down to proving that these programs are correct and equivalent with regard to the HDL semantics. The authors define a process named formal analysis that permits to prove these properties without setting values to the programs inputs. Formal analysis is based on a canonical form of Boolean logic that is named typed Shannon's canonical form. They implemented this method in PRIAM, an efficient circuit prover now used by industrial CPU designers. >

Abstract: Photonic technologies are reviewed that could become important components of future telecommunication systems. Photonic devices and systems are divided into two classes according to the function they perform. The first class, relational, refers to devices, that map the input channels to the output channels under external control. The second class, logic, perform some type or combination of Boolean logic functions. Some of the strengths and weaknesses of operating in the photonic domain are presented. Relational devices and their applications are discussed. Optical logic devices and their potential applications are reviewed. >

Abstract: The paper is devoted to designing nonlinear Boolean functions. The first part reviews the case of Boolean functions of n variables. The second part addresses the problem of the generation of Boolean permutations to obtain the collection of nonlinear Boolean functions.

Abstract: A very fast computer program that accepts a Boolean function as an array of multi-output disjoint cubes and returns a mixed-polarity Generalized Reed-Muller Form is presented. Such circuits often have gates and interconnections than classical sum-of-product realizations and are easily testable. The program was tested on many examples from literature as well as on many large arithmetic functions with up to 8 inputs, 8 output and 255 minterms. On all the examples from the literature the solutions were either the same or better than those generated by other methods. The algorithm is based on a new cube operation, called xlinking, that generalizes known operations of merger, exclusion and other logic operations specified by previous authors.

Abstract: The decision problem for the existential theory of the reals is the problem of deciding if the set (x in R/sup n/; P(x) is nonempty, where P(x) is a predicate which is a Boolean function of atomic predicates either of which is a Boolean function of atomic predicates either of the form f/sub i/(x)>or=0 or f/sub j/(x)>, the f's being real polynomials. An algorithm is presented for deciding the existential theory of the reals that simultaneously achieves the best known time and space bounds. The time bound for the algorithm is slightly better than any previous bound. >

Abstract: A survey is given of directions, results, and methods in the study of complexity-bounded computations with a restricted number of queries to an oracle. In particular, polynomial-time-bounded computations with an NP oracle are considered. The main topics are: the relationship between the number of adaptive and parallel queries, connections to the closure of NP under polynomial-time truth-table reducibility, the Boolean hierarchy, the power of one more query, sparse oracles versus few queries, and natural complete problems for the most important bounded query classes. >

Abstract: A necessary and sufficient condition on the Walsh-spectrum of a boolean function is given, which implies that this function fulfills the Strict Avalanche Criterion. This condition is shown to be fulfilled for a class of functions exhibiting simple spectral symmetries. Finally, an extended definition of the Strict Avalanche Criterion is proposed and the corresponding spectral characterization is derived.

Abstract: The authors examine the question of whether fault grading is necessary and if yes, how high the single-stuck fault coverage must be? They show that, not only is fault grading required, but that extremely high single stuck fault coverage is probable necessary. The results presented are extensions of previous work in this area by T.W. Williams (1985). The authors discuss only functional or Boolean testing, which does not involve measurement, but determines whether logic functions are correct. The question of how thorough a Boolean test procedure need be is the main focus. The need for extremely thorough testing is demonstrated. >

Abstract: It is shown that polynomial-time truth-table reducibility by Boolean circuits to SAT is the same as log-space truth-table reducibility via Boolean formulas to SAT and the same as log-space Turing reducibility to SAT. It is proved that a constant number of rounds of parallel queries to SAT is equivalent to one round of parallel queries. It is shown that the infinite difference hierarchy over NP is equal to Delta p/2, and an oracle separating Delta p/2 from the class of predicates polynomial time truth-table reducible to SAT is given. >

Abstract: A description is given of a theory for, and the application of, a general algorithm for determining whether a given multilevel Boolean function is a tautology or whether two given multilevel Boolean functions are equivalent. Four specific cases of this general algorithm are examined. These are termed the flattening method, the don't-care method, the simulation method, and the algebraic string comparison method. A single unifying algorithm frame is given for the implementation of any of these four methods, depending on parameterization. Experimental results are given which indicate that, with the exception of the don't-care method, each of these methods has a problem class in which it is clearly superior to the others. The primary application of these algorithms is as a verification tool for silicon compilation systems. However, these algorithms are also being used as the foundation for multilevel logic minimization and automatic test pattern generation programs. >

Abstract: Let the multiplicative complexity L(f) of a boolean function f be the minimal number of Λ-gates (with two entries) that are sufficient to evaluate f by circuits over the basis Λ,⊕,1. We relate L(f) with the dimension of the dual domain D(f); D(f) is the minimal linear space of linear boolean forms such that f modulo linear functions can be written as a function which takes for input linear forms in D(f).

Abstract: When an injective pseudo-Boolean function $f:B^n \to \mathbb{R}$ is minimized, where $B^n = \{ 0,1 \}^n$ is the set of vertices of the unit-hypercube, it is natural to consider so-called greedy vertex-following algorithms. These algorithms construct a sequence of neighbouring (Hamming distance 1) vertices with decreasing f-value. The question arises as to when such algorithms will find the global optimum given any starting point. This paper describes a hierarchy of such classes of functions that are shown to strictly contain each other. These classes are, in increasing order of generality, the threshold, the saddle-free, the pseudomodular, the completely unimodal, the unimodal, and the unimin (respectively, unimax) functions. Some considerations as to the complexity of the above-mentioned class of algorithms are also made.

Abstract: This article describes the use of binary decision diagrams (BDDs) and if-then-else DAGs for representing and manipulating Boolean functions. Two-cuts are defined for binary decision diagrams, and the relationship is exhibited between general if-then-else expressions and the two-cuts of a BDD for the same function. An algorithm for computing all two-cuts of a BDD in O(n2) time is given. A new canonical form for if-then-else DAGs, analogous to Bryant''s canonical form for BDDs, is introduced. The canonical form is based on representing the lowest non-trivial two-cut in the corresponding BDD, while Bryant''s canonical form represents the highest two-cut. Expressions in Bryant''s canonical form or in the new canonical form are shown to be prime and irredundant. Some applications of if-then-else DAGs to multi-level logic minimization are given, and the Printform transformations for reducing the complexity of if-then-else DAGs are presented.

Abstract: Multiple-valued Boolean minimization is proposed as a technique for identifying and extracting good Boolean factors which can be used as strong divisors to minimize the literal count and the area of a multilevel logic network. Given a two-level logic function, a subset of inputs to the function is selected such that the number of good Boolean factors contained in this subset of inputs is large. If the targeted implementation is a set of interconnected PLAs, the different cube combinations given by the subset of inputs are re-encoded to reduce the number of product terms in the logic function. A novel algorithm for the re-encoding is given that is based on the notion of partial satisfaction of constraints. Algorithms have been developed that identify a set of factors which maximally decrease the literal count of the logic network when they are used as strong divisors. Results obtained on several benchmark examples that illustrate the efficacy of the techniques are presented. >

Abstract: The computation of specific functions using the most general form of concurrent-read-concurrent-write parallel RAM is considered. It is shown that such a machine can compute any function of Boolean inputs in time log n − log log n + O(1) given a polynomial number of processors and memory cells and that this bound is tight for integer addition. Despite this evidence of the power of the model we show that a very simple function, namely parity, requires time Ω ( log n ) to compute given a polynomial bound on the number of processors, independent of the number of memory cells.

Abstract: CARLOS, a program system for the automated synthesis of random combinational CMOS logic, is described. The input of CARLOS is a specification of a multiple-output Boolean function in the form of a truth table. CARLOS produces an optimized random logic circuit composed of NAND, NOR, and complex gates under the given fan-in and fan-out limitations. The algorithms implemented in CARLOS are based on logic minimization, novel multiple-output multilevel factoring strategies, and recursive technology mapping. The factorization algorithm performs multiple-output synthesis using an algebraic representation of multiple-output Boolean functions. Tests on a large set of examples have shown the efficiency of the synthesis in terms of circuit size as well as computation time. CARLOS is an integral part of a larger CAD system that supports the automatic logic and physical design of finite-state machines under gate-array constraints. >

Abstract: An algebraic methodology for comparing switch-level circuits with higher-level specifications is presented. Switch-level networks, 'user' behavior, and input constraints are modeled as asynchronous machines. The model is based on the algebraic theory of characteristic functions (CF). An asynchronous automation is represented by a pair of CFs, called a dynamic CF (DCF): the first CF describes the potential stable states, and the second CF describes the possible transitions. The set of DCFs is a Boolean algebra. Machine composition and internal variables abstraction correspond, respectively, to the product and sum operations of the algebra. Internal variables can be abstracted under the presence of a domain constraint. The constraint is validated by comparison to the outside behavior. The model is well suited for speed-independent circuits for which the specification is given as a collection of properties. Verification reduces to the validation of Boolean inequalities. >

Abstract: It was found that synthesis operations like kernel extraction-intersection and phase assignment have excellent mapping properties in the synthesis of multilevel Boolean networks when a symmetric (dual) target library of standard cells is used. This was made possible by DIRMAP, a simple translator of the optimized and properly decomposed set of Boolean functions, which produces 4 to 12% better area results than those obtained with more complex mappers based on tree-matching techniques. Using the logic optimizer MIS, experiments were run over a wide range of benchmarks and industrial examples and a symmetric, negative-logic two-level standard cell library with fan-in constraint of four was used as a target technology. Complete statistics of the trees composing each of the optimized Boolean networks are presented. >

Abstract: Valiant (1984) and others have studied the problem of learning various classes of Boolean functions from examples. Here we discuss incremental learning of these functions. We consider a setting in which the learner responds to each example according to a current hypothesis. Then the learner updates the hypothesis, if necessary, based on the correct classification of the example. One natural measure of the quality of learning in this setting is the number of mistakes the learner makes. For suitable classes of functions, learning algorithms are available that make a bounded number of mistakes, with the bound independent of the number of examples seen by the learner. We present one such algorithm that learns disjunctive Boolean functions, along with variants for learning other classes of Boolean functions. The basic method can be expressed as a linear-threshold algorithm. A primary advantage of this algorithm is that the number of mistakes grows only logarithmically with the number of irrelevant attributes in the examples. At the same time, the algorithm is computationally efficient in both time and space.

Abstract: Special ternary logic functions, namely, regular functions suitable for treating ambiguity and majority functions based on an extended majority principle are considered. The one-to-one correspondence between n-ary monotone regular ternary logic functions and (n+1)-ary monotone Boolean functions is investigated, as well as the one-to-one correspondence between n-ary monotone ternary majority functions and (n+1)-ary monotone binary threshold functions. The ternary majority functions are enumerated. >

Abstract: SKOL, a system for the synthesis of combinational logic using a library of cells that emphasizes technology-mapping algorithms, is described. It combines current multilevel optimization techniques with a novel approach to technology mapping. Each factor (or the factorized Boolean equation) can be implemented by itself or collapsed into the higher level expression containing it, which is then implemented. An expression can be implemented in several ways, which differ in the degree of factorization. A number of selected implementations is evaluated and the one with minimal cost (area or delay) is chosen. The mapping algorithms are independent of the library of cells, which can be easily modified. Results from benchmark examples were better than or comparable to those for existing systems. >

Abstract: Aleksander has recently proposed neural networks which replace the connection weights of conventional models by logical devices, or Boolean functions, and achieve learning by a training with noise algorithm. We study the statistical dynamical properties of a randomly connected Aleksander network for associative memory. We determine the retrieval error, radius of attraction and storage capacity for the case of large but dilute connectivity.