Abstract: The ordered binary decision diagram is a canonical representation for Boolean functions, presented by Bryant as a compact representation for a broad class of interesting functions derived from circuits. However, the size of the diagram is very sensitive to the choice of ordering on the variables; hence for some applications, such as Differential Cascode Voltage Switch (DCVS) trees, it becomes extremely important to find the ordering leading to the most compact representation. We present an algorithm for this problem with time complexity O(n/sup 2/3/sup n/), an improvement over the previous best, which required O(n!2/sup n/).

Abstract: This paper deals with the learnability of Boolean functions. An intuitively appealing notion of dimensionality is developed and used to identify the most general class of Boolean function families that are learnable from polynomially many positive examples with one-sided error. It is then argued that although bounded DNF expressions lie outside this class, they must have efficient learning algorithms as they are well suited for expressing many human concepts. A framework that permits efficient learning of bounded DNF functions is identified.

Abstract: This paper describes a minimizing version of the Abraham sum-of-disjoint products (sdp) algorithm, called the Abraham-Locks-Revised (ALR) method, as an improved technique for obtaining a disjoint system-reliability formula. The principal changes are: 1) Boolean minimization and rapid inversion are substituted for time-consuming search operations of the inner loop. 2) Paths and terms are ordered both according to size and alphanumerically. ALR reduces the computing cost and data processing effort required to generate the disjoint system formula compared to the seminal 1979 Abraham paper, and obtains a shorter formula than any other known sdp method. Very substantial savings are achieved in processing large paths of complex networks.

Abstract: Minimal pairs for polynomial time reducibilities.- Primitive recursive word-functions of one variable.- Existential fixed-point logic.- Unsolvable decision problems for PROLOG programs.- You have not understood a sentence, unless you can prove it.- On the minimality of K, F, and D or: Why loten is non-trivial.- A 5-color-extension-theorem.- Closure relations, Buchberger's algorithm, and polynomials in infinitely many variables.- The benefit of microworlds in learning computer programming.- Skolem normal forms concerning the least fixpoint.- Spectral representation of recursively enumerable and coenumerable predicates.- Aggregating inductive expertise on partial recursive functions.- Domino threads and complexity.- Modelling of cooperative processes.- A setting for generalized computability.- First-order spectra with one variable.- On the early history of register machines.- Randomness, provability, and the separation of Monte Carlo Time and space.- Representation independent query and update operations on propositional definite Horn formulas.- Direct construction of mutually orthogonal latin squares.- Negative results about the length problem.- Some results on the complexity of powers.- The Turing complexity of AF C*-algebras with lattice-ordered KO.- Remarks on SASL and the verification of functional programming languages.- Numerical stability of simple geometric algorithms in the plane.- Communication with concurrent systems via I/0-procedures.- A class of exp-time machines which can be simulated by polytape machines.- ???-Automata realizing preferences.- Ein einfaches Verfahren zur Normalisierung unendlicher Herleitungen.- Grammars for terms and automata.- Relative konsistenz.- Segment translation systems.- First steps towards a theory of complexity over more general data structures.- On the power of single-valued nondeterministic polynomial time computations.- A concatenation game and the dot-depth hierarchy.- Do there exist languages with an arbitrarily small amount of context-sensitivity?.- The complexity of symmetric boolean functions.

Abstract: A network of switches controlled by Boolean variables can be represented as a system of Boolean equations. The solution of this system gives a symbolic description of the conducting paths in the network. Gaussian elimination provides an efficient technique for solving sparse systems of Boolean equations. For the class of networks that arise when analyzing digital metal-oxide semiconductor (MOS) circuits, a simple pivot selection rule guarantees that most s-switch networks encountered in practice can be solved with O(s) operations. When represented by a directed acyclic graph, the set of Boolean formulas generated by the analysis has total size bounded by the number of operations required by the Gaussian elimination. This paper presents the mathematical basis for systems of Boolean equations, their solution by Gaussian elimination, and data structures and algorithms for representing and manipulating Boolean formulas.

Abstract: This paper describes a fast and efficient method for minimization of two level single output Boolean functions The minimization problem is reduced to that of coloring of the graph of incompatibility of implicants The program permits also to remove static hazards and allows inversion of output's polarity which proves to be very convenient when designing with PAL's It gives solutions within a very reasonable amount of time On small industrial examples its speed is slightly better than Espresso and it occupies 6 times less memory

Abstract: We survey the current state of knowledge concerning the computation of Boolean functions by networks, with particular emphasis on the addition and multiplication of binary numbers.

Abstract: Four connectionistic/neural models which are capable of learning arbitrary Boolean functions are presented. Three are provably convergent, but of differing generalization power. The fourth is not necessarily convergent, but its empirical behavior is quite good. The time and space characteristics of the four models are compared over a diverse range of functions and testing conditions. These include the ability to learn specific instances, to effectively generalize, and to deal with irrelevant or redundant information. Trade-offs between time and space are demonstrated by the various approaches.

Abstract: The Kauffman model is a model of N randomly connected automata which evolve according to random Boolean functions. The two main aspects which are discussed are the size of the basins of attraction and the time evolution of the distance between two different configurations.

Abstract: How does the connectivity of a neural network (number of synapses per neuron) relate to the complexity of the problems it can handle (measured by the entropy)? Switching theory would suggest no relation at all, since all Boolean functions can be implemented using a circuit with very low connectivity (e.g., using two-input NAND gates). However, for a network that learns a problem from examples using a local learning rule, we prove that the entropy of the problem becomes a lower bound for the connectivity of the network.

Abstract: We consider (combinatorial) networks constructed by using unreliable gates with a given error probability. We show that for almost all Boolean functions f there are networks realizing f, having almost the same error probability as the gates and having almost the same complexity as the minimal (unreliable) networks realizing f in case no gate has failed (having a very great error probability). This may be contrasted with results of 1.) von Neumann (1952), 2.) Dobrushin/Ortyukov (1977), 3.) Pippenger (1985) to the effect that the number of gates needed 1.) for minimal (reliable) networks is larger by at most a logarithmic factor than the number needed for unreliable networks [5], 2.) for some Boolean functions is larger by at least a logarithmic factor, 3.) for almost all Boolean functions is a (very great) multiple of the number of gates for unreliable realizations.

Abstract: According to the definition of satisfaction of Boolean dependencies, Theorem 15 is not true for Boolean dependencies with negation. (A positive Boolean dependency is built using the Boolean connectives c, c, and n; a general Boolean dependency (with negation) may use also the Boolean connective ¬.) Actually, the definition of satisfaction is not meaningful for Boolean dependencies with negation, since many are never satisfied. We show how the definition of satisfaction should be changed in order to make Boolean dependencies with negation meaningful and correct the error.We associate with each relation r a set a(r) of truth assignments, as follows. For each pair of distinct tuples of r, the set a(r) contains the truth assignment that maps an attribute A to true if the two tuples are equal on A, and to false if the two tuples have different values for A. A Boolean dependency s is satisfied by a relation r if s (i.e., the corresponding Boolean formula) satisfies every truth assignment of a(r).The original definition given in the paper is equivalent to having a(r) also include the truth assignment that is generated by pairs in which both tuples are really the same tuple of r, that is, to having a(r) also always include the truth assignment t mapping all attributes to true. Under that definition, however, many Boolean dependencies with negation are never satisfied and, hence, are meaningless. More precisely, according to the original definition, a Boolean dependency is satisfied by

Abstract: Exponential lower bounds (2n/48) are proved for the real-time complexity of Dyck languages.

Abstract: The correlation-immunity of nonlinear combiners is studied in detail in the letter by the weight analysis of Boolean functions.

Abstract: Detecting essential primes is important in multiple-valued logic minimization. In this correspondence, we present a fast algorithm that can generate all essential primes without generating a prime cover of the Boolean function. A new consensus operation called asymmetric consensus (acons) is defined. In terms of acons, we prove a necessary and sufficient condition for detecting essential primes for a Boolean function with multiple-valued inputs. The detection of essential primes can be performed by using a tautology checking algorithm. We exploit the unateness of a Boolean function to speed up tautology checking. The notion of unateness considered is more general than that has appeared in the literature.

Abstract: Let $R$ be a unidirectional asynchronous ring of $n$ processors each with a single input bit. Let $f$ be any cyclic non-constant function of $n$ boolean variables. Moran and Warmuth [8] prove that any deterministic algorithm for $R$ that evaluates $f$ has communication complexity $\Omega (n \log n)$ bits. They also construct a cyclic non-constant boolean function that can be evaluated in $O(n \log n)$ bits by a deterministic algorithm. This contrasts with the following new results: \begin{enumerate} \item There exists a cyclic non-constant boolean function which can be evaluated with expected complexity $O (n \sqrt{\log n})$ bits by a randomized algorithm for $R$. \item Any nondeterministic algorithm for $R$ which evaluates any cyclic non-constant function has communication complexity $\Omega (n \sqrt{\log n})$ bits. \end{enumerate

Abstract: The ability of the strongest parallel random access machine model WRAM is investigated. In this model different processors may simultaneously try to write into the same cell of the common memory. It has been shown that a parallel RAM without this option (PRAM), even with arbitrarily many processors, can almost never achieve sublogarithmic time. On the contrary, every function with a small domain like binary values in case of Boolean functions can be computed by a WRAM in constant time. The machine makes fast table look-ups using its simultaneous write ability. The main result of this paper implies that in general this is the “only way” to perform such fast computations and that a domain of small size is necessary. Otherwise simultaneous writes do not give an advantage. Functions with large domains for which any change of one of the n arguments also changes the result are considered, and a logarithmic lower time bound for WRAMs is proved. This bound can be achieved by machines that do not perform simultaneous writes. A simple example of such a function is the sum of n natural numbers.

Abstract: Let the multiplicative complexity L ( f ) of a boolean function f be the minimal number of ∧-gates that are sufficient to evaluate f by circuits over the basis ∧, ⊕, 1. We characterize the multiplicative complexity L ( f ) of quadratic boolean forms f ; it is half the rank of an associated matrix. Two quadratic boolean forms f; g have the same complexity L ( f )= L ( g ) iff they are isomorphic by a linear isomorphism. We characterize computational independence of two quadratic boolean forms f 1 , f 2 in the sense that L ( f 1 , f 2 )= L ( f 1 )+ L ( f 2 ).

Abstract: An algorithm to minimize decision trees of Boolean functions with multiple-valued inputs is presented. The recursive algorithm is used to obtain a complement of a sum-of-products expression for a binary function with multiple-valued inputs. In the case where each input is p-valued, the algorithm produces at most pn−l products for n-variable functions, whereas Sasao's algorithm produces pn/2 products. This upper bound on the number of products is the best possible.

Abstract: For assisting the self-test of circuits with unequiplebable random patterns, a logic module is provided which is composed of two types of basic cells. Each basic cell contains a register cell and a sub-circuit composed of gates. Dependent on two control signals, the basic cells can be operated as a normal register, as a shift register or as a linear feedback shift register. In the operational mode as a linear feedback shift register, the logic module can be used as a random pattern generator. To this end, the logic module is divided into a first module and into a second module. The first module contains an interconnection of two types of basic cells and a combinational logic system which operates the one part of the output signals of the basic cell in accordance with a Boolean function. The operational result is supplied to a second module of identical basic cells which operates as a shift register. When a random bit sequence is input into the first module, then all basic cells of the linear feedback shift register are a logical "1" with the probability of 0.5. Following the operation of a portion of the output signals of the basic cells in the combinational logic system, a bit sequence is shifted into the second module, the bit places of this bit sequence being a logical "1" with a probability determined by the Boolean function.

Abstract: Let the multiplicative complexity L(f) of a boolean function f be the minimal number of ∧-gates that are sufficient to evaluate f by circuits over the basis ∧,⊕,1. We give a polynomial time algorithm which for quadratic boolean forms f=⊕i≠jaijxixj determines L(f) from the coefficients aij. Two quadratic forms f,g have the same complexity L(f) = L(g) iff they are isomorphic by a linear isomorphism. We also determine the multiplicative complexity of pairs of quadratic boolean forms. We give a geometric interpretation to the complexity L(f1,f2) of pairs of quadratic forms.

Abstract: In this correspondence we present a design technique for implementation of systems of Boolean functions in the form of multilevel AND-OR networks. We show that for a given system of Boolean functions, the transition from the traditional two-level AND-OR implementation to multilevel AND-OR implementations results in considerable savings in gate counts and delays. We discuss gate-array implementations of these multilevel networks and their space and time complexities. Experimental data for 11 different components of peripheral control units for VAX computers indicate that the transition from the two-level implementations to multilevel implementations results in average savings of about 40 percent in gate counts, of about 25 percent in required silicon areas and of about 25 percent in delays, which illustrate a good potential of the proposed techniques for design of cost-efficient gate arrays.

Abstract: Disclosed is a test-cause generation method for implementing systematically the function test of logical devices. The method features the generation of partial test-causes for checking the functional relation at each state transition through the operations of entering a boolean function expressed in a decision table indicative of input-output correspondence, checking the constraint conditions for eliminating infeasible combinations between cause nodes, and expanding the decision table to produce all permissible partial test-causes.

Abstract: The paper enumerates the allowable combinations of decipherable boolean functions of certain types, namely functions of a given number of message and key bits. Such an enumeration is based upon decipherable functions property of being one-to-one. Formulas for finding the number of decipherable boolean functions are also given.