Abstract: Application of exclusive-OR logic design suffers from a lack of straightforward design methods. Recently a procedure using generalised Reed-Muller (GRM) coefficient maps has been proposed. Based on this approach, an efficient computer method is developed for the generation of all 2n sets of GRM coefficients of an n-variable Boolean function. Along with the coefficients a metric may be calculated from which the minimum cost set according to some criterion may be selected. The method requires a storage of 2n bits and an average of 2n-1 + n/2 ExOR single-bit operations per set of GRM coefficients.

Abstract: In this paper we present a theory of relational database systems based on the partition lattice, which represents a new mathematical approach to the structure of relational database systems. A partition lattice can be defined for any given relation. This partition lattice is shown to be a meet-morphic image of the Boolean algebra of subsets of the attribute set. The partial ordering in the lattice is proved to be equivalent to the concept of functional dependency, and thus Armstrong's axioms for functional dependencies are proved. We solve the problem of finding the list of all keys by seeking the prime implicants of the Boolean function associated with the principal ideals generated by the attributes. We demonstrate the properties of the Boyce-Codd Normal Form (BCNF), and give a modified algorithm for synthesizing an information-lossless BCNF based on the principal filter. The necessary and sufficient conditions for multivalued dependency (MVD) are given in terms of a lattice equation, and the inference rules of MVD are proved. The necessary and sufficient conditions for join dependency (JD) are given; consequently, we can prove the known result that acyclic join dependency (AJD) is equivalent to a set of MVDs. The concept of data independence is introduced, and is extended to conditional independence and mutual independence. We established this algebraic theory of relational databases in the same spirit that the theory of probability was constructed. We present a comparison that demonstrates the similarities.

Abstract: Branching programs for the computation of Boolean functions were first studied in the Master's thesis of Masek.7 In a rather straightforward manner they generalize the concept of a decision tree to a decision graph. Let P be a branching program with edges labelled by the Boolean variables, x1,...,xn and their complements. Given an input a=(a1,...,an) e {0,1}n, program P computes a function value fp(a) in the following way. The nodes of P play the role of states or configurations. In particular, sinks play the role of final states or stopping configurations. The length of program P is the length of the longest path in P. Following Cobham,2capacity of the program is defined to be the logarithm to the base 2 of the number of nodes in P. Length and capacity are lower bounds on time and space requirements for any reasonable model of sequential computation. Clearly, any n-variable Boolean function can be computed by a branching program of length n if the capacity is not constrained. Since space lower bounds in excess of log n remain a fundamental challenge, we consider restricted branching programs in the hope of gaining insight into this problem and the closely related problem of time-space trade-offs.

Abstract: A multi-layered neural assembly is developed which has the capability of learning arbitrary Boolean functions. Though the model neuron is more powerful than those previously considered, assemblies of neurons are needed to detect non-linearly separable patterns. Algorithms for learning at the neuron and assembly level are described. The model permits multiple output systems to share a common memory. Learned evaluation allows sequences of actions to be organized. Computer simulations demonstrate the capabilities of the model.

Abstract: An oscilloscope vertical amplifier with Boolean combinatorial trigger generator capability is disclosed. While the display output is fully analog, the trigger output to the time base is digital with a user selectable Boolean function of the analog input signals. Also included is nested triggering, edge as well as level sensitivity, and a trigger filter to selectively inhibit high frequency events. The delay times of the analog and digital signal paths are matched by means of analog delay lines before presentation by a visual display to present the analog and digital signals in time coincidence to the oscilloscope main frame.

Abstract: With the goal of making exclusive-OR formulations of switching functions more readily available to designers for implementation in LSI and VLSI technologies, we introduce the concept of an exclusive-OR space in which an exclusive-OR normal form is defined to correspond to the conventional disjunctive normal form. A geometrical representation of exclusive-OR space is described, and its various bases are listed and discussed.

Abstract: It is well-known that all Boolean functions of n variables can be computed by a logic circuit with O(2n/n) gates (Lupanov's theorem) and that there exist Boolean functions of n variables which require logic circuits of this size (Shannon's theorem). We present corresponding results for Boolean functions computed by VLSI circuits, using Thompson's model of a VLSI chip. We prove that all Boolean functions of n variables can be computed by a VLSI circuit of O(2n) area and period 1, and we prove that there exist Boolean functions of n variables for which every (convex) VLSI chip must have Ω(2n) area.

Abstract: Information transfer is a basic measure of complexity in distributed computation. In VLSI, communication constraints alone dictate bounds on the performance of the chips. In this thesis, we study the complexity of distributed computation under several models, using information transfer as a complexity measure. Besides deterministic protocols, we consider nondeterministic and several probabilistic protocols. We derive optimal characterizations for nondeterministic and probabilistic protocols. For the polynomial time complexity classes, the fundamental problem of proving strict containment among deterministic, nondeterministic and probabilistic computations is wide open. We settle the analogues question for the Communication Complexity classes: We prove strict containment with exponential gaps between deterministic, nondeterministic, random, bounded and unbounded error probabilistic communication complexity classes. We explore connections between 1-way and 2-way communications and strengthen the known gap for deterministic protocols. Using this and our lower bound characterizations we show exponential gaps between 1-way and 2-way probabilistic communication complexity classes. We also derive bounds on the average information transfer using relationships from Classical Information theory. Using the Von Neumann Minimax theorem these bounds are translated to bounds on Las Vegas computations. We develop two general lower bound techniques to estimate the communication requirements for the distributed computation of a set of boolean functions. A partial list of problems for which we have shown maximal information transfer regardless of the partitioning of the input data includes integer multiplication, integer division, matrix squaring, matrix inversion, matrix multiplication, Discrete Fourier Transform, solving a linear system of equations, computing square roots,... . The novelty in our approach is that the techniques are simple and can be easily applied to obtain optimal bounds for many problems. Moreover, using one of our lower bound techniques and Shannon's first theorem we show bounds on the average information transfer under uniform distribution of the input data. Using these results we derive bounds on area time tradeoffs and the chip area required to solve these problems under a variety of VLSI models. Finally, we translate our bounds on information transfer to area time tradeoffs for probabilistic VLSI chips.

Abstract: An extension of the symmetries of two variables to multivariable symmetries is given, together with a derivation of spectral conditions for their detection. This also yields simpler expressions for Hurst's conditions for two-variable symmetries. The results are all extended to include incompletely specified functions. The method is illustrated for designing an eight-variable checker circuit using read-only memories.

Abstract: In this paper we investigate the method of Nechiporuk [3] for deriving lower bounds on the formula size of Boolean functions. At first we prove non-linear lower bounds for functions which are related to the existence of a k-clique or a k-circle in a graph. Furthermore we determine the formula size of the "disjoint disjunction" of the outputs of the Boolean matrix product. Finally we show how useful the method may be in the case of monotone functions if the length of the prime implicants is bounded.

Abstract: Much of the theoretical work on boolean networks and sequential automata deals with synchronous systems, partly because it is generally believed that the treatment of synchronous systems is desperately complicated. The purpose of this paper is to show (using methods developped before: Thomas, 1973; Thomas & Van Ham, 1974) that: a fully asynchronous logical description and treatment of this type of systems is feasible. that the description used here leads to a greatly enriched range of dynamical behaviours as compared with its synchronous homolog and even with other asynchronous logical descriptions. that, however rich, the range of dynamical behaviours is well-defined and perfectly analyzable (one does not find anything !). the formalism can be used to describe sequential automata (for a more formal analysis see Milgram (1982)) synchronous if one uses equal delays. asynchronous if one ascribes a value to each of the time delays (two per variable). stochastic: if instead of ascribing to each delay a defined value one characterizes it by an average value and a distribution. “generalized” if one considers the value (or the average value) of each delay as a function of the state of the system.

Abstract: The worst-case number of variable evaluations (testing cost) of Boolean functions is examined. Following up on a result by Rivest and Vuillemin, we show that all symmetric as well as all linearly separable Boolean functions are exhaustive, that is, have a pessimal worst-case testing cost.

Abstract: The hardware of computers may be well modelled by Boolean networks computing Boolean functions f:{0, 1}n → {0, 1}m. Though by counting arguments it is easy to show that nearly all Boolean functions may be computed only by networks of exponential size until now one is not able to prove nonlinear lower bounds for explicitly defined functions. Therefore one has restricted oneself to monotone networks where only -and ∨-gates are available. We repeat shortly the known methods for the proof of nonlinear lower bounds for the monotone network complexity of functions of n inputs and outputs. Afterwards we describe the method of using value functions, which was introduced by the author [13] to prove a bound of size n2/logn, until now the largest bound of this kind. For the Boolean convolution we present a new Ω(n3/2)-lower bound proved recently by one of my students (Weis [14]). There one combines the elimination method and some information flow arguments. Finally we discuss how one may combine the above mentioned methods in order to get perhaps better bounds for the Boolean convolution.

Abstract: An example of an irredundant combinational network realizing a Boolean function F 0 is presented which depicts a peculiar phenomenon that even a single stuck-at fault can change the function F 0 to a faulty funetion F f , such that F 0 and F f belong to the same P-equivalence class, i.e., F 0 can be transformed into F f by permuting the input literals. In addition, the reversibility of fault behavior in irredundant networks is also exemplified.

Abstract: An integrated, fully automatic software capability that combines Boolean logic translation, Boolean minimization, PLA folding, PLA topology generation, and automatic PLA subchip interfacing to the MP2D standard cell automatic placement and routing program in a single, modular software package is described. Written in ANSI standard FORTRAN, APSS permits the designer to input either arbitrarily formed Boolean equations or a truth table, and to receive a complete MP2D-compatible PLA subchip layout with automatically personalized MP2D subchip interfacing data, as output. As with MP2D, this capability is largely independent of technology and circuit implementation, requiring only an appropriate technology file and cell library consistent with the chosen PLA layout style or "Floor Plan."

Abstract: The generalization of the Hoarean property of the P program, in the form { f P{g}}, is discussed. Instead of the Boolean functions in the set of states V , binary relations which are subsets of VXM , where M can be an arbitrary set, are used for f and g .

Abstract: The concept of Boolean integration is introduced in this paper. The integration method that finds out the original function of a Boolean differential function, and some fundamental theorems are also presented.

Abstract: It is shown that there is a monotonic Boolean function whose representation by a system of linear inequalities with n Boolean variables requires not less than ( n [ n / 2 ] ) n − 1 inequalities. Suppose that we have the following system of non-linear inequalities: ∑ j − 1 n a i j x j ≤ b i , i = 1 , 2 , ... , m , (1) where the coefficients aij, bi i=1, 2, ... m, j=1, 2, ..., n are non-negative real numbers, and the variables xj, j=1, 2, ..., n are Boolean.