TL;DR: An important equivalence between operations with functional relations and operations with analogous Boolean functions is demonstrated and is computationally helpful in exploring the properties of a given set of functional relations, as well as in the task of partitioning a data set into subfiles for efficient implementation.
Abstract: The notion of a functional relation among the attributes of a data set can be fruitfully applied in the structuring of an information system. These relations are meaningful both to the user of the system in his semantic understanding of the data, and to the designer in implementing the system. An important equivalence between operations with functional relations and operations with analogous Boolean functions is demonstrated in this paper. The equivalence is computationally helpful in exploring the properties of a given set of functional relations, as well as in the task of partitioning a data set into subfiles for efficient implementation.
TL;DR: In the synthesis of circuits realizing Boolean functions it is important to construct minimal circuits, and Soprunenko obtained a minimal realization of conjunctions and disjunctions with the aid of circuits of functional elements in a base consisting of Sheffer’s stroke.
Abstract: In the synthesis of circuits realizing Boolean functions it is important to construct minimal circuits. Some results in this direction were obtained by Cardot [5], who proved the minimality of relay contact circuits for a sum of n variables modulo-2, whereas Soprunenko [3] obtained a minimal realization of conjunctions and disjunctions with the aid of circuits of functional elements in a base consisting of Sheffer’s stroke.
TL;DR: This paper reviews results previously published on the computation time of d-valued logical circuits for addition and multiplication and for computation of general Boolean functions and explicitly state hitherto unpublished but known results on the time necessary to divide in such circuits.
Abstract: A (d, r) circuit is a d-valued logical circuit in which each element has fan-in at most r and can compute any r-argument d-valued logical function in unit time. In this paper we review results previously published on the computation time of such circuits for addition and multiplication and for computation of general Boolean functions. We also explicitly state hitherto unpublished but known results on the time necessary to divide in such circuits.
TL;DR: In this article, the authors discuss various methods to enumerate graphs, rooted graphs, connected graphs, bicolored graphs, locally restricted graphs, symmetric graphs, boolean functions, and eulerian graphs.
Abstract: Publisher Summary
This method discusses various methods to enumerate graphs, rooted graphs, connected graphs, bicolored graphs, locally restricted graphs, symmetric graphs, boolean functions, and eulerian graphs. Polya's efficient method for counting graphs requires the construction of a permutation group whose orbits correspond precisely to isomorphism classes of labeled graphs with p points and q lines. On deriving an explicit formula for the appropriate cycle index, an application of PET with figure counting series 1 + x determines the counting polynomial that has as the coefficient of xq the number of (p, q) graphs. In a multigraph, more than one line can join two points.
TL;DR: A nontrivial connection with three-valued functions is shown to provide a tool which might serve to express a linearly separable function in terms of its Chow parameters.
Abstract: The coefficients of the tensorial linearized expression of any boolean (in particular, linearly separable) function are exhibited as solutions of simple algebraic equations. A nontrivial connection with three-valued functions is shown to provide a tool which might serve to express a linearly separable function in terms of its Chow parameters. This formalism is meant for applications in neural net theory and in the study of statistical and critical phenomena of various kinds.
TL;DR: The Ashenhurst-Curtis theory of complex disjunctive decompositions is extended to the realm of incompletely specified Boolean functions and a compatibility relation on the column vectors of the decomposition chart is introduced, which is applied to identify all possible simple disjunctions for each input partition.
Abstract: In this paper the Ashenhurst-Curtis theory of complex disjunctive decompositions is extended to the realm of incompletely specified Boolean functions. A compatibility relation on the column vectors of the decomposition chart is introduced, which is applied to identify all possible simple disjunctive decompositions for each input partition. The assignments of the DON'T CARE (φ) conditions that are required to realize these simple decompositions are described by a vector listing the constraints on these φ's by new Boolean variables caled constrained DON'T CAREs. A compatibility relation is introduced on these vectors, caled constrained Boolean vectors, which is applied to form complete decompositions. A Complete decomposition is one for which al possible simple decompositions have been combined into a complex decomposition. Throughout the procedure, the freedom of choice implied by the φ's is maintained as far as is alllowed by the choices that have been made to achieve the decompositions.
TL;DR: A highly-efficient LSI logic family combining the advantages of multi-emitter structures with the performance of ECL logic will be discussed.
Abstract: A highly-efficient LSI logic family combining the advantages of multi-emitter structures with the performance of ECL logic will be discussed. Simplified gate structure has been found to reduce propagation delay, power and number of logic levels required for logic function realization. Conventional processing affords 2-5 pJ performance.
TL;DR: A procedure is given to decompose a Boolean function into a feedback free circuit and either gives a logic hazard-free circuit or shows that the Boolean function cannot be broken down into a Feedback free circuit which is free of logic hazards for multiple input changes.
Abstract: This paper deals with hazards on outputs of combinational circuits without feedback for multiple input changes. A procedure is given to decompose a Boolean function into a feedback free circuit. The procedure either gives a logic hazard-free circuit or shows that the Boolean function cannot be broken down into a feedback free circuit which is free of logic hazards for multiple input changes.
TL;DR: In this paper, the concept of "primary partition" of Boolean functions has been introduced and a systematic method of obtaining the multithreshold realization of Boolean Functions based on this new concept is presented.
Abstract: In this paper, the concept of "primary partition" of Boolean functions has been introduced. A systematic method of obtaining the multithreshold realization of Boolean functions based on this new concept is presented. The problem essentially reduces to a table lookup procedure; the computational labor in finding the minimum-threshold minimum fan-in solution is substantially reduced.
TL;DR: In this paper, the Ashenhurst-Curtis theory of complex disjunctive decompositions is extended to the realm of incompletely specified Boolean functions, and a compatibility relation on the column vectors of the decomposition chart is introduced, which is applied to identify all possible simple decomposition for each input partition.
Abstract: In this paper the Ashenhurst-Curtis theory of complex disjunctive decompositions is extended to the realm of incompletely specified Boolean functions. A compatibility relation on the column vectors of the decomposition chart is introduced, which is applied to identify all possible simple disjunctive decompositions for each input partition. The assignments of the DON'T CARE (φ) conditions that are required to realize these simple decompositions are described by a vector listing the constraints on these φ's by new Boolean variables caled constrained DON'T CAREs. A compatibility relation is introduced on these vectors, caled constrained Boolean vectors, which is applied to form complete decompositions. A Complete decomposition is one for which al possible simple decompositions have been combined into a complex decomposition. Throughout the procedure, the freedom of choice implied by the φ's is maintained as far as is alllowed by the choices that have been made to achieve the decompositions.
TL;DR: The present paper shows how to increase the speed of the Boolean analyzer many times by making its processing more parallel.
Abstract: A processor called Boolean analyzer has been presented at the 1968 IFIP Congress to introduce parallel processing of Boolean expressions [1]. The present paper shows how to increase its speed many times by making its processing more parallel. The applications of the Boolean analyzer are limited to few but important problems. A typical problem of that kind: listing of all implicants of a function of 7 variables defined by not more than 100 term implicants (of the complement of that function) takes only about 40 ?s (supposing a delay line storage working at the clock impulse rate of 2.106/s).
TL;DR: A rectangular universal iterative array consisting of cells having three inputs and one output achieves the best known rate of increase in area.
Abstract: A rectangular universal iterative array consisting of cells having three inputs and one output is described. This array achieves the best known rate of increase in area.
TL;DR: It is proved that with some constraints on the structure of a monotonic Boolean function, an optimal recognition algorithm based on the calculation of estimates ensures absolute accuracy of recognition.
Abstract: IT is proved that with some constraints on the structure of a monotonic Boolean function, an optimal recognition algorithm based on the calculation of estimates ensures absolute accuracy of recognition A family of algorithms for calculating the estimates A(k, e, δ1, δ2), described in [1] is considered The training tables t1 and control tables T2 represent certain aggregates of permissible rows, divided into two classes with m rows in each (for t1) and T rows in each (for T2) The sets of permissible rows for the classes k1 and K2 are defined as follows
TL;DR: In this article, the authors describe derivation and use of extraction algorithm that may be adapted to simplification of such simultaneous Boolean functions, which are represented by Boolean functions in combination switching networks with multiple outputs.
Abstract: Combination switching networks with multiple outputs may be represented by Boolean functions. Report has been prepared which describes derivation and use of extraction algorithm that may be adapted to simplification of such simultaneous Boolean functions.
TL;DR: In this paper, it is proved that a finite algorithm can be found to represent any BOOLEan function f as a polynomial expression whose argumen is at most three BOOLean functions of the variable appearing in f. The interation of the algorithm will generate, in a finite number of steps, and expression of the original function as a BOOlean polynomical whose arguments are linearly separable functions of f, each of which may, furthermore, be required to satisfy additional optimally conditions.
Abstract: A theorem is proved that provides a finite algorithm to represent any BOOLEan function f as a BOOLEan expression whose argumen are at most three BOOLEan function of the variable appearing in f. The interation of the algorithm will generate, in a finite number of steps, and expression of the original function as a BOOLEan polynomical whose arguments are linearly separable functions of the original variale each of which may, furthermore, be required to satisfy additional optimally conditions.
TL;DR: A modification in the algorithm for the detection of totally symmetric functions as expounded by the author in an earlier note1 is presented here.
Abstract: A modification in the algorithm for the detection of totally symmetric functions as expounded by the author in an earlier note1 is presented here. The modified algorithm takes care of a limited number of functions that escape detection by the previous method.
TL;DR: In this paper, a technique for obtaining the product of sum expression from the sum of product expression of a Boolean function is presented, where a tabular representation is made with the product terms and the variables present in the function specified in the sum-of-product form and appropriate rows of the table are combined to give different sum terms.
Abstract: A technique has been developed in this article for obtaining the ‘ product of sum ’ expression from the ‘ sum of product ’ expression of a Boolean function. In this technique, first a tabular representation is made with the product terms and the variables present in the function specified in the ‘ sum of product ’ form and then appropriate rows of the table are combined to give different sum terms. The idea of the technique has also been extended for obtaining the third-order minimal expression of a Boolean function.
TL;DR: Systematic methods are presented for determining minimal and m-minimal sets of variables for partial boolean functions by constructing corresponding minimal covering problems.
Abstract: Systematic methods are presented for determining minimal and m-minimal sets of variables for partial boolean functions. This is done by constructing corresponding minimal covering problems.
TL;DR: An algorithm for pattern classification using the concept of characteristic vector of a Boolean function first proposed by Dertouzos for single-threshold element realization is presented and it is shown that the algorithm is convergent for a finite number of iterations.