Abstract: TRANSCEIVER FOR MULTI-DROP LOCAL AREA NETWORKS ABSTRACT A multi-drop local area network utilizes alternating current power lines as a transmission channel. Identical transceivers are used as a master and as up to 255 slaves. Each transceiver comprises modulator and demodulator units and a microprocessor control unit which may be connected to a host. The modulator and demodulator are connected to the alternating current power line through a high pass filter comprising a split bobbin, iron core transformer having an air gap which also provides impedance matching. The demodulator includes a clipper and analog circuitry providing a band pass filter and generating a square wave corresponding to the received carrier. A state machine acting as a digital filter produces a received carrier signal only when each half cycle of the carrier square wave is of the proper duration and the carrier signal has existed for slightly more than one half of the transmitted bit duration, which is a predetermined number of carrier cycles. The microprocessors are programmed to provide for block ahead acknowledgment, alternate transmissions between master and slaves; each block message comprises an acknowledgment non-acknowledgment bit, a message sequence bit, a polling sequence bit, and a longitudinal redundancy check. The carrier frequency utilized lies in the range of 20 to 40 KHz and preferably within the range between 27 and 33 KHz for a power line transmission channel. Error free 1200 Baud transmission rates are achieved in full duplex. Higher carrier frequencies and transmission rates are possible over less noisy transmission channels such as wire pairs.

Abstract: An on-off keyed carrier signal is demodulated by quadrature sampling of the incoming carrier signal at twice carrier frequency to provide short term digital patterns indicating detection of an incoming signal of carrier frequency. A number of phase counting channels are provided which count the number of times a particular pattern is detected during a longer interval, preferably a sixth of a bit interval at the baud rate of the received message. Since the phase counters are reset every sixth of a bit they can collectively accommodate a substantial drift in phase of the received carrier during reception of a complete 33 bit message while still operating asynchronously with respect to the received carrier.

Abstract: In the transmitter of a data communication system using QAM, a trellis coder with k-baud delay units is used for forward error correction. The output of the encoder is modulated using QAM to generate sequential baud signal elements. The redundant data bits generated are distributed among several non-consecutive bauds. At the receiver a plurality of distributed convolutional decoders are utilized to decode the received signal element. The distributed trellis decoder is self-synchronizing.

Abstract: The maximum-likelihood frame synchronizer was recently derived for direct-detection optical communications assuming baud synchronization. In this paper we present an extension to those results when pulse-position modulation is used and jointly derive baud and frame synchronization from slot synchronization. The optimum rule is seen to consist of a simple correlation term and a nonlinear correction term. Simulation results for the optimum rule compared to analytical and simulation results for the simple correlation rule show that equivalent performance for the simple correlation rule requires a substantial increase in signal power. To design good synchronization patterns, we use a divergence measure derived from the optimum rule. A simple algorithm is derived to test whether a given sequence is good or not.

Abstract: A method and apparatus for providing secure electronic communications over a communications medium between first and second locations is disclosed. A data device for generating and/or receiving data is located at each of the locations. A composite modem is coupled to each data device. Each composite modem comprises a microprocessor controller operating under program control for determining the configuration of the message to be transmitted from one data device to the other. The controller is coupled to a switching circuit which selects, in dependence on a configuration message generated by the controller, the configuration of the message to be transmitted. A plurality of characteristic controllers are coupled to the switching circuit. Each characteristic controller is provided to select at least one variation of one of a plurality of characteristics of the message, including the baud rate, transmission coding scheme, transmission method, parity technique, transmission technique (full or half duplex), carrier frequency and modulation technique. The configuration message is also transmitted to the second location so that the second location can be properly configured to receive the message. At time intervals, preferably random time intervals, the configuration message is changed. The configuration message itself is also preferably generated randomly. The configuration message can be changed as often as necessary to prevent unauthorized access to the information transmitted over the communications channel.

Abstract: A token ring access control protocol circuit which includes an M/T converter for converting incoming serial data in differential Manchester encoded form into transitional encoded form. Next the data is fed into a shift register and held temporarily while it is compared with preset sequences to determine if it is a starting delimiter or an ending delimiter. If a starting delimiter pulse is generated and used to synchronize subsequent circuitry if required. Data from the shift register is continuously sampled with at least a 2 baud delay by a data sample latch circuit which provides and output line for data values and another output line for code violation signals. The data values and code violation values go to a data receiving circuit which processes the data, and loads it onto a local data bus for transmission to other parts of a token ring control system. A data insertion multiplexer has inputs which are connected to the serial data output of the shift register, the output of the transmit machine and to various state machines for inserting modified data into the serial data path. The output of the data insertion multiplexer goes both to a transmit output multiplexer and to a fairness delay.

Abstract: In the transmitter of a data communication system using QAM, a plurality of trellis coders with delay units are used for forward error correction. The output of each encoder is modulated using QAM to generate sequential baud signal elements. The redundant data bits generated are distributed among several non-consecutive bauds. At the receiver a distributed convolutional decoder individually addressed having sectioned memory elements is utilized to decode the received signal element. The distributed trellis decoder is self-synchronizing.

Abstract: A method of providing simultaneous voice and data communication for multiple ports in a digital line card of a PBX is provided. In one form, 64 K baud non-blocking voice communication for seven coupled ports and simultaneous 9.6 K baud user data communication for each port may be implemented in a single conventional line card. Voice and data bits are transmitted in frames comprising thirty-two time slots. Data bits from the various user ports are multiplexed into a single eight bit time slot. Voice bits for each port are transmitted in eight bit time slots. In one form, each time frame comprises four time slots for data and twenty-eight time slots for voice.

Abstract: PURPOSE: To simplify a constitution and to improve the convenience for usage by using a counter to count the number of sampling pulses in a start bit width, discriminating a Baud rate and outputting a Baud rate clock pulse from a frequency divider based on the result of discrimination. CONSTITUTION: In receiving a data RD, the leading of a start bit 9a sent at the beginning of the data RD is detected at first by a detector 11 and the output of the detector 11 activates a counter 12 until the counter is inactivated at the trailing of the start bit 9a to count sampling clock pulses CLK thereby discriminating the Baud rate. Then the output of the counter 12 controls a frequency divider 13 to frequency-divide the sampling clock pulse CLK and a Baud rate clock pulse BCP is outputted. COPYRIGHT: (C)1987,JPO&Japio

Abstract: PURPOSE:To eliminate the need for the software and also to manage that only one trasmission will do for a sample serial data by generating plural kinds of Baud rate clocks through the combination of a D/A converter and an operational amplifier. CONSTITUTION:A serial date with a Baud rate transmitted from a terminal devide is inputted to a reception terminal of a serial I/O and also to an AND gate 1 of a Baud rate automatic generating system. An output of a pulse generator 2 is inputted to the AND gate 1 and also to an N-bit counter 3. The output of the counter 3 is inputted to a D/A converter 6. In setting the output voltage of the D/A converter 6 corresponding to the Baud rate of the inputted serial data, a sinusoidal wave having a frequency corresponding to the output voltage is obtained from an oscillating circuit comprising an operational amplifier. The wave is converted into a rectangular wave by a Schmitt trigger circuit 8, frequency- divided by 1/120 at a frequency division circuit 9 so as to obtain the sampling frequency having the desired Baud rate.

Abstract: An improved quadrature differential phase shift keyed signal demodulator for use in a modem is shown. A delay circuit (12) delays an input signal for a portion of a baud time. Synchronous detectors (21, 23) mix the original and delayed input signals with coherent reference signals to obtain detected outputs which are alternately provided to a processor (60) by a multiplexer (25). The processor (60) determines the phase shift and provides the demodulated data. An offset baud clock phase locked loop (40) provides a baud clock which is offset by a ninety degree phase lag. The offset baud clock caused the multiplexer (25) to provide detected outputs to the processor (60) for the center one-half of each baud. The result is a demodulator with fewer components and an improved data error rate.

Abstract: PURPOSE:To identify easily the phase modulation system and the frequency shift modulation system when they are mixed by supervising a carrier phaser error of the reception mode of a phase modulation wave CONSTITUTION:A switch 21 is a switch to change over a high speed reception section 1 or a low speed reception section 2, after an input signal 3 is incoming, the carrier phase error signal 20 is compared by a comparator 22, and the switch is thrown to the low speed position when the signal 20 is a certain threshold value or over and to the high speed position as it is when not by using a control signal 23 For example, with the phase modulation system as the CCITTV29,9600bps, the frequency shift modulation system (FSK modulation system) as 300 baud, 1,850Hz and 1,650Hz respectively for ''0'', ''1'' and 9,600Hz of the sampling rate by the processor, then the carrier phase error 20 is a numeral proportional to 2piDELTAf/9,600 with the input signal of high speed reception wave and a numeral value larger than 2pi50/9,600 when an FSK signal is inputted, and a threshold value possible for decision is placed between both the values

Abstract: A modem is operated in a half-duplex mode having various elements which are trained on data and which are locked up while data is not exchanged, thereby eliminating the need for a preamble. A preamble is used if the period between successive transmissions exceeds a preselected threshold. In addition, a parity encoder is used to calculate a parity word for each transmission, said parity word being inserted in the first baud period of the next transmission. This first baud period is usually empty because data signals have not been received yet from the corresponding data transmission equipment.

Abstract: The design of a time compression multiplex chip set for full duplex transmission at 160k baud over single twisted pair will be described.The circuit employs coded data and is optimized for lines up to 1000 feet.

Abstract: A DTE (10) can control the modems to which it is connected by sending control messages on the data channel, and analyzing report messages it receives in return. Each control message is identified by a specific header. A control message to a remote modem (34) is intercepted by the local modem (30) and reformatted into a supervisory message that is transmitted at the rate of one bit per baud. A control message for a remote multichannel modem (48) is transmitted either by a supervisory message or in data mode.

Abstract: PURPOSE:To secure signal reception and shorten a communication time by receiving position group signals from sign posts provided in respective areas and varying the transmission rate (baud rate) of transmit signals according to the position group signals when slave stations originate to a master station optionally. CONSTITUTION:Even when the transmission speeds of signals from slave stations 2 are different like 300, 600, and 1,200 baud, some of decision circuits 151, 152, 153...15n match with each baud rate and only demodulated signals which are judged to be normal are outputtted to a signal processor 11. Further, when the slave station 2 in an area A1 originates with a call switch, the timer for signal transmission in the signal processor 2 is switched on the basis of the position group signal from a sign post to set the signal transmission rate to 1,200 baud and the 1st and the 2nd modulating circuit switch means 25 and 26 select the 3rd modulating circuit 243, so the signal of car number data on the slave station 2 is transmitted to the master station 1 at the 1,200 baud transmission rate through radio equipment 23.

Abstract: PURPOSE:To improve the operability for devices which transmit serial data to each other by setting automatically the transmission speeds at levels adaptive to each other after confirming mutually the propriety of the transmission speeds between both devices. CONSTITUTION:When transmission is started, a transmission device 2 at the slave side sends a transmission request to a transmission device 1 at the master side in a Baud rate of 4800 or 9600B. The device 1 identifies the possibility of transmission (reception) and sends an adaptation signal back to the device 2 if the transmission (reception) is possible. Then the device 1 sets its Baud rate at an adaptive level. While an adaptation-unable signal is sent back if the transmission is impossible. Then the device 2 identifies the sent-back signal and sets its Baud rate at a requested level in case an adaptation-enable signal is received. A Baud rate request of the next lower position is transmitted when an adaptation-unable signal is received. Such operations are repeated to set automatically the transmission speed at an adaptive level.

Abstract: A method is described for the transmission of software and digital data at rates of multiples of 500 baud as part of a broadcast television signal. Unlike teletext-based systems, this method enables signals to be recorded on a domestic video recorder for subsequent decoding. The receiver interface is also much simpler, consisting of low-cost, commonplace components in a configuration which can be assembled by novices.

Abstract: PURPOSE:To eliminate the need for switch change-over, etc. in the operation of an electronic fare balance to which outside apparatus of different Baud rates are selectively connected and which outputs serial data by changing over automatically the balance to the Baud rate meeting the outside apparatus by a key operation. CONSTITUTION:An interface 30 is first set at 2400BPS by a mode instruction. The Baud rate 2400BPS is inputted or outputted to or from a cassette magnet tape (CMT) when a front key 10 is operated in the case of, for example, the CMT. The Baud rate is changed over to 600BPS and the data is outputted by the operation of the key 10 and is returned to 2400PBS by the mode instruction after ending of the output in the case of a journal printer. The apparatus used is judged automatically by the input from the key 10 and the Baud rate is changed over according to the outside apparatus to be connected.

Abstract: PURPOSE:To simplify and miniaturize the construction of a Baud rate generator by seleting a frequency division signal of a plurality of timepiece oscillation sources with a frequency switching circuit to control the Baud rate through one counter. CONSTITUTION:A plurality of frequency division outputs from a timepiece frequency division circuit 1 are selected with a frequency switching circuit 2 and counted with a sampling counter 4 controlled by a Baud rate controlling circuit 8. Then, series-parallel and parallel-series converters 6 and 7 respectively for the reception and transmission are controlled with a Baud rate clock outputted from the counter 4. The selection of the frequency division outputs enables the formation of the desired Baud rate clock without the use of a number of counters thereby simplifying and miniaturizing the construction of a Baud rate generator of an electronic timepiece therewith for the standard interface scale RS-232C.

Abstract: A new technique is proposed for demodulation of phase modulated signals. The new technique is called Decision Directed Adaptive Demodulation (DDAD) which is an adaptive match filtering algorithm that uses an estimate of the present symbol in the adaptation algorithm. The DDAD replaces the carrier-recovery and baud detection sections found in conventional demodulators. Conventional carrier recovery utilizing phase lock loops is limited to acquisition over a relatively narrow bandwidth and low noise conditions. The advantages of the DDAD include a wide acquisition range, robustness to noise, and rapid initial acquisition.

Abstract: The design of two 8th order switched capacitor filters for anFFSKmodem is described The response of the filters in the passband is not made flat, in order to optimize the signal to noise ratio of the transmission channel The design of passive prototypes and the criteria for the choice of the best passive and active topologies are described Computer simulation results of the performances of the SC filters are given

Abstract: PURPOSE:To realize the reliability of recording and the shortening of a reproducing time, and also to execute the recording with high density by storing a data by reducing stepwise a Baud rate for modulating the data as it goes to a data whose importance degree is high. CONSTITUTION:A recording track 20 consists of idle bands 21,... and data block bands 22, 23,..., and the block bands 22, 23,... consist of head parts 22a, 23a,... and data parts 22b, 23b,.... The header parts 22a, 23a contain a Baud rate designating data for designating a Baud rate for modulating a data in accordance with the importance degree of the next data part. The data parts 22b, 23b,... contain a control data program data, picture data, etc., and they are designated as a data whose importance degree is the highest, an important data, and a data whose importance degree is low, respectively. Also, as the data goes to a data whose importance degree is high, it is recorded by reducing a Baud rate. In such a way, the reliability of recording and the shortening of a reproducing time can be satisfied, and also the recording can be executed with a high density.