Topic
Background debug mode interface
About: Background debug mode interface is a research topic. Over the lifetime, 935 publications have been published within this topic receiving 16007 citations.
Papers published on a yearly basis
Papers
Proceedings Article•
10 Apr 2005TL;DR: Substituted phenol/epichlorohydrin/amine adducts as multipurpose, low concentration additives for hydrocarbon fuels, lubricating oils and mixtures thereof.
Abstract: Operating systems are difficult to debug with traditional cyclic debugging. They are non-deterministic; they run for long periods of time; they interact directly with hard-ware devices; and their state is easily perturbed by the act of debugging. This paper describes a time-traveling virtual machine that overcomes many of the difficulties associated with debugging operating systems. Time travel enables a programmer to navigate backward and forward arbitrarily through the execution history of a particular run and to replay arbitrary segments of the past execution. We integrate time travel into a general-purpose debugger to enable a programmer to debug an OS in reverse, implementing commands such as reverse breakpoint, reverse watchpoint, and reverse single step. The space and time overheads needed to support time travel are reasonable for debugging, and movements in time are fast enough to support interactive debugging. We demonstrate the value of our time-traveling virtual machine by using it to understand and fix several OS bugs that are difficult to find with standard debugging tools. Reverse debugging is especially helpful in finding bugs that are fragile due to non-determinism, bugs in device drivers, bugs that require long runs to trigger, bugs that corrupt the stack, and bugs that are detected after the relevant stack frame is popped.
394 citations
Patent•
21 Jul 1994TL;DR: A microprocessor comprises a processor element, a memory interface element, an IO interface, a debug support element, and an internal bus interconnecting all above elements as mentioned in this paper for easy debugging, it also comprises attached to the internal bus a registered boundary scan standard (JTAG) interface that accesses one or more scan chains inside the microprocessor.
Abstract: A microprocessor comprises a processor element, a memory interface element, an IO interface element, a debug support element and an internal bus interconnecting all above elements For easy debugging, it also comprises attached to the internal bus a registered boundary scan standard (JTAG) interface that accesses one or more scan chains inside the microprocessor, and is arranged for controlling DMA-type exchanges via the internal bus with other elements connected to this bus
212 citations
TL;DR: This paper presents accelerated algorithms for restoring circuit state elements from the traces collected during a debug session, by exploiting bitwise parallelism and introduces new metrics that guide the automated selection of trace signals, which can enhance the real-time observability during in-system debug.
Abstract: To locate and correct design errors that escape pre-silicon verification, silicon debug has become a necessary step in the implementation flow of digital integrated circuits. Embedded logic analysis, which employs on-chip storage units to acquire data in real time from the internal signals of the circuit-under-debug, has emerged as a powerful technique for improving observability during in-system debug. However, as the amount of data that can be acquired is limited by the on-chip storage capacity, the decision on which signals to sample is essential when it is not known a priori where the bugs will occur. In this paper, we present accelerated algorithms for restoring circuit state elements from the traces collected during a debug session, by exploiting bitwise parallelism. We also introduce new metrics that guide the automated selection of trace signals, which can enhance the real-time observability during in-system debug.
199 citations
Patent•
30 Jan 1998TL;DR: An active debugging environment for debugging a virtual application that contains program language code from multiple compiled and/or interpreted programming languages is described in this paper, where a process debug manager and a machine debug manager act as an interface between the language engine specific programming language details and the debug user interface.
Abstract: An active debugging environment for debugging a virtual application that contains program language code from multiple compiled and/or interpreted programming languages. The active debugging environment is language neutral and host neutral, where the host is a standard content centric script host with language engines for each of the multiple compiled and/or interpreted programming languages represented in the virtual application. The active debugging environment user interface can be of any debug tool interface design. The language neutral and host neutral active debugging environment is facilitated by a process debug manager that catalogs and manages application specific components, and a machine debug manager that catalogs and manages the various applications that comprise a virtual application being run by the script host. The process debug manager and the machine debug manager act as an interface between the language engine specific programming language details and the debug user interface.
191 citations
TL;DR: The system presented here consists of an on-chip debug infrastructure and supporting debugger software, which interacts with the infrastructure to make the chip's features accessible through a serial interface.
Abstract: For large, complex ICs, engineers need efficient techniques for debugging first silicon. The system presented here consists of an on-chip debug infrastructure and supporting debugger software,which interacts with the infrastructure to make the chip's features accessible through a serial interface.
189 citations
Related Topics (5)
Performance Metrics
| Year | Papers |
|---|---|
| 2025 | 3 |
| 2024 | 7 |
| 2023 | 11 |
| 2022 | 23 |
| 2020 | 1 |
| 2018 | 1 |