TL;DR: A technique is described for expressing multilength floating-point arithmetic in terms of singlelength floating point arithmetic, i.e. the arithmetic for an availablefloating-point number system.
Abstract: A technique is described for expressing multilength floating-point arithmetic in terms of singlelength floating point arithmetic, i.e. the arithmetic for an available (say: single or double precision) floating-point number system. The basic algorithms are exact addition and multiplication of two singlelength floating-point numbers, delivering the result as a doublelength floating-point number. A straight-forward application of the technique yields a set of algorithms for doublelength arithmetic which are given as ALGOL 60 procedures.
TL;DR: Some of the major theorems for finite fields for modular arithmetic are outlined, hoping to provide a basis from which an easier grasp of these new algorithms can be made.
Abstract: The paradigm of algorithm analysis has achieved major pre-eminence in the field of symbolic and algebraic manipulation in the last few years. A major factor in its success has been the use of modular arithmetic. Application of this technique has proved effective in reducing computing times for algorithms covering a wide variety of symbolic mathematical problems. This paper is intended to review the basic theory underlying modular arithmetic. In addition, attention will be paid to certain practical problems which arise in the construction of a modular arithmetic system. A second area of importance in symbol manipulation is the theory of finite fields. A recent algorithm for polynomial factorization over a finite field has led to faster algorithms for factorization over the field of rationals. Moreover, the work in modular arithmetic often consists of manipulating elements in a finite field. Hence, this paper will outline some of the major theorems for finite fields, hoping to provide a basis from which an easier grasp of these new algorithms can be made.
TL;DR: In this article, a plurality of arithmetic and logic functions are performed using either one or both of two inputs X and Y, each input providing a variable number of bits in parallel.
Abstract: An arithmetic unit in which a plurality of arithmetic and logic functions are performed using either one or both of two inputs X and Y, each input providing a variable number of bits in parallel. The output may be any one of a number of functions, such as the arithmetic functions of X + Y and X - Y, and the logical functions X.Y, X + Y, X + Y, X, and Y, etc. All of the functions are generated by the unit and any of the functions may be selected and operate as a data source. The arithmetic unit can operate either in a straight binary or a binary-coded decimal mode. The number of bits in the output for the arithmetic functions is variable and the carry or borrow is generated for each order and is therefore available from the highest order according to the selected length.
TL;DR: An investigation of the design philosophy of large floating-point -arithmetic units has been undertaken, and it is shown that negative numbers should be represented in twos-complement form.
Abstract: An investigation of the design philosophy of large floating-point -arithmetic units has been undertaken, with a view to establishing the principles for constructing such a unit for a large high-speed computing system. The main consideration applied was maximum speed for a reasonable cost in a machine handling numbers 30–64 bits in length. Consideration of compatibility with other systems was specifically excluded, although the unit to be implemented does take this factor into account. Within these constraints, it is shown that negative numbers should be represented in twos-complement form. Numbers of upto 64 bits in length would be handled, with the binary point at the less significant end of the mantissa. Rounding should be performed by forcing a ‘carry in’ to the least significant bit when the answer is more than single length, sufficient information being retained to enable multilength arithmetic to be implemented. Answers should not be normalised. The data presented are sufficient to indicate the effect of applying different criteria.
TL;DR: In this article, the authors proposed an array of floating-point numbers to be multiplied together to give a result having variable significance and exponent range, with variable significance values and exponent values.
Abstract: Recently developed cellular-logic arithmetic units have been of the integral type producing, in general, results containing more significant ‘bits’ than required. The proposed array enables two ‘floating-point’ numbers to be multiplied together to give a result having a ‘floating-point’ format with variable significance and exponent range.
TL;DR: In this article, a cellular array is proposed which can be controlled to perform the following arithmetic functions; A+BD+C, A?BD?C, or A/B. This results in a saving of hardware over previous arrays, and by having more terms in each function, a reduction in the overall calculation time can be achieved.
Abstract: A cellular array is proposed which can be controlled to perform the following arithmetic functions; A+BD+C, A?BD?C, or A/B. This results in a saving of hardware over previous arrays, and by having more terms in each function, a reduction in the overall calculation time can be achieved.
TL;DR: An arithmetic system for use in an electronic calculator including an additional register for storing a constant number which is used in an arithmetic calculation such as division, subtraction, addition and multiplication with respect to a series of arbitrary numbers is described in this paper.
Abstract: An arithmetic system for use in an electronic calculator including an additional register for storing a constant number which is used in an arithmetic calculation such as division, subtraction, addition and multiplication with respect to a series of arbitrary numbers. The content stored in the additional register is utilized only when the constant calculation is to be performed.
TL;DR: A general approach to the problem of scaling machine arithmetic is developed, which leads to the determination of inequalities that can serve as a basis for the derivation of systematic scaling techniques.
Abstract: A general approach to the problem of scaling machine arithmetic is developed. This leads to the determination of inequalities that can serve as a basis for the derivation of systematic scaling techniques. The inequalities and techniques are shown to apply to complement arithmetic with either integral or fractional machine operations and to absolute value and sign arithmetic for both types of operations. A detailed discussion is presented for the case of complement integer arithmetic. The connections with floating point arithmetic are derived.
TL;DR: An examination was made of the experimental results presented by J.J. Kohfeld and G.T. Thompson on a modification of Nordsieck's method for the numerical solution of ordinary differential equations using a multiple precision arithmetic package available on the IBM 7094 at The Ohio State University Computer Center.
Abstract: An examination was made of the experimental results presented by J.J. Kohfeld and G.T. Thompson [1] in their paper on a modification of Nordsieck's method for the numerical solution of ordinary differential equations, using a multiple precision arithmetic package [2] available on the IBM 7094 at The Ohio State University Computer Center. A comparison was made between the errors of the Nordsieck and the Gragg-Stetter-Nordsieck methods in which, after the starting procedure, the interval length “h” was held constant. Results relative to the five functions used by Kohfeld and Thompson are presented in Tables I and II (@ b means 10b).