TL;DR: Ownership types form a static type system that indicates object ownership, which provides a flexible mechanism to limit the visibility of object references and restrict access paths to objects, thus controlling a system's dynamic topology.
Abstract: Object-oriented programming languages allow inter-object aliasing. Although necessary to construct linked data structures and networks of interacting objects, aliasing is problematic in that an aggregate object's state can change via an alias to one of its components, without the aggregate being aware of any aliasing.Ownership types form a static type system that indicates object ownership. This provides a flexible mechanism to limit the visibility of object references and restrict access paths to objects, thus controlling a system's dynamic topology. The type system is shown to be sound, and the specific aliasing properties that a system's object graph satisfies are formulated and proven invariant for well-typed programs.
TL;DR: Flexible alias protection as mentioned in this paper is a conceptual model of inter-object relationships which limits the visibility of changes via aliases, allowing objects to be aliased but mitigating the undesirable effects of aliasing.
Abstract: Aliasing is endemic in object oriented programming. Because an object can be modified via any alias, object oriented programs are hard to understand, maintain, and analyse. Flexible alias protection is a conceptual model of inter-object relationships which limits the visibility of changes via aliases, allowing objects to be aliased but mitigating the undesirable effects of aliasing. Flexible alias protection can be checked statically using programmer supplied aliasing modes and imposes no run-time overhead. Using flexible alias protection, programs can incorporate mutable objects, immutable values, and updatable collections of shared objects, in a natural object oriented programming style, while avoiding the problems caused by aliasing.
TL;DR: YAGS as discussed by the authors introduces tags into the PHT that allow it to be reduced without sacrificing key branch outcome information, which gives better prediction accuracy for the SPEC95 benchmark suite than several leading prediction schemes, for the same cost.
Abstract: The importance of an accurate branch prediction mechanism has been well documented. Since the introduction of gshare and the observation that aliasing in the PHT is a major factor in reducing prediction accuracy, several schemes have been proposed to reduce aliasing in the PHT. All these schemes are aimed at maximizing the prediction accuracy with the fewest resources. In this paper we introduce Yet Another Global Scheme (YAGS)-a new scheme to reduce the aliasing in the PHT-that combines the strong points of several previous schemes. YAGS introduces tags into the PHT that allows it to be reduced without sacrificing key branch outcome information. The size reduction more than offsets the cost of the tags. Our experimental results show that YAGS gives better prediction accuracy for the SPEC95 benchmark suite than several leading prediction schemes, for the same cost. It also performs better than the other schemes in the presence of a context switch. Finally, YAGS displays good results for the go benchmark, which is of special interest since it has a large number of static branches and reflects situations where aliasing in the PHT can be a problem.
TL;DR: Techniques for phrasing questions about the flow of values in arrays, to check the legality of array privatization, and about the conditions under which a dependence exists in terms of systems of contstraints are described.
Abstract: Traditional array dependence analysis, which detects potential memory aliasing of array references is a key analysis technique for automatic parallelization. Recent studies of benchmark codes indicate that limitations of analysis cause many compilers to overlook large amounts of potential parallelism, and that exploiting this parallelism requires algorithms to answer new question about array references, not just get better answers to the old questions of aliasing. We need to ask about the flow of values in arrays, to check the legality of array privatization, and about the conditions under which a dependence exists, to obtain information about conditional parallelism. In some cases, we must answer these questions about code containing nonlinear terms in loop bounds or subscripts. This article describes techniques for phrasing these questions in terms of systems of contstraints. Conditional dependence analysis can be performed with a constraint operation we call the "gist" operation. When subscripts and loop bounds are affine, questions about the flow of values in array variables can be phrased in terms of Presburger Arithmetic. When the constraints describing a dependence are not affine, we introduce uninterpreted function symbols to represent the nonaffine terms. Our constraint language also provides a rich language for communication with the dependence analyzer, by either the programmer or other phases of the compiler. This article also documents our investigations of the praticality of our approach. The worst-case complexity of Presburger Arithmetic indicates that it might be unsuitable for any practical application. However, we have found that analysis of benchmark programs does not cause the exponential growth in the number of constraints that could occur in the worst case. We have studied the constraints produced during our aanalysis, and identified characteristics that keep our algorithms free of exponential behavior in practice.
TL;DR: The problem of rep exposure to the precisely defined notion of abstract aliasing is traced and a statically-enforceable discipline for avoiding abstract Aliasing is outlined.
Abstract: A central methodological problem in programming with multiple levels of abstractions is the loosely defined problem of rep exposure. This paper traces the problem of rep exposure to the precisely defined notion of abstract aliasing. The paper also outlines a statically-enforceable discipline for avoiding abstract aliasing, but the outline is incomplete.
TL;DR: The presence of aliasing indicates, that there is a separate irregular array of M(y)-cells, and that their role is to rapidly convey information on retinal gain control to the brain rather than to act primarily as inputs to image motion computation.
TL;DR: Two artifacts that are associated with this type of image capture and reconstruction, a so-called color filter array (CFA), are focused on.
Abstract: Video cameras and most electronic still cameras emplo single image sensor covered with a mosaic of suitab chosen color filters, a so-called color filter array (CFA), t capture real-time color images. Each pixel only records o of the three colors (e.g. red, green, blue or cyan, mage yellow; some sensors employ an additional 4 th color) that are required to produce a full three-channel color imag The missing pixels in each channel are obtained interpolation from the neighboring existing pixels t reconstruct the full three-color image. Examples commercially used CFA patterns and interpolation schem can be found in the literature and in patents. 1-3 This paper focuses on two artifacts that are associated with this type image capture and reconstruction: 1,4,5
TL;DR: This investigation was carried out as part of the design work for a screen-space rasterization ASIC and the implementations of several algorithms of comparable visual quality are discussed, and a comparison is provided in terms of per-primitive and per-pixel computational costs.
Abstract: Texture mapping is a fundamental feature of computer graphics image generation. In current PC-based acceleration hardware, MIP ("multum in parvo") mapping with bilinear and trilinear filtering is a commonly used filtering technique for reducing spatial aliasing artifacts. The effectiveness of this technique in reducing image aliasing at the expense of blurring is dependent upon the MIP-map level selection and the associated calculation of screen-space to texture-space pixel scaling. This paper describes an investigation of practical methods for per-pixel and per-primitive level of detail calculation. This investigation was carried out as part of the design work for a screen-space rasterization ASIC. The implementations of several algorithms of comparable visual quality are discussed, and a comparison is provided in terms of per-primitive and per-pixel computational costs.
TL;DR: The World's Largest Easter Egg and What Came Out of It, and what the authors need Around Here Is More Aliasing.
Abstract: 1. The World's Largest Easter Egg and What Came Out of It 2. What We Need Around Here Is More Aliasing 3. Return of the Jaggy 4. How Many Different Curves Are There? 5. Dirty Pixels 6. Cubic Curve Update 7. Triage Tables 8. The Wonderful World of Video 9. Uppers and Downers 10. Uppers and Downers, Part II 11. The World of Digital Video 12. How I Spent My Summer Vacation-1976 13. NTSC: Nice Technology, Super Color 14. What's the Deal with the DCT? 15. Quantization Error and Dithering 16. Compositing-Theory 17. "Composting"-Practice 18. How to Attend a SIGGRAPH Conference 19. Three Wrongs Make a Right 20. Fun with Premultiplied Alpha
TL;DR: Aliasing techniques that permit flexibly linking to remotely located resources are disclosed in this paper, where a browser application can link to a remote resource located on a network (e.g., the Internet) when the location of the remote resource is initially unknown or likely to be changed based on events external to the browser application.
Abstract: Aliasing techniques that permit flexibly linking to remotely located resources are disclosed. The aliasing techniques are used by a browser application to link to a remote resource located on a network (e.g., the Internet) when the location of the remote resource is initially unknown or likely to be changed based on events external to the browser application. For example, the external events can include: relocation of the remote resource, use of a different device, user or carrier service to access the remote resource, or selection of different service levels. In one embodiment, a browser application executes on a wireless remote computing device and couples to a network gateway via a carrier network. The aliasing techniques are provided by sending alias information from the network gateway to the browser application, and then having the browser application form an alias table and store the alias table in the wireless remote computing device. The wireless remote computing device can be any of a wide range of devices that have wireless and computing capabilities, including a cellular phone, a personal digital assistant and a portable general purpose computer.
TL;DR: A hierarchical behavior-based decomposition of the control architecture is used to facilitate efficient modular learning and results indicate that the method performs successfully in a number of navigational tasks exhibiting varying degrees of perceptual aliasing.
Abstract: We describe a general framework for learning perception-based navigational behaviors in autonomous mobile robots. A hierarchical behavior-based decomposition of the control architecture is used to facilitate efficient modular learning. Lower level reactive behaviors such as collision detection and obstacle avoidance are learned using a stochastic hill-climbing method while higher level goal-directed navigation is achieved using a self-organizing sparse distributed memory. The memory is initially trained by teleoperating the robot on a small number of paths within a given domain of interest. During training, the vectors in the sensory space as well as the motor space are continually adapted using a form of competitive learning to yield basis vectors that efficiently span the sensorimotor space. After training, the robot navigates from arbitrary locations to a desired goal location using motor output vectors computed by a saliency-based weighted averaging scheme. The pervasive problem of perceptual aliasing in finite-order Markovian environments is handled by allowing both current as well as the set of immediately preceding perceptual inputs to predict the motor output vector for the current time instant. We describe experimental and simulation results obtained using a mobile robot equipped with bump sensors, photosensors and infrared receivers, navigating within an enclosed obstacle-ridden arena. The results indicate that the method performs successfully in a number of navigational tasks exhibiting varying degrees of perceptual aliasing.
TL;DR: Initial empirical experiments are presented with combined analysis, a scalabk analysis technique that uses a program decomposition to apply different aliasing algorithms to independent program segments.
Abstract: We present initial empirical experiments with combined analysis, a scalabk analysis technique that uses a program decomposition to apply different aliasing algorithms to independent program segments. The effectiveness of the solution strategy is validated through application to side-effect and reference analysis of C programs.
TL;DR: In this article, a graphics rendering system creates an image based on objects constructed of polygonal primitives and applies an anti-aliasing scheme to the areas of the image representing silhouette edges of the objects.
Abstract: A graphics rendering system creates an image based on objects constructed of polygonal primitives. Aliasing effects in the image are reduced by applying an anti-aliasing scheme to the areas of the image representing silhouette edges of the objects. The silhouette edges are anti-aliased by creating anti-aliasing primitives which vary in opacity. These anti-aliasing primitives are joined to the silhouetted edges, and create a region in the image where the objects appear to blend into the background.
TL;DR: This paper investigates bit serial pattern generators and compactors as they are required to test a random logic portion of the circuit by means of a scan path, and analyzes aliasing in arithmetic compactors that process the test responses bit by bit.
Abstract: Adders, subtracters, and multipliers, which are available in many data paths, can be utilized to generate patterns and compact test responses. While previous work studied configurations which process patterns and test responses that have the size of a data word, this paper investigates bit serial pattern generators and compactors as they are required, for example, to test a random logic portion of the circuit by means of a scan path. Different arithmetic pattern generators are proposed that can produce a variety of bit strings with long periods and similar fault coverage as pseudorandom bit strings. The paper also analyzes aliasing in arithmetic compactors that process the test responses bit by bit. An upper bound on the limiting value of the aliasing probability for large test lengths can be computed very efficiently. The results of this paper open up a new range of applications for arithmetic BIST.
TL;DR: An empirical study is presented showing that aliasing occurs more frequently than the probabilistic analysis has estimated, and refute the previous claims about Probabilistic checkpointing and establish that it is unsafe in practice.
Abstract: Probabilistic checkpointing has been introduced recently as a technique for implementing incremental checkpointing. Supposedly, this new technique is better than traditional ones because it is portable, more efficient, and has lower storage requirements. On the downside, the technique may produce erroneous checkpoints due to a problem called aliasing. However, a probabilistic analysis has shown that the likelihood of aliasing in practice is negligible. This paper presents an empirical study showing that aliasing occurs more frequently than the probabilistic analysis has estimated. The results refute the previous claims about probabilistic checkpointing and establish that it is unsafe in practice.
TL;DR: Experimental results for the ISCAS-85 benchmarks show that zero aliasing of single stuck-line faults can be achieved with a two output parity tree compactor, corroborate recent results on the fundamental limits of space compaction.
Abstract: We present a parity-based space compaction technique that eliminates aliasing for any given fault model. The test responses from a circuit under test with a large number of primary outputs are merged into a narrow signature stream using a multiple-output parity tree. The functions realized by the different outputs of the compactor are determined by a procedure that targets the desired fault model. Experimental results for the ISCAS-85 benchmarks show that zero aliasing of single stuck-line faults can be achieved with a two output parity tree compactor. Our findings corroborate recent results on the fundamental limits of space compaction.
TL;DR: In this paper, a method for evaluating filters is presented, the application of prefiltering to hidden-surface algorithms is discussed, and an implementation of a filtering tiler is shown accompanied by examples of its effectiveness.
Abstract: Certain defects, such as jagged edges and disappearing detail, have long been an annoyance in digitally generated shaded images. Although increasing the resolution or defocusing the display can attenuate them, an understanding of these defects leads to more effective methods. This paper explains the observed defects in terms of the aliasing phenomenon inherent in sampled signals and discusses prerdtering as a recognized cure. A method for evaluating filters is presented, the application of prefiltering to hidden-surface algorithms is discussed, and an implementation of a filtering tiler is shown accompanied by examples of its effectiveness.
TL;DR: In this paper, a set of Ritz vectors based on the concept of component mode synthesis is developed for the transformation of the interaction problem, and the method of artificial damping is applied in the solution to avoid the problem of aliasing.
TL;DR: This paper introduces priors that allow the posterior to be simplified, speeding up the search and eliminating Monte Carlo error in the evaluation of model probabilities.
Abstract: In screening experiments, run size considerations can necessitate the use of designs with complex aliasing patterns. Such designs provide an opportunity to examine interactions and other higher order terms as possible predictors, as llamada and Wu (1992) propose. The large number of model terms mean that many models may describe the data well. Bayesian stochastic search methods that incorporate preferences for certain model structures (Chipman, Hamada, and Wu, 1997) are one effective method for identifying a variety of models. This paper introduces priors that allow the posterior to be simplified, speeding up the search and eliminating Monte Carlo error in the evaluation of model probabilities. Default choices of prior parameters are proposed. Several new plots and summaries are illustrated using simulated data in a Plackett-Burman 12-run layout.
TL;DR: A technique which decomposes program statements into independent sets in terms of their effects on pointer aliasing, which is efficient and can be used on large programs and experimented with combining two or more aliasing/points-to analyses for a same program by using the program decomposition.
Abstract: Two names are aliased if they refer to the same location at a program point during execution. Pointer aliasing analysis for C programs is essential for compile-time analyses and optimizations. Many techniques have been proposed in the literature. Some are fast, but not so precise; some are quite precise, but not fast in some cases.
We have developed a technique which decomposes program statements into independent sets in terms of their effects on pointer aliasing. Each set implies a program segment which includes the statements in the set and some control statements. Each segment can be analyzed for pointer aliasing independently. Therefore the program decomposition allows the use of more than one analysis algorithm on a same program and the use of appropriate aliasing analyses based on characteristics of pointers being analyzed. We handle features in C such as function pointers, indirect calls through functions pointers, unions, and type casting with some restrictions.
We have also developed a points-to analysis algorithm and an aliasing analysis algorithm. Both are flow-insensitive and context-insensitive; thus they are efficient and can be used on large programs. For each assignment lhs = rhs in a program, the aliasing analysis effectively assumes there is also an assignment rhs = lhs while the points-to analysis does not make such assumptions. Therefore the points-to analysis is more precise than the aliasing analysis. We have implemented prototypes of the program decomposition, the points-to and the aliasing analysis algorithms; empirical results on a set of C programs are given. We have also experimented with combining two or more aliasing/points-to analyses for a same program by using the program decomposition; we present empirical results of our preliminary experiment.
TL;DR: An exact unified analytical expression for the transient (and the steady state) behavior of the Aliasing Error Probability (AEP) of signature analysis testing using single-input external- and internal-XOR LFSR is deduced.
Abstract: In this paper, an exact unified analytical expression for the transient (and the steady state) behavior of the Aliasing Error Probability (AEP) of signature analysis testing using single-input external- and internal-XOR LFSR is deduced. The expression, contrary to what is known in the literature, uses the leftmost bit of the LFSR.
TL;DR: A first-order language that allows to express and prove properties reagarding the sharing of variables between non-ground terms and their types and is shown to have interesting applications in validation and debugging of logic programs.
Abstract: In this paper we study a first-order language that allows to express and prove properties reagarding the sharing of variables between non-ground terms and their types The class of true formulas is proven to be decidable through a procedure of elimination of quantifiers and the language, with its proof procedure, is shown to have interesting applications in validation and debugging of logic programs An interesting parallel is pointed out between the language of aliasing properties and the first order theories of Boolean algebras
TL;DR: This work systematicall develops a method to calculate the probability of a Digital Still Camera to produce aliasing artifacts, and shows that the Potential for Aliasing is inversely proportional to the number of sampling sites, demonstrating that CCDs with Color Filter Arrays will be much more prone toAliasing artifacts than monochrom sensors.
Abstract: All Digital Still Cameras employ some form of CCD imaging arrays to record images. These sampled images prone to aliasing artifacts. This work systematicall develops a method to calculate the probability of a giv Digital Still Camera to produce aliasing artifacts. Th Potential for Aliasing is defined as the ratio of the tota power of the aliased spectrum to that of the total power the image spectrum between the Nyquist frequencies of system. The results show that the Potential for Aliasing inversely proportional to the number of sampling sites, th demonstrating that CCDs with Color Filter Arrays will be much more prone to aliasing artifacts than monochrom sensors. The results also clearly indicate that the Interl Transfer devices are much more prone to aliasing than th Frame Transfer counterparts. The Potential for Aliasin increases rapidly as the ratio of the pixel dimension to pix pitch decreases. The model developed allows one to st the trade-offs between sharpness (as measured by C Acutance) and the Potential for Aliasing as a function of a system parameters. It can be shown that one can gre reduce the Potential for Aliasing by using an appropria optical pre-filter without greatly reducing the sharpness the image. However, to completely remove aliasin artifacts, image sharpness will be significantly reduced. Introduction-Sampled Images Images from Digital Still Cameras (DSCs) are sampled b the active pixel areas of Charged Coupled Devices (CCD The pixels are normally rectangles or squares with the sa pitch in both the x-direction and y-direction; “squar pixels”. For the purposes of this paper, the pixel’s activ area will be a square of linear dimension d with a pitch a; see Figure 1. When an image is sampled with a sensor like th shown in Figure 1, a “potential for aliasing” takes place Aliasing is the conversion of high (spatial) frequenc 24 are y en e l of the is us e ine eir g el udy MT ll atly te of g
TL;DR: In this article, the effects of aliasing in PWM power converters are explored by first using switched-circuit simulation to generate circuit waveforms and then analyzing their spectral content using FFTs.
Abstract: Aliasing effects in pulse-width-modulated power converters are explored by first using switched-circuit simulation to generate circuit waveforms and then analyzing their spectral content using FFTs. The results for a basic PWM boost converter running open-loop under voltage-mode control show that perturbing the control signal or input voltage at frequencies close to the switching frequency or its harmonics can give rise to significant aliased components at the low difference frequency. The simulation results reinforce the concerns raised in regarding the limitations of small-signal frequency-response information in frequency ranges where aliasing is significant. The key steps in analyzing the observed simulation results is also presented.
TL;DR: This work proposes a novel test architecture which uses a judicious combination of mutual testing and signature testing to achieve low test area overhead, low aliasing probability and low test application time and provides graph-theoretic optimization algorithms to optimize the test area and test applicationTime of the resulting test architecture.
Abstract: Signature-based techniques are well known for the Built-in Self-test of integrated systems. We propose a novel test architecture which uses a judicious combination of mutual testing and signature testing to achieve low test area overhead, low aliasing probability and low test application time. The proposed architecture is powerful for testing highly concurrent systems in applications such as iterative logic arrays, real-time systems, systolic arrays, and low-latency pipelines which tend to have a large number of functional modules of a similar nature. The use of mutual testing helps in testing “self-loop” modules which cannot be tested using simple signature-based schemes. We provide graph-theoretic optimization algorithms to optimize the test area and test application time of the resulting test architecture.
TL;DR: The proposed architecture is powerful for testing highly concurrent systems in applications such as iterative logic arrays, real-time systems, systolic arrays, and low-latency pipelines which tend to have a large number of functional modules of a similar nature.
Abstract: Signature based techniques have been well known for the built-in self-test of integrated systems. We propose a novel test architecture which uses a judicious combination of mutual testing and signature testing to achieve low test area overhead, low aliasing probability and low test application time. The proposed architecture is powerful for testing highly concurrent systems in applications such as iterative logic arrays, real-time systems, systolic arrays, and low-latency pipelines which tend to have a large number of functional modules of a similar nature. We provide graph-theoretic optimization algorithms to optimize the test area and test application time of the resulting test architecture.
TL;DR: A general definition of the differential cepstrum, which is based on interpolation in the frequency-domain and does not suffer from signal singularities, i.e. zeros on the unit circle, although calculated by the FFT.
Abstract: The paper introduces a general definition of the differential cepstrum. It is based on interpolation in the frequency-domain and does not suffer from signal singularities, i.e. zeros on the unit circle, although calculated by the FFT. The approach is used in construction of a novel computational algorithm that produces an asymptotically exact differential cepstrum with no limitations. In an iterative procedure, it eliminates cepstral aliasing and separates causal and anticausal cepstral parts. Its computational complexity is at least four times lower than that of other known algorithms used to decrease cepstral aliasing, while it has no additional storage demands. The result is easily extended to the complex and real cepstrum.
TL;DR: In this article, the ambiguous memory aliasing is proposed to be speculatively resolved using data speculation combining memory disambiguation with address prediction, which improves the performance of coming-generation superscalar processors by up to 210%.
Abstract: The ambiguous memory aliasing is proposed to be speculatively resolved A load instruction is speculatively executed with load address prediction, and its dependent instructions are speculatively executed A store instruction is also speculatively resolved with store address prediction, and its dependent instructions are speculatively executed From the experimental evaluation, we have found that this data speculation combining memory disambiguation with address prediction improves the performance of coming-generation superscalar processors by up to 210%
TL;DR: Good correlations between measured and calculated flow rates in the experimental and computational studies suggest that this may be a clinically useful approach even in aliased images.
Abstract: Conservation of momentum transfer in regurgitant cardiac jets can be used to calculate the flow rate from color Doppler velocities. In this study, turbulent jets were simulated by finite elements; pseudocolor Doppler images were interpolated from the computations, with aliasing introduced artificially. Jets were also imaged by color Doppler in an in vitro flow system. To suppress aliasing errors, jet velocities were fitted iteratively to a fluid mechanical model constrained to match the orifice velocity (measured without aliasing by continuous-wave Doppler). At each iteration, the model was used to detect aliased velocities, which were excluded during the next iteration. Iteration continued until the flow rate calculated by the model and number of calculated nonaliased pixels were unchanged. The good correlations between measured and calculated flow rates in the experimental (R2 = 0.933) and computational studies (R2 = 0.990) suggest that this may be a clinically useful approach even in aliased images. Published by Elsevier Science Inc.
TL;DR: Flexiblealiasprotectionrestsontheobservation that problemscaused byaliasing are not the result of eitherormutablestateinisola-tion; rather, problems result from theinteractionb etweenthem, that is, whenaliasesmakestatechangesvisible.