TL;DR: In this article, an extensible cryogenic infrastructure for large-scale quantum computers based on superconducting circuits is proposed. But the authors focus on the passive and active heat loads of the qubit drive lines, flux lines, and output lines.
Abstract: A robust cryogenic infrastructure in form of a wired, thermally optimized dilution refrigerator is essential for present and future solid-state based quantum processors. Here, we engineer an extensible cryogenic setup, which minimizes passive and active heat loads, while guaranteeing rapid qubit control and readout. We review design criteria for qubit drive lines, flux lines, and output lines used in typical experiments with superconducting circuits and describe each type of line in detail. The passive heat load of stainless steel and NbTi coaxial cables and the active load due to signal dissipation are measured, validating our robust and extensible concept for thermal anchoring of attenuators, cables, and other microwave components. Our results are important for managing the heat budget of future large-scale quantum computers based on superconducting circuits.
TL;DR: This brief presents a CMOS voltage reference for ultra-low-power applications, such as in implementable medical devices and energy harvesting-based wireless sensor nodes, and Measurement results show that the prototype design provides a 210-mV reference with only 0.027% line sensitivity.
Abstract: This brief presents a CMOS voltage reference for ultra-low-power applications, such as in implementable medical devices and energy harvesting-based wireless sensor nodes. In these applications, excellent capabilities to reject interference from power sources and work in low voltage to extend survival periods are critical for the voltage references. A transistor size-ratio determined current generator with high process and voltage independence is implemented by two same-threshold-voltage NMOS transistors, hence obtaining the precise reference voltage with an active load. The proposed circuit is fabricated in a standard 0.18- ${\mu }\text{m}$ CMOS process. Measurement results show that the prototype design provides a 210-mV reference with only 0.027% line sensitivity with a supply voltage from 1.8 V down to 0.4 V. The power supply ripple rejection at 10 Hz, 1 KHz, and 1 MHz is −59, 47, and 53 dB, respectively. The temperature coefficient is 82 ppm/°C in the temperature range from −40°C to +140 °C. Furthermore, the power consumption is only 9.6 nW at room temperature and the active area is 0.021 mm2.
TL;DR: In this paper, an active load control of the wind turbine tower loads using the pitch control system is demonstrated. But the authors did not consider the effect of wind disturbances in the dynamics of the overall system.
TL;DR: This brief presents a fully CMOS voltage reference based on a self-biased topology, which provides low current consumption while saving silicon area and makes the proposed voltage reference very suitable for RF-powered applications.
Abstract: This brief presents a fully CMOS voltage reference based on a self-biased topology, which provides low current consumption while saving silicon area. Temperature compensation is achieved by means of a subthreshold triode-based Widlar current reference and a proper arrangement of an active load. The proposed voltage reference was fabricated in a standard 0.13- $\mu {\text{m}}$ CMOS technology and occupies a core area as low as 0.003 mm2. The circuit properly operates with a power supply ranging from 2.4 V to 1.1 V while providing a reference voltage of around 800 mV with an average temperature coefficient of 100 ppm/°C and an overall current consumption below 25 nA. This performance makes the proposed voltage reference very suitable for RF-powered applications.
TL;DR: It is concluded that the proposed synchronization method has a potential to enhance the microgrid stability efficiently and PLL disadvantages such as design complexity, bad accuracy, nonlinearity, tuning difficulties, slow response, and negative impact on the control performance can be avoided.
Abstract: Similar to distributed generation inverters, active load has to use a dedicated synchronization unit such as a phase-locked loop (PLL) to get the reference voltage of the microgrid. To avoid PLL drawbacks, a new method is proposed to track the microgrid reference voltage for active load synchronization. An autonomous microgrid is modeled and designed. Additionally, the impact of active loads on the dynamic stability of the autonomous microgrid is investigated. An optimal design is performed to obtain the optimal controller parameters. Based on the time-domain simulation, the control design problem is optimally solved by minimizing a weighted objective function to limit the error in the dc voltage and the measured active power. Different step change disturbances are applied to examine and verify the effectiveness of the new synchronization method and the proposed controllers. Finally, a comparison between the proposed synchronization scheme and the traditional PLL is provided to prove the superiority of the proposed technique. It is concluded that the proposed synchronization method has a potential to enhance the microgrid stability efficiently. With the proposed method, PLL disadvantages such as design complexity, bad accuracy, nonlinearity, tuning difficulties, slow response, and negative impact on the control performance can be avoided.
TL;DR: In this article, the authors focused on determination of the best, in terms of the generated electric energy, value of load resistance for mono-crystalline and polycrystaUine PV panels, which corresponds to the criterion of transmitting the maximum power to the load.
Abstract: Current article concentrates on determination of the best, in terms of the generated electric energy, value of load resistance for mono-crystalline and polycrystaUine PV panels, which corresponds to the criterion of transmitting the maximum power to the load. The existing types of silicon PV panels are analyzed, their classification ta Jven. The best active load parameter for mono-crystalline and polycrystaUine PV panels, which corresponds to the criterion of transmitting the maximum power to the load, has been determined. The results of experimental studies are presented in the form of volt-ampere characteristics and dependence of the PV panels' power on the load current. Results give the possibility to outline a new approach application of green energy, using innovative technologies- sustainable road-pavemenT for green energy production. The solution of sustainable road-pavement enables to produce green energy for additional lightening of the streets using considerable LED technologies with acceptable monitoring. Authors performed current research also to mitiate debates in scientific world and society about significance of such kind of solutions for sustainable development.
TL;DR: A novel PEL based on a hybrid five-level voltage source inverter is introduced to emulate a variety of static load behaviors, such as R, L, C loads, high-frequency harmonic loads, and unbalanced loads.
Abstract: A programmable electronic load (PEL) solution is usually needed for comprehensive testing of power supplies. In this paper, a novel PEL based on a hybrid five-level voltage source inverter (VSI) is introduced to emulate a variety of static load behaviors, such as R , L , C loads, high-frequency harmonic loads, and unbalanced loads. Dynamic load behavior, for example, modulation loads, can also be achieved in this paper. A dedicated control structure is proposed for the emulation of different load behaviors and the detailed compensator design is presented to evaluate the system dynamic performance. The proposed PEL system has isolated active dc links to support multilevel converter topology, and it can either dump the energy to a passive load or recycle the energy back to the utility grid through another VSI. Simulation and experimental results are provided to validate the effectiveness of proposed control methods in terms of successfully achieving a variety of load profile functions.
TL;DR: The result shows that the transconductance and gain of proposed single stage CS amplifier are increased without affecting impedance seen by output node and GACOBA technique is useful for gain enhancement in CS and CG amplifier.
Abstract: A new design technique is proposed and discussed for the design of active load using the bulk-driven method. The proposed method uses gate-driven input drivers with bulk-driven MOS load. Further, i...
TL;DR: In this paper, a cross-forward gain stage was placed between the input and output stages of the OTA to enhance the output stage transconductance, which improved the phase margin of OTA and kept the amplifier stable.
Abstract: This paper presents a high DC gain bulk-driven operational transconductance amplifier (OTA) for low voltage applications. A cross-coupled active load is employed at the bulk-driven input stage to enhance the gain of OTA. A cross-forward (CF) gain stage was placed between the input and output stages of the OTA to enhance the output stage transconductance. The CF stage improves the phase margin of OTA and keeps the amplifier stable even for large capacitive loads (up to 50 pF) and also improves overall DC gain. The proposed OTA simulated using UMC 65-nm standard CMOS process, operates at a supply voltage of 0.5 V. Simulation results show that the OTA provides a gain of 72 dB at very low-frequencies. It has a phase margin of 74° and a unity gain frequency of 680 kHz for a load capacitance of 20 pF. Because of the bulk-driven input stage, the OTA achieved rail-to-rail input common-mode range. When the OTA simulated with a supply voltage of 0.35 V and load capacitance of 20 pF, the OTA provides a DC gain of 55 dB and a phase margin of 68° at a unity gain frequency of 617 kHz. The power dissipations were 3.03 μ W and 1.56 μ W for supply voltages of 0.5 V and 0.35 V, respectively. In comparison to previous works, the figure of merit of the proposed OTA has more than doubled in all respects.
TL;DR: A common source amplifier with active load has been designed using Gm/Id technique to model the transistor size and meet the given design parameters such as GBW, gain and power consumption.
Abstract: Device miniaturization is of great concern over past two decades which leads to further transistor size shrinking and improvement in their performance. As the transistor size is reduced there is a need to include short channel effects. These effects are not taken into consideration by conventional equation based amplifier design methodology. An alternative approach is to use graphical based Gm/Id technique. This methodology investigates the relationship between transconductance by drain current (Gm/Id) versus normalized drain current [Id/(W/L)] which is strongly related to the circuit performance. This result indicates the region of operation and also provides tool to calculate device dimensions by unified synthesis methodology in all regions of operation of a MOS transistor. In this paper, a common source amplifier with active load has been designed using Gm/Id technique to model the transistor size and meet the given design parameters such as GBW, gain and power consumption. Supply voltage of 1.8V is used here and a comparative analysis of these performance parameters is done for various technologies (180nm, 90nm, 45nm) using cadence virtuoso tool.
TL;DR: In this paper, a new antenna topology was proposed to implement the load modulation in the Doherty transmitter, which resulted in enhancing the bandwidth compared to previous works, and the active load modulation was realized by using a monopole array antenna, which serves as both Doherty combiner and wave radiator.
Abstract: This letter presents a new antenna topology to implement the load modulation in the Doherty transmitter, which resulted in enhancing the bandwidth compared to previous works. The active load modulation is realized by using a monopole array antenna, which serves as both Doherty combiner and wave radiator. The load impedances of amplifiers can be dynamically tuned through the mutual coupling of the array elements. Detailed design equations and procedures are developed. For verification, a Doherty transmitter operating at 1.95–2.10 GHz has been designed and fabricated using GaN HEMT transistors. The prototype transmitter exhibited a power-added efficiency of 53% at peak power level and maintained an efficiency of 43% at 6.8-dB backoff, over the frequency band of 1.95–2.10 GHz.
TL;DR: Optimization studies performed on a representative large transport aircraft wing show that using MLC results in a significant weight reduction, and that concurrently optimized GLA controllers effectively reduce gust loads until they are not sizing anymore.
Abstract: Improving the performance of large transport aircraft requires high aspect ratio and lightweight wings, making aeroelasticity an important factor in wing structural design. Active control of aeroelastic loads can be used to improve the aeroelastic behavior of the wing. Two active load control techniques are considered: Maneuver Load Control (MLC) and Gust Load Alleviation (GLA). GLA controllers are normally tuned using optimal control methods, which use objectives that do not directly relate to load control. In this thesis, it is investigate whether it is also possible to optimize MLC and GLA control parameters concurrently with the wing structure, without the need for optimal control methods. Optimization studies performed on a representative large transport aircraft wing show that using MLC results in a significant weight reduction, and that concurrently optimized GLA controllers effectively reduce gust loads until they are not sizing anymore.
TL;DR: In this paper, the authors demonstrate the use of a low-cost active load that helps to implement the load modulation technique for impedance measurements for polymer electrolyte membrane (PEM) fuel cells.
Abstract: Polymer Electrolyte Membrane (PEM) fuel cells have been the focus of numerous research efforts for its attractive characteristics. The fuel cell as a multi-physics system requires real-time condition monitoring and diagnostics to ensure safe operation. The Electrochemical Impedance Spectroscopy (EIS) measurement has been widely used as a characterization tool for the fuel cell system. Also, it has been deployed for diagnostics to extract impedance information, providing insight into the various electrochemical processes taking place within the fuel cell system. However, current EIS measurements are typically carried out with expensive frequency response analyser (FRA) which is also prove not portable for online use. This paper demonstrates the use of a low-cost active load that helps to implement the load modulation technique for impedance measurements. The design of the active load is presented and results for the active-load and commercial FRA are also compared for equivalent circuits models.
TL;DR: The active load effect on microgrid dynamic stability is explored and the potential of the proposed controller to enhance the microgrid stability and to provide efficient damping characteristics is demonstrated.
Abstract: Controller gains and power-sharing parameters are the main parameters affect the dynamic performance of the microgrid. Considering an active load to the autonomous microgrid, the stability problem will be more involved. In this paper, the active load effect on microgrid dynamic stability is explored. An autonomous microgrid including three inverter-based distributed generations (DGs) with an active load is modeled and the associated controllers are designed. Controller gains of the inverters and active load as well as Phase Locked Loop (PLL) parameters are optimally tuned to guarantee overall system stability. A weighted objective function is proposed to minimize the error in both measured active power and DC voltage based on time-domain simulations. Different AC and DC disturbances are applied to verify and assess the effectiveness of the proposed control strategy. The results demonstrate the potential of the proposed controller to enhance the microgrid stability and to provide efficient damping characteristics. Additionally, the proposed controller is compared with the literature to demonstrate its superiority. Finally, the microgrid considered has been established and implemented on real time digital simulator (RTDS). The experimental results validate the simulation results and approve the effectiveness of the proposed controllers to enrich the stability of the considered microgrid.
TL;DR: It has been established that passive compensators with a permanent structure are less satisfied with the requirements for maintaining the quality of electricity, so controlled filter compensating devices are developed and implemented - power active filters.
Abstract: Purpose. Investigate the features of using a series power transformer for the implementation of longitudinal compensation. Methodology. Methods of solving systems of differential equations of the first order, methods of matrix transformations, methods of numerical simulation, methods of calculating the active part of Frieze power, methods of the theory of transformation of coordinate systems. Findings. The functional scheme of the successive power active filter is realized in the implementation of longitudinal compensation, the connection of the parameters of the transformer with the parameters of the mode is investigated, the processes that take place in the transformer are considered, a method for determining the signal of the control of the successive filter is developed, in the visual programming environment a model of the simplified system of electricity consumption has been developed, researches, on the basis of which analysis, the efficiency of application of the proposed solution according to the level of voltage on the invoice is shown ancestry A series of experiments with a change in the active load power was carried out to assess the impact of the transformer on the load voltage. The conclusions of the influence of the parameters of the active filter transformers on the load voltage are formulated. Originality. Non-compliance with the quality of energy indicators leads to economic losses, reduced reliability of operation of electric networks and violation of technological processes, increase of additional losses in networks and elements of electrical equipment, shortening of service life of electrical power equipment of power systems. Longitudinal compensation is one of the solutions for ensuring the quality of electricity. Compensation provides for increasing the dynamic stability of the transmission line and the stability of the main network voltage. On the basis of the analysis of known works, it has been established that passive compensators with a permanent structure are less satisfied with the requirements for maintaining the quality of electricity. As a result, controlled filter compensating devices are developed and implemented - power active filters. The principle of the compensator - constantly creates harmonic voltages that exactly match the harmonic components generated by the load. The distortion is already compensated, already present in the power supply system. As a result, the voltage remains sinusoidal. The compensatory properties of the active filter depend on the algorithm for determining the control signal. With the use of the Frize power theory, a cer tain sequence of the synthesis of a control signal by a series active active filter is proposed. Practical value. A certain sequence of synthesizing the control signal of the compensator has been created, the effect of the power active filter transformers has been investigated for the realization of longitudinal compensation.
TL;DR: In this article, the feasibility of harmonic tuning techniques applied to stacked amplifiers is analyzed, and it is shown that harmonic tuning at the output affects harmonic optimization of stacked transistors and how this depends on the base termination impedance.
Abstract: Stacked power amplifiers (PAs) have gained a lot of attention recently because of increased output power through equal distribution of output voltage swing among the stacked transistors. However, commonly employed PA design techniques, such as waveform engineering or harmonic tuning, often suffer in stacked configuration, and the enhancement in power-added efficiency (PAE) remains poor. This letter analyzes the feasibility of harmonic tuning techniques applied to stacked amplifiers. An analysis is presented to show how harmonic tuning at the output affects harmonic optimization of stacked transistors and how this depends on the base termination impedance. Three different device configurations (cascode, tri-stacked, and quad-stacked) have been characterized at $X$ -band. Measured results show harmonic PAE enhancement degrades as the number of stacked transistors increases, which is in agreement with the analysis presented.
TL;DR: A coordinative dispatch optimization model is built based on real time pricing, and a parallel optimization algorithm is presented to solve the problem of active load and storage facilities.
Abstract: Active distribution network (ADN) with more autonomy in dispatching is able to control distributed generations, storage facilities and active load to realize the efficient operation. The dispatching schedule of main network and distribution network influence each other. Besides the operating cost, the coordination of main network and distribution network should be considered when we make the optimal schedule of ADN. This paper provides a real time information exchange method, and proposes the model of active load and storage facilities. A coordinative dispatch optimization model is built based on real time pricing. In addition, a parallel optimization algorithm is presented to solve the problem. Simulation results on the IEEE 9 node system connected with a distribution network verify the validity of the model and the algorithm. Finally, the impact of demand response, storage facilities and power limit in interconnecting lines on dispatching schedule is analyzed.
TL;DR: In this paper, the effect of variable scan impedance on the power amplifiers performance in a 7x7 phased array transmitter was investigated and it was found that the output power of the amplifier degrade by up to 2.5dB due to active load pulling phenomena at large scan angles in phased array transmitters.
Abstract: The effect of variable scan impedance on the power amplifiers performance in a 7x7 phased array transmitter is investigated. It has been found that the output power of the amplifier degrade by up to 2.5dB due to active load pulling phenomena at large scan angles in phased array transmitters.
Abstract: This paper presents the topology of a three-phase AC/AC converter without DC energy storage for the control of power flow and compensation of deep voltage sags and swells The proposed solution is intended to protect sensitive loads against voltage fluctuation and problems with power flow control in an AC power system The topology of the proposed solution is based on two bipolar direct AC/AC converters, without DC energy storage operating in any of the phases The paper presents an operational description, simulation and the experimental test results from a 1 kVA laboratory model operating under active load The main advantage of the proposed solution is the combination of the properties of a series AC voltage compensator and phase shifters without DC energy storage The analyzed converter is able to compensate deep voltage sags and swells (up to 50% in the case of three phase symmetrical voltage perturbation) and single phase voltage interrupts However, its main task is control power flow in a three-phase power system
TL;DR: In this paper, a low-dropout regulator was proposed for a dynamic pole tracking circuit having an active load, a voltage-to-current converter, a current amplifier, a bias circuit, a regulating transistor, a first feedback resistor, a second feedback resistor and a first capacitor.
Abstract: A low-dropout regulator, including: a dynamic pole tracking circuit having an active load, a voltage-to-current converter, a current amplifier, a bias circuit, a regulating transistor, a first feedback resistor, a second feedback resistor, and a first capacitor. The dynamic pole tracking circuit includes: a first PMOS, a second PMOS, a first resistor, and a second resistor. The voltage-to-current converter includes: a first NMOS, a second NMOS, a third NMOS, a fourth NMOS, a fifth NMOS, a sixth NMOS, a seventh NMOS, an eighth NMOS, a third PMOS, a fourth PMOS, a seventh PMOS, an eighth PMOS. The current amplifier includes: a fifth PMOS, a sixth PMOS, a ninth NMOS, a tenth NMOS, and a third resistor. The bias circuit includes: a ninth PMOS, a tenth PMOS, an eleventh PMOS, an eleventh NMOS, a twelfth NMOS, a thirteenth NMOS, and a fourth resistor.
TL;DR: Results show that battery system capacity is reducing with active power load peak shaving increase but not in a linear way like it is expected because of the properties of the microgrid model.
Abstract: In this paper, building microgrid is modelled in the hardware in loop software Typhoon HIL. Microgrid consists of 30 kW wind turbine, 70 kWp photovoltaic system, building load and battery system. Energy management system is integrated into software model and simulations of the influence of the active load peak shaving technique on battery system capacity are conducted. In each case daily active power load peak is reduced by 1 % and battery system capacity is calculated. Every simulation is executed for the period of one week. Results show that battery system capacity is reducing with active power load peak shaving increase but not in a linear way like it is expected because of the properties of the microgrid model.
TL;DR: In this article, an event-driven automatic demand response method considering uncertainty for a microgrid comprises the steps of discretizing continuous time; analyzing load demand response characteristic of a user-type microgrid, and constructing a new real-time power price mechanism combining realtime electric price RTP and time-out-use power price IBR, and calculating to obtain power price of a current time frame k by the power pricing mechanism, and performing on-line energy optimization on a terminal user in a RMG according to a preset priority handling event.
Abstract: An event-driven automatic demand response method considering uncertainty for a microgrid comprises the steps of discretizing continuous time; analyzing load demand response characteristic of a user-type microgrid, and building a system model; constructing a new real-time power price mechanism combining real-time electric price RTP and time-out-use power price IBR, and calculating to obtain power price of a current time frame k by the power price mechanism; judging whether each event is triggered or not by the system according to an automatic demand response (ADR) strategy of the even-driven mechanism, and performing on-line energy optimization on a terminal user in a RMG according to a preset priority handling event; transferring optimization time to a next moment after optimization is completed, and repeating the previous optimization steps until full-time optimization is completed. Power utilization behavior of an active load is effectively guided by economic excitation, an emergencysituation can be efficiently and timely handled, and the impact to the system caused by fluctuation new energy output also can be reduced by reasonably guiding the power utilization behavior of the active load.
TL;DR: In this article, the authors presented a 450 W sequential power amplifier with Doherty-type active load modulation (SPA-D) with 10 dB back-off (BO) for mobile base stations (MBS).
Abstract: This paper presents a 450 W sequential power amplifier with Doherty-type active load modulation (SPA-D) with 10 dB back-off (BO) for mobile base stations (MBS). Low optimum impedances $(\approx 1\Omega)$ of the carrier and peaking amplifiers are needed to obtain the desired output power from the high-power LDMOS devices. The design of the load transformation networks (LTN) is challenging due to the associated uncertainties in the models and the tolerances of the lumped component values. The proposed design methodology for low impedance LTNs overcomes this difficulty. Measured saturated output power of 450 W and peak PAE of 66 % is achieved at 780 MHz. At 10 dB BO the measured PAE is 60 %. The gain response is designed to be monotonic to relieve the effort of DPD. Simulations show good agreement with the measurements. To the best of our knowledge, this SPA-D shows the highest output power with the highest efficiency at 10 dB BO for an SPA-D and proofs this concept is viable also for high power applications.
TL;DR: In this paper, a gain-adjustable active load wireless charging device and an adjustment method for adjusting the compensation mode of the receiving assembly can be switched between LCL compensation and series compensation, so that damage to the active load during the power supply process of the active loads is reduced.
Abstract: The invention relates to a wireless electric energy transmission technology, in particular to a gain-adjustable active load wireless charging device and an adjustment method thereof. The wireless charging device comprises an emission assembly and a receiving assembly, wherein the emission assembly is connected with the receiving assembly, the emission assembly comprises a DC power supply, a full-bridge inversion module, a parameter-adjustable LCL compensation device and an emission coil, the full-bridge inversion module, the parameter-adjustable LCL compensation device and the emission coil are sequentially connected with the DC power supply, the receiving assembly comprises a receiving coil, a switching type compensation device, a rectification voltage stabilization module and an active load, the switching type compensation device, the rectification voltage stabilization module and the active load are sequentially connected with the receiving coil, and the emission coil is used for transferring energy to the receiving coil. By the device, adjustable gain can be achieved, the compensation mode of the receiving assembly can be switched between LCL compensation and series (S) compensation, so that damage to the active load during the power supply process of the active load is reduced.
TL;DR: It is verified that using an active load, it is possible to maintain a high efficiency not only at peak power but also under various backoff power levels over a bandwidth of 1 GHz.
Abstract: The use of an active load has been recently proposed for the realization of power-efficient broadband balanced amplifiers. The application of an active load to a dual-input Chireix amplifier is investigated in this paper for the purpose of increasing their bandwidth. An embedding device model is used to established the optimal non-Foster loads required for both the transistors to remain operating in class F as the operating frequency deviates from the center frequency. Given the transistors must operate with a constant voltage swing between backoff and peak, it is found necessary for the two transistors to operate with different load impedances as the frequency varies. The required load impedance and outphasing angles for the Chireix operation are obtained using a generalized eigenvalue problem using the Y-matrix of the Chireix combiner loaded with the active load. It is verified that using an active load, it is possible to maintain a high efficiency not only at peak power but also under various backoff power levels over a bandwidth of 1 GHz. Within a 200 MHz bandwidth, the PA is predicted to be able to maintain an efficiency larger than 79% for 6 dB backoff. Further work is required to experimentally validate the proposed technique.
TL;DR: In this paper, an active load modulation scheme for near field communication (NFC) systems is described. But the synchronization is performed by locking an internal clock to the carrier clock when the transmission of data is disabled, by locking the internal clock on a local clock when data transmission is enabled, and by compensating the phase or frequency of the active-load modulation clock to track the carrier.
Abstract: Circuits and methods for active load modulation is described. These circuits and methods may be employed in connection with near field communication (NFC) systems, for example in the proximity inductive coupling card (PICC). The methods described herein may be used to synchronize the operations of the system to the carrier clock provided by a reader with typical operation frequency of 13.56 MHz±7 KHz. The synchronization may be performed by locking an internal clock to the carrier clock when the transmission of data is disabled, by locking the internal clock to a local clock when data transmission is enabled, and by compensating the phase or frequency of the active load modulation clock to track the carrier clock.
TL;DR: In this article, an error iterative PI controller is proposed for three-phase unbalanced equipment based on an internal model principle and error iteration PI, which samples network side current to carry out closed-loop control, controls a control object directly, and realizes a very good compensation effect.
Abstract: The invention relates to a closed-loop control method for three-phase unbalanced equipment based on an internal model principle and error iteration PI, which samples network side current to carry outclosed-loop control, controls a control object directly, and realizes a very good compensation effect. At the same time, the current inner loop is kept, and the harmonic current control outer loop andthe bus voltage control outer loop are separated to ensure that the bus voltage is constant and enhance the use range of the equipment. The outer loop of harmonic current control adopts the controller of the internal model principle, and introduces the direct current component removing link. The introduction of an internal model controller greatly improves the tracking effect of harmonics. A busvoltage loop introduces an error iterative PI controller, Tthe error of bus voltage steady-state control is reduced, and the response speed of the bus voltage loop under sudden change of a fundamentalwave active load is improved, which ensures the safety of bus voltage and the stability of the compensation effect, and achieves stable operation and good compensation effect even when the fundamental wave load changes drastically.
TL;DR: In this article, an active control method of airplane course constrained point errors is proposed to actively control the course-constrained point errors into corresponding load control precision, which can be automatically performed, and when the test is continuously operated, the control process can still have an active effect; and moreover, the load control performance is adjustable, the application is flexible and convenient, and the operation is simple.
Abstract: The present invention relates to an active control method of airplane course constrained point errors. The method comprises the following steps that: the step 1: a position control actuating cylinder,a displacement sensor and a force measuring sensor are installed at a test machine support portion course constrained point, wherein the position control actuating cylinder and the displacement sensor form closed-loop control, and the force measuring sensor monitors size of the stress of the test machine support portion course constrained point in real time; the step 2, a course force control active load point is selected at a non-checking portion of the test machine, and the position control actuating cylinder and the displacement sensor are installed to allow load of the active load point to be transmitted to a course constrained point; and the step 3, the constrained point force measuring sensor and a selected non-checking portion course force control actuating cylinder form a closed-loop control system to apply a course constrained point target load to the force control actuating cylinder so as to convert passive load of the constrained point to active load. Through construction of a closed-loop control condition, the active control method of airplane course constrained point errors can actively control the course constrained point errors into corresponding load control precision, the control process can be automatically performed, and when the test is continuously operated, the control process can still have an active control effect; and moreover, the load control precision is adjustable, the application is flexible and convenient, and the operation is simple.
TL;DR: In this paper, a grid-connected photovoltaic (PV) interface for delivering both active and reactive powers is presented, which employs H-bridge topology DC-DC converter and inverter with analog control technology.
Abstract: This paper presents a grid-connected photovoltaic (PV) interface for delivering both active and reactive powers. The PV interface employs H-bridge topology DC-DC converter and inverter with analog control technology. The power flow is controlled solely by the adjustable DC output voltage of the DC to DC converter. In order to evaluate the PV interface system’s performances, it is tested by delivering power to the grid with low pawer factor. The experimental results show that at 300W active load, the inverter could deliver the reactive power of 400VAR. The PV interface could also produce very low harmonic voltage and current distorsions. The laboratory measurements show that the total harmonic distortions of inverter output voltage and current are 0.46% and 0.05%, respectively
TL;DR: In this paper, a first resistor and a second resistor are coupled in series between a voltage source and an active load, and a stabilization current is delivered to the node common to the series coupled first and second resistors in such a way as to stabilize the voltage on the terminals of the active load.
Abstract: A first resistor and a second resistor are coupled in series between a voltage source and an active load. When the current drawn by the active load exceeds a current threshold corresponding to a maximum admissible voltage drop across the first resistor, a stabilization current is delivered to the node common to the series coupled first and second resistors in such a way as to stabilize the voltage on the terminals of the active load at a threshold value. In the presence of such a current in excess of the current threshold, the current consumed by the active load is measured from the voltage drop across the second resistor. Conversely, if the current is less than the current threshold, the current consumed by the active load is measured from the voltage drop across the first resistor.