TL;DR: The adopted optimization strategy is presented, together with measured results obtained with a medium-power 1-mm MESFET at 1 GHz, and design criteria to improve efficiency for high-frequency applications are briefly discussed.
Abstract: High-efficiency power-amplifier design requires numerous efforts to investigate both input and output harmonic terminations effects. A simplified theoretical approach to clarify the relevance of such terminations is presented here, and design criteria to improve efficiency for high-frequency applications are briefly discussed. An advanced active load/source-pull test-bench has been used to validate theoretical harmonic tuning techniques, characterizing an active device. The adopted optimization strategy is presented, together with measured results obtained with a medium-power 1-mm MESFET at 1 GHz. Input second harmonic impedances effects are stressed, showing a drain efficiency spread between 37%-49% for a fixed input power level, corresponding to 1-dB compression. Finally, as predicted by the presented theory, after input second harmonic tuning, further improvements are obtained, increasing fundamental output load resistive part, demonstrating an additional drain efficiency enhancement, which reaches a level of 55% at 1-dB compression.
TL;DR: In this paper, the results from measurements on eight different loads supplied with dc are presented and used to develop simple load models, which can be used for transient and steady-state analysis of low voltage (LV) dc systems.
Abstract: this paper, modelling of loads for dc system studies is treated. Results from measurements on eight different loads supplied with dc are presented and used to develop simple load models, which can be used for transient and steady-state analysis of low voltage (LV) dc systems. These load models can be used together with existing standards for calculations of load flow/voltage drop and short circuit currents in LV dc systems.
TL;DR: In this paper, an active load pull circuit is used for measuring the response of an electronic device (DUT 206) to an RF input signal from a signal generator (240a).
Abstract: An analyser for measuring the response of an electronic device (DUT 206) to an RF input signal from a signal generator (240a) is described. An active load pull circuit (201) is connected to the DUT 206, which receives an output signal from the DUT 206 and then feeds a modified signal back to the DUT 206. The signal is modified by a signal processing circuit (237) in view of input signals x, y to control the magnitude gain and phase change effected by the feedback circuit (237). Thus, positive feedback loops are avoided and better control of the analyser is permitted. A network analyser, or other signal measuring device (242), logs the waveforms (from which s-parameters derived) observed at ports of the DUT 206, thereby allowing the behaviour of the DUT 206 under various load conditions to be analysed.
TL;DR: In this paper, a switching power supply circuit in which a series circuit comprising a resistive element and a capacitive element is provided in a parallel configuration with an inductor which supplies a load current to a load circuit, a voltage comparator having first and second threshold voltages discriminates a voltage obtained from a mutual connecting point of the series circuit therefrom and controls a switch element for supplying a current to the inductor, thereby varying the current supplied to the induction in accordance with a variation in the load current.
Abstract: A switching power supply circuit in which a series circuit comprising a resistive element and a capacitive element is provided in a parallel configuration with an inductor which supplies a load current to a load circuit, a voltage comparator having first and second threshold voltages discriminates a voltage obtained from a mutual connecting point of the series circuit therefrom and controls a switch element for supplying a current to the inductor, thereby varying the current supplied to the inductor in accordance with a variation in the load current is combined with a series power supply circuit which shares the load current of the load circuit.
TL;DR: In this article, a power supply comprising a voltage regulator for generating an output voltage to be provided as the input voltage for powering the electrical load, the voltage regulator being responsive to a reference signal for setting a characteristic of the power supply, and a control circuit for generating the reference signals for the regulator.
Abstract: A power supply for powering an electrical load, the electrical load generating load characteristic data that determines a power supply characteristic to be provided to the electrical load from the power supply, the power supply comprising a voltage regulator for generating an output voltage to be provided as the input voltage for powering the electrical load, the voltage regulator being responsive to a reference signal for setting a characteristic of the power supply, and a control circuit for generating the reference signal for the regulator, the control circuit being responsive to the load characteristic data from the electrical load and to a selection input for selecting the type of electrical load from a plurality of electrical load types, whereby the selection input determines the type of electrical load to enable the load characteristic data to be evaluated by the control circuit to generate the reference signal for the regulator.
TL;DR: In this paper, the authors propose a compensation mechanism that adjusts the resistance of the adjustable resistor to adjust the effective resistors of the resistor and adjustable resistor combination to maintain the effective resistance of one or more resistors.
Abstract: A compensation apparatus maintains an effective resistance of one or more resistors in a circuit by associating an adjustable resistor circuit to each resistor. The compensation apparatus compares the resistance of a resistor in the circuit with the resistance of a reference resistor. When the resistance of the resistor in the circuit falls outside of a desired range, the compensation apparatus adjusts the resistance of the adjustable resistor to adjust the effective resistance of the resistor and adjustable resistor combination.
TL;DR: In this paper, a switching power supply circuit in which a series circuit comprising a resistive element and a capacitive element is provided in a parallel configuration with an inductor which supplies a load current to a load circuit, a voltage comparator having first and second threshold voltages discriminates a voltage obtained from a mutual connecting point of the series circuit therefrom and controls a switch element for supplying a current to the inductor, thereby varying the current supplied to the induction in accordance with a variation in the load current.
Abstract: A switching power supply circuit in which a series circuit comprising a resistive element and a capacitive element is provided in a parallel configuration with an inductor which supplies a load current to a load circuit, a voltage comparator having first and second threshold voltages discriminates a voltage obtained from a mutual connecting point of the series circuit therefrom and controls a switch element for supplying a current to the inductor, thereby varying the current supplied to the inductor in accordance with a variation in the load current is combined with a series power supply circuit which shares the load current of the load circuit.
TL;DR: In this article, the authors describe the design and implementation of a computer controlled active load for characterization of the steady-state and the dynamic behaviors of polymer electrolyte membrane (PEM) fuel cell systems.
Abstract: This paper describes the design and implementation of a computer controlled active load for characterization of the steady-state and the dynamic behaviours of polymer electrolyte membrane (PEM) fuel cell systems. The active load converter is based on a linear regulator topology. The non-switching converter is ideal for steady-state measurements. The control of the converter is implemented in Simulink and dSpace and uses a PI feedback loop. The active load is designed for characterization of a fuel cell system, and therefore an electric circuit model for fuel cells is introduced. The circuit model contains a highly non-linear voltage source describing the activation polarization and the concentration polarization, two resistors for the ohmic polarization and the membranes double layer capacitor for the dynamic behaviour. The circuit model parameters are obtained from the measured data. Test results show good similarity with the fuel cell theory and confirm that the fuel cell circuit model can be used for modelling commercially available fuel cell systems, and uncontrolled fuel cell stacks.
TL;DR: In this paper, a resistor trimming circuit is designed to reversibly trim a matching resistor to match a reference resistor using programmable resistance materials such as metal-amorphous silicon metal materials, phase change materials or perovskite materials.
Abstract: Using programmable resistance material for a matching resistor, a resistor trimming circuit is designed to reversibly trim a matching resistor to match a reference resistor. The programmable resistance materials such as metal-amorphous silicon metal materials, phase change materials or perovskite materials are typically used in resistive memory devices and have the ability to change the resistance reversibly and repeatable with applied electrical pulses. The present invention reversible resistor trimming circuit comprises a resistance bridge network of a matching resistor and a reference resistor to provide inputs to a comparator circuit which generates a comparing signal indicative of the resistance difference. This comparing signal can be used to control a feedback circuit to provide appropriate electrical pulses to the matching resistor to modify the resistance of the matching resistor to match that of the reference resistor.
TL;DR: In this article, a load is powered by a load voltage and includes at least a processor for calculating a flow rate, an ultrasonic transducer power circuit, and a power regulating circuit is disposed between the loop power supply and the load.
Abstract: A flow meter is powered by a loop power supply which supplies a supply voltage. A load is powered by a load voltage and includes at least a processor for calculating a flow rate, an ultrasonic transducer power circuit, and an ultrasonic transducer receiving circuit. A power regulating circuit is disposed between the loop power supply and the load. The power regulating circuit includes a power converter responsive to the supply voltage to vary the load voltage in response to a control signal, a safe storage device between the converter and the load for storing power when not needed by the load and for delivering power to the load when required by the load, and a control subsystem for providing the control signal to the converter based on the setting of the loop power supply by the load. A power management subsystem is configured to detect the load voltage and to reduce the power consumption of the load at one or more predetermined set points.
TL;DR: In this article, a method and circuit for providing a regulated current to a load stabilized with respect to the load current, a load voltage, and a circuit temperature is presented, where a control signal is derived from the combination to control a regulation of the current.
Abstract: A method and circuit for providing a regulated current to a load stabilized with respect to the load current, a load voltage, and a circuit temperature. The circuit includes a power pass device, a current sense device, a voltage sense amplifier, a reference device, a temperature sense device, and a current control device. In one embodiment, the current control device receives a first signal based on the sensed load current, a second signal based on the sensed load voltage, a third signal based on the circuit temperature, and a reference signal. A lesser of the second, third, and reference signals is selected and differentially combined with the first signal. A control signal is derived from the combination to control a regulation of the load current. In a further embodiment, an external signal may be provided to the current control device for stabilization with respect to an external parameter.
TL;DR: In this paper, a current trip-point detection circuit is proposed to detect a change in the current that is provided to a load by comparing a sense voltage to a tap-point between the two resistors such that the comparator asserts a trippoint detection signal when the current to the load reaches a predetermined threshold.
Abstract: A current is provided from a power source to a load through a pass circuit that is series coupled to a sense resistor. A current trip-point detection circuit is arranged to detect a change in the current that is provided to a load. The current trip-point detection circuit includes at least two resistors that are series coupled from the sense resistor to a current source. A comparator compares a sense voltage to a tap-point between the two resistors such that the comparator asserts a trip-point detection signal when the current to the load reaches a predetermined threshold. The sense voltage can correspond to the voltage across the load or some other voltage that is proportional to the voltage across the load. The circuit arrangement has a simplified design that sets the trip-point as a percentage of the maximum output current. The current level trip-point can be temperature compensated.
TL;DR: This paper presents a 5.8 GHz low voltage down-conversion mixer design integrated in a TSMC 0.18 /spl mu/m CMOS process that eliminates the current source transistor at bottom and furthermore reduces the supply voltage.
Abstract: This paper presents a 5.8 GHz low voltage down-conversion mixer design integrated in a TSMC 0.18 /spl mu/m CMOS process. The proposed method features that an RF input stage converts the RF input voltage to current, which is coupled to the core of Gilbert Cell using current mirror. This implementation eliminates the current source transistor at bottom and furthermore reduces the supply voltage. Common-mode feedback is used for the active load of the mixer. The LO frequency is at 5.6 GHz. The designed mixer requires only a 1.5 V supply voltage and consumes 11.78 mW DC power. At 5.8 GHz, this mixer has single-sideband noise figure (SSB NF) of 13.6 dB, with input return loss of -18 dB, with output return loss of -26.4 dB, Third-order Input Intercept Point (IIP3) of -10.66 dBm, and conversion gain of 10.4 dB.
TL;DR: In this article, a first current mirror circuit performs its normal operation when a first switch is turned on, and is constructed so that a period during which the first mirror circuit can output a current is realized when the first switch are turned off.
Abstract: A first current mirror circuit performs its normal operation when a first switch is turned on, and is constructed so that a period during which the first current mirror circuit can output a current is realized when the first switch is turned off. A second current mirror circuit is connected to the first current mirror circuit so that the output current of the first current mirror circuit is decreased by an output current of the second current mirror circuit. A current output of a transistor and a current output of the first current mirror circuit are connected and outputted as an output signal. The first switch and a second switch are controlled by the output signal or a signal formed by the output signal being passed through a buffer circuit.
TL;DR: In this article, an improved load bank system is presented, which includes control circuitry configured to provide duty cycle commands corresponding to a desired load, and the effective resistance presented to an electrical power system to be connected at the input is thereby modified.
Abstract: An improved load bank system is provided. In one embodiment, the system includes control circuitry configured to provide duty cycle commands corresponding to a desired load. An input is configured to receive power from an electrical power system to be connected to the load bank system. At least one power resistor is selectively connected to the input. High speed solid state electronic switching circuitry is configured to rapidly switch according to the duty cycle command from the control circuitry in order to rapidly and sequentially permit current flow and prevent current flow through the resistor according to the duty cycle command. The effective resistance presented to an electrical power system to be connected at the input is thereby modified. Other load bank systems and load bank units are provided, as well as computer implemented and other methods for controlling a load bank system.
TL;DR: In this article, a driver circuit and a method drive an electronic component such as a laser diode with a variable electric current that is controlledly switched between at least two discrete current levels.
Abstract: A driver circuit and a method drive an electronic component such as a laser diode with a variable electric current that is controlledly switched between at least two discrete current levels. The driver circuit includes circuit elements that damp ringing or initial transient oscillations that arise when switching the current between the current levels. The driver circuit includes a current mirror having a mirror amplification factor dependent on the frequency of the variable electric current. In order to counteract parasitic capacitances and/or inductances leading to the ringing, an inductance and/or a resistance are connected between the two series circuits making up the current mirror, a capacitance is connected parallel to a reference resistor of one of the series circuits, and/or a capacitance is connected across the voltage supply.
TL;DR: In this paper, an active harmonic load-pull setup with broadband test signals and guaranteed unconditional stability of the active load is proposed. But the system is not suitable for small-hand signals.
Abstract: This paper proposes an active harmonic load-pull setup which allows the use of broadband test signals and guarantees unconditional stability of the active load. Active loadpull systems with conventional active loops suffer from too high delay times which limit their application to smallhand signals. The proposed system uses a modulated RF source for the generation of the required backward travelling wave. This guarantees unconditional stability of the load and allows a perfect delay compensation. Equations will be given to approximate the modulation signal for backed-off (weakly non-linear) amplifiers.
TL;DR: A sense amplifier for nonvolatile memory cells includes a reference cell, a first load, connected to the reference cell and a second load, connectable to a NMC, both the first load and the second load having controllable resistance as mentioned in this paper.
Abstract: A sense amplifier for nonvolatile memory cells includes a reference cell, a first load, connected to the reference cell, and a second load, connectable to a nonvolatile memory cell, both the first load and the second load having controllable resistance; a control circuit of the first load and of the second load supplies the first load and the second load with a control voltage irrespective of an operating voltage between a first conduction terminal and a second conduction terminal of the first load.
TL;DR: In this paper, an active load circuit for a high speed digital buffer has been proposed, which is based on two active devices connected to the buffer output so as to form a differential cascode circuit.
Abstract: A circuit for a high speed digital buffer has an active load circuit connected to an output of the digital buffer. The active load circuit loads the buffer output with an active inductance to reduce the RC time constant at the buffer output. The active load circuit may be based on two active devices connected to the buffer output so as to form a differential cascode circuit.
TL;DR: In this paper, the body effect is also included into the analysis of the differential amplifier with active load and single-ended output and the fact that the gate to source voltages and the current changes of the output transistors in the differential mode are not of equal amount are explained.
Abstract: The CMOS differential amplifier with active load and single-ended output is one of the most popular circuits used in analog and mixed signal applications owing to its amazing performances. Very often the analysis of the differential amplifier is simplified and its behaviour is not explained properly. In this paper the facts that the gate to source voltages and the current changes of the output transistors in the differential mode are not of equal amount are explained. The body-effect is also included into the analysis.
TL;DR: In this article, a power converter takes a rectified line input to a switching half-bridge that supplies current to a load, and a series combination of shunt switch and capacitor is connected across the load to store energy from the input and supply energy to the load.
Abstract: A power converter provides constant load power while achieving a high power factor in a single stage configuration with reduced component count and ratings. The power converter takes a rectified line input to a switching half-bridge that supplies current to a load. A series combination of shunt switch and capacitor is connected across the load to store energy from the input and supply energy to the load. The switches are operated with conduction angles that achieve constant power supplied to the load while drawing a sinusoidal current in phase with the input voltage to achieve high power factor. The circuit provides a simplified configuration over prior power converters that may be used with a resonant load as part of an electronic ballast or an AC-to-DC converter. The power converter configuration and operation also achieves a low total harmonic distortion on the input line power.
TL;DR: In this paper, a heating resistor type flow-measuring device is capable of adjusting the temperature of a temperature sensor according to the ambient temperature as well as making the initial adjustment.
Abstract: A heating resistor type flow-measuring device is capable of adjusting heating temperature of a heating resistor according to the ambient temperature as well as making the initial adjustment. A heating resistor, a thermoresistance, a group of the resistors, and an amplifier constitute a bridge circuit, and leading terminals of the group of resistors are connected to one of input terminals of an amplifier for amplifying an error voltage through MOS transistors. The heating temperature of the heating resistor can be changed by selecting one of the MOS transistors and turning it on.
TL;DR: In this article, a charging and feeding device is disclosed, which attempts to lower a thermal loss of a current control circuit, by changing a setting of the current flowing in the current controller according to the load state of a load device.
Abstract: A charging and feeding device is disclosed, which attempts to lower a thermal loss of a current control circuit, by changing a setting of the current flowing in the current control circuit according to the load state of a load device. Monitoring circuit monitors the present load state of the load device. Current control circuit controls a current value supplied from a direct current power supplied through the current control circuit based on the present load state data acquired by the monitoring circuit.
TL;DR: In this paper, the authors present an efficient power distribution system (PDS) design methodology that models the load, its point of load power converter, and the transporting system so that the entire system can be efficiently implemented in circuit simulation as a complete integrated setup for design optimization.
Abstract: High-speed digital devices require multiple voltage and frequency domains to accommodate the core logic and the input/output (I/O) circuitry for multiple interfaces. In addition, some of these interfaces are programmable to various speeds and signaling modes and they require multiple power supply voltages. These requirements create complex power delivery and signal distribution solutions. This paper proposes a design methodology for fast transient point of load (POL) power distribution architectures for microprocessors and fast switching logic. This paper presents an efficient power distribution system (PDS) design methodology that models the load, its point of load power converter, and the transporting system so that the entire system can be efficiently implemented in circuit simulation as a complete integrated setup for design optimization. Models for the voltage regulator module (VRM) and its transient response and stability, the active load with multiple power supply domains, and the power planes are discussed in detail. System voltage noise margin budgeting is also emphasized.
TL;DR: In this paper, an inductance for compensating frequency characteristics is given to the source of the load current control transistor in series, so that a voltage saturation in the load transistor when the transistor works at a low voltage can be prevented, and even at the cross over point where the current polarity is changed, the apparatus operates without causing a large distortion.
Abstract: The electronic load apparatus where an inductance is given to the source of a transistor for controlling load current, so that the frequency response characteristic of the electronic load control loop and the electronic load transient response characteristics at the starting of the power supply to be tested are improved; and by providing a non-linear element between the input and output of an operational amplifier for the driving transistor of the controlling circuit, a better load current control characteristic is obtained in a wide load current range. In an apparatus where a plurality of electronic load modules are connected together in parallel, by adding a voltage signal converted from the output of a voltage generating circuit for correcting load current slew rate by the correcting coefficient adding circuit for adding a coefficient which is inversely proportional to the residual inductance to a voltage generated in a reference voltage generating circuit for controlling load current, a voltage saturation in the load transistor when the transistor works at a low voltage can be prevented, so that the load current slew rate of the electronic load apparatus is improved. Further, in an AC electronic load apparatus, an inductance for compensating frequency characteristics is given to the source of the load current control transistor in series. Therefore, the frequency response characteristics of the load current control feedback loop is greatly improved, and even at the cross over point where the current polarity is changed, the apparatus operates without causing a large distortion, and thus the apparatus can be used to test the AC power supply working with a high frequency.
TL;DR: In this article, a method and circuit for tracking a load current and a load voltage to provide an output signal that is proportional to the load current is presented. But the method is not suitable for a large number of transistors.
Abstract: A method and circuit for tracking a load current and a load voltage to provide an output signal that is proportional to the load current. The circuit enables employment of high gate area (W/L) ratio for a current mirror type current sense circuit, while maintaining accuracy of a sense current. A tracking circuit tracks the load current and the load voltage providing equal biasing to a power pass transistor and a power sense transistor. The tracking circuit further supplies a gate voltage to a cascode transistor, which provides the output signal proportional to the load current. A trimming circuit allows adjustment of a current flowing through the cascode transistor enabling calibration of the circuit for variations of W/L ratio between the power pass transistor and power sense transistor due to manufacturing tolerances. Calibration may be performed during initial power-on and selected trimming transistors may be turned on or off.
TL;DR: In this paper, an active load-pull architecture capable of providing a constant broadband load with varying drive conditions that is unconditionally stable is presented, thus overcoming many of the problems associated with existing active load pull architectures.
Abstract: The paper presents a novel active load-pull architecture capable of providing a constant broadband load with varying drive conditions that is unconditionally stable thus overcoming for the first time many of the problems associated with existing active load pull architectures.
TL;DR: In this paper, a temperature compensating circuit for an amplifier is described, which consists of a voltage regulator, a component arrangement and a resistor coupling of at least two resistor units.
Abstract: The invention relates to a temperature compensating circuit for an amplifier. The circuit comprises a voltage regulator, a component arrangement and a resistor coupling of at least two resistor units. At least part of the output voltage of the temperature compensating circuit is adjustable. The component arrangement includes at least one component with a known temperature dependency of voltage. The resistor coupling forms a slope coefficient as a ratio of values of the resistors in the resistor coupling. The resistor coupling is coupled to the a component arrangement in order to provide the temperature compensating circuit with an output voltage having a temperature dependency which is a function of the slope coefficient and the known temperature dependency of the component arrangement.
TL;DR: In this paper, the authors describe the development of a SMT-packaged 620GHz frequency-doubler MMIC, which is implemented in a 0.15um GaAs PHEMT process and low-cost SMT package.
Abstract: This paper describes the development of a SMT-packaged 620GHz frequency-doubler MMIC. The frequency-doubler is implemented in a 0.15um GaAs PHEMT process and low-cost SMT package. This MMIC employs a unique differential-pair active balun input stage with waveform-shaping circuit and active load. Balanced common-source FETs are used for 2nd-harmonic generation. The FET-drains are combined at output to achieve odd-order cancellation. This creates a broadband, low input-drive, high conversion efficiency frequency-doubler with decent fundamental & harmonic suppression. At optimum input power of -4dBm, it achieves 11dB conversion gain without amplification stage. Fundamental and 3rd-order suppressions are greater than 20dB across the frequency band. This work has demonstrated the capability to manufacture packaged frequency-doublers for cost-sensitive applications. It consumes 120mW (4V, 30mA) power.