Abstract: We present design techniques that make possible the operation of analog circuits with very low supply voltages, down to 0.5 V. We use operational transconductance amplifier (OTA) and filter design as a vehicle to introduce these techniques. Two OTAs, one with body inputs and the other with gate inputs, are designed. Biasing strategies to maintain common-mode voltages and attain maximum signal swing over process, voltage, and temperature are proposed. Prototype chips were fabricated in a 0.18-/spl mu/m CMOS process using standard 0.5-V V/sub T/ devices. The body-input OTA has a measured 52-dB DC gain, a 2.5-MHz gain-bandwidth, and consumes 110 /spl mu/W. The gate-input OTA has a measured 62-dB DC gain (with automatic gain-enhancement), a 10-MHz gain-bandwidth, and consumes 75 /spl mu/W. Design techniques for active-RC filters are also presented. Weak-inversion MOS varactors are proposed and modeled. These are used along with 0.5-V gate-input OTAs to design a fully integrated, 135-kHz fifth-order elliptic low-pass filter. The prototype chip in a 0.18-/spl mu/m CMOS process with V/sub T/ of 0.5-V also includes an on-chip phase-locked loop for tuning. The 1-mm/sup 2/ chip has a measured dynamic range of 57 dB and draws 2.2 mA from the 0.5-V supply.

Abstract: This paper proposes a novel approach to adapt a conventional direct power control (DPC) for high-power applications, where a third-order LCL filter is frequently required. The LCL filter can cause a strong resonance and requires additional effort for system control. The application of a DPC for the control of a three-phase voltage source inverter that is connected to the grid through an filter has not yet been considered. The addition of an active damping strategy, together with a harmonic rejection control loop, to the conventional DPC is proposed and analyzed in this paper. The steady-state, as well as the dynamic performance of the proposed system, is verified with simulation results and experimental measurements.

Abstract: Problems caused by power quality have great adverse economical impact on the utilities and customers. Current harmonics are one of the most common power quality problems and are usually resolved by the use of shunt passive or active filters. In this paper, a new control design using artificial neural networks is proposed to make the conventional shunt active filter adaptive. The proposed adaptive shunt active filter can compensate for harmonic currents, power factor and nonlinear load unbalance. A self-charging technique is also proposed to regulate the dc capacitor voltage at the desired level with the use of a PI controller. The design concept of the adaptive shunt active filter is verified through simulation studies and the results obtained are discussed.

Abstract: Current regulation techniques for pulsewidth-modulated (PWM) voltage source inverters (VSIs) can be classified as either linear or nonlinear. Linear techniques consist principally of either a proportional-integral (PI) or a predictive current control strategy, while nonlinear schemes are usually based on a hysteresis strategy. Of the two linear strategies, predictive current control offers the advantages of precise current tracking with minimal distortion and can also be fully implemented on a digital platform. However, the conventional implementation of the predictive current regulation (PCR) algorithm is sensitive to noise and errors in the load inductance estimate, particularly when the back EMF is also estimated. This paper presents an improved PCR algorithm that retains all the benefits associated with PCR while achieving significantly increased robustness to load parameter mismatch and reduced zero current clamped oscillation effects. It is also relatively insensitive to noise in the sampled current measurements. The algorithm is equally applicable to variable fundamental frequency applications such as variable speed drives and to fixed fundamental frequency applications such as PWM rectifier systems or active filters. Simulation and experimental results are presented to confirm the improved robustness of the new algorithm.

Abstract: This paper proposes a single-phase two-wire inverter system for photovoltaic (PV) power injection and active power filtering (APF) with nonlinear inductor consideration. The proposed system can fully or partially perform APF, process PV power, eliminate harmonic currents, improve power factor, and take into account the nonlinear effect of its output filter inductor. In the system, even though only the utility current is sensed, both APF and maximum power point tracking features can be still achieved, reducing the number of current sensors and cost significantly. To prevent output current from exceeding switch ratings, inverter current is properly controlled through a current estimator and a defined limit circle. A self-learning algorithm is also proposed to determine nonlinear inductance, which can increase the accuracy of the estimated current. Simulations and experimental results have verified the feasibility of the proposed PV inverter system and the algorithm.

Abstract: Inverters adopted in distributed power generation, active filter, and uninterruptible power supply are often connected to the grid through an inductance-capacitor-inductance (LCL) filter. The impedance of the LCL filter has a typical frequency characteristic with a resonance peak. Hence, the LCL filter has to be damped in order to avoid instability. However, the resonance of the LCL filter can be also excited in a controlled way in order to individuate the resonance frequency in the spectrum (using for example the fast Fourier transform). This paper proposes to use a controlled excitation in measuring the grid impedance, since this one influences also the resonance frequency. This paper will address some possible limits, some solutions, and some implementation issues (e.g., how to obtain a controlled resonance in the filter without damaging the system) in order to use the resonant peak for grid impedance detection. The analysis is validated both by simulations and experimental results.

Abstract: In the attempt to minimize the harmonic disturbances created by the non-linear loads the choice of the active power filters comes out to improve the filtering efficiency and to solve many issues existing with classical passive filters. One of the key points for a proper implementation of an active filter is to use a good method for current/voltage reference generation. There exist many implementations supported by different theories (either in time- or frequency-domain), which continuously debate their performances proposing ever better solutions. This paper gives a survey of the common used theories. Then, the work here proposes a simulation setup that decouples the harmonic reference generator from the active filter model and its controller. In this way the selected methods can be equally analyzed and compared with respect to their performance, which helps anticipating possible implementation issues. The conclusions are collected and a comparison is given at the end, which is useful in deciding the future hardware setup implementation. The comparison shows that the choice of numerical filtering is a key factor for obtaining good accuracies and dynamics for an active filter.

Abstract: Slight hardware and algorithm modifications as well as a higher power ratio of a three-phase pulsewidth-modulation (PWM) rectifier make compensation of neighboring nonlinear power load possible. The active filtering function enlarges the functionality of PWM rectifiers, which decreases the cost of additional installation of compensating equipment. It gives a chance to fulfill both shunt active filter (SAF) and PWM rectifier tasks in a multidrive system by one advanced converter. Thanks to the idea of virtual flux, the direct power control space-vector-modulated (DPC-SVM) and new synchronous double reference frame phase-locked loop approach, the control system is resistant to a majority of line voltage disturbances. This assures proper operation of the system for abnormal and failure grid conditions. Simulation and experimental results have proven excellent performance and verify the validity of the proposed system.

Abstract: Design and simulation of a digitally controlled CMOS fully differential current conveyor (DCFDCC) is presented. A novel current division network (CDN) is used to provide the digital control of the current gain between terminals X and Z of this DCFDCC. The proposed DCFDCC operates under low supply voltage of /spl plusmn/1.5 V. The realization of the DCFDCC using the new CDN is presented by two approaches. First approach has linearly proportional current gain with the digitally controlled parameter of the CDN, while the second approach exhibits current gain between terminals X and Z greater than, or equal to, one. Applications of the DCFDCC in realizing second order universal active filter and variable gain amplifier are given. PSPICE simulation confirms the performance of the proposed blocks and its applications.

Abstract: A third-order G/sub m/-C Butterworth low-pass filter implementing G/sub m/-tuning and G/sub m/-switching to maximize the tuning range is described. This filter is intended to be used as a channel-selection/anti-aliasing filter in the analog baseband part of a zero-IF radio receiver architecture for multimode mobile communications. Its G/sub m/-switching feature allows extending the tuning range and adapting the power consumption. The filter's cutoff frequency ranges from 50 kHz to 2.2 MHz. An Input IP3 of up to +18 dBV/sub p/ is achieved, for a total worst-case power consumption of 7.3 mW for both I and Q paths, and an effective area of less than 0.5 mm/sup 2/ in a 0.25-/spl mu/m SiGe BiCMOS process. A new figure of merit is introduced for comparison of published low-pass tunable filters including noise, linearity, and tuning range.

Abstract: Q-enhanced LC filter technology offers a promising approach to remove the off-chip preselect filter still required in current transceivers. However, reported designs fail to meet stringent system specifications such as dynamic range and noise figure for existing wireless standards. The complexity and inaccuracy of frequency and Q tuning have also prevented acceptance in industry applications. This paper presents a low-power and high-performance design targeted at Bluetooth in a silicon-on-isolator (SOI) CMOS process. Drawing 5 mA from a 3-V supply, it achieves 23-dB voltage gain (14-dB power gain), approximately 6-dB noise figure, and a 153-dB/spl middot/Hz 1-dB compression point dynamic range, when operating with a 70-MHz bandwidth at 2.5 GHz. A simplified approach to frequency and Q tuning is also demonstrated, making Q-enhanced LC filtering feasible in industry application for the first time.

Abstract: LCL type filter becomes more and more attractive as utility interface for grid-connected voltage source rectifier (VSR). Compared to L type filter, LCL type filter can render better switching harmonics attenuation using lower inductance, which makes it suitable for higher power applications. However, LCL filter design is complex and needs to consider many constraints, such as current ripple through inductors, total impedance of the filter, switching harmonic attenuation, resonance phenomenon and reactive power absorbed by filter capacitors, etc. Try-error method is inconvenient and time-consuming. This paper proposes a novel method for LCL type filter design, which makes the task very convenient. At first, the total inductance should be determined according to current ripple requirement. With filter capacitor insertion, total inductance is split into two parts. A set of equations is obtained to represent the relationship between the impedances at switching frequency with consideration of switching harmonic attenuation and reactive power constrains. The other constraints are considered as the limitation for solvability condition for equations. So the overall design can be easily done by solving the equations. Step-by-step design procedure is described as a design example, which is verified on the experimental set-up

Abstract: Unlike traditional passive filters, active filters for power conditioning have multiple functions such as harmonic filtering/damping/isolation/termination, load balancing, reactive-power control for power factor correction and voltage regulation, voltage-flicker reduction, or their combinations Significant cost reductions in both power semiconductor devices and signal-processing devices have inspired many manufactures in Japan, Europe and the United States to put active filters on the market This paper deals with active filters for power conditioning, and specifically hybrid active filters for harmonic filtering of three-phase diode rectifiers

Abstract: This work presents a low-cost approach to power factor correction (PFC) of single-phase diode rectifiers using a series active filter. Comparing with the traditional PFC, the proposed PFC has lower requirements of power device ratings, which leads to lower cost, higher efficiency, and lower electromagnetic interference. It also can eliminate the bulky inductor needed in the traditional PFC. The topology, operation principle, and application issues of the proposed PFC are analyzed in this paper. The control strategy is discussed in detail and simulation results are provided. A 1-kW prototype is built up and the experimental results are presented to verify the analysis.

Abstract: This study proposes a second-order bandpass filter of serial configuration. The filter schema incorporates a grounding capacitor, connecting the two conventional parallel LC resonators with the ground, to provide two finite transmission zeros. The impedance matrix and graphical solutions describe proposed filter's operation principle. To demonstrate the proposed filter schema, two bandpass filters, with center frequencies of 2.44 and 4.8 GHz, were designed and implemented using low-temperature co-fired ceramic multilayer technology. The measured results were found to agree well with the simulation results. The 2.44-GHz fabricated bandpass filter was found to possess low in-band insertion loss and high out-band suppression, making it suitable in wireless local area networks, Bluetooth, and RF home links.

Abstract: Biomedical signals such as ECG, EMG, and EEG are extremely important in the diagnosis of patients. It is difficult to filter noise from these signals, and errors resulting from filtering can distort a biomedical signal. Existing systems have shown poor performance when complicated noise appears. Adaptive filtering is selected to contend with these defects. Existing adaptive filters can adjust the filter coefficient with the given filter order, but they can produce an unsuitable order in different environments. In order to solve this problem, an optimal adaptive filter with a dynamic structure was designed. Positive experimental results were obtained.

Abstract: This paper addresses the application of the branch-line directional coupler to the design of microwave bandpass filters. The basic idea consists of using the branch-line coupler as a transversal filtering section by loading the coupled ports of the coupler with suitable transmission-line segments ending in an open circuit and taking the isolated port as the output node. Thus, under the signal interference philosophy involved in classic transversal filter schemes, bandpass transfer functions with perceptible stopbands and sharp cutoff slopes are derived. Furthermore, the main characteristics of the synthesized filtering response, such as the bandwidth or the position of the out-of-band power transmission zeros, can be easily controlled by means of the design parameters of the transversal section. Hence, a large variety of bandpass filtering profiles different from those offered by classical filter schemes can be realized. Finally, the experimental usefulness of the transversal filtering section based on the branch-line coupler is proven with the design and construction in microstrip technology of two microwave bandpass filter prototypes at 5 GHz.

Abstract: A novel current-detection algorithm based on the time-domain approach for three-phase shunt active power filters (APFs) to eliminate harmonics, and/or correct power factor, and/or balance asymmetrical loads is analyzed in this paper. A basic overview and evaluation of the performance of existing current-detection algorithms for active power filters are presented. According to different complicated power quality issues and various compensation purposes, a novel current-detection algorithm is then proposed. Comparing with existing algorithms, this algorithm has shorter response time delay and clearer physical meaning. Different compensating current references can, thus, be accurately and easily obtained by adopting the proposed algorithm. It ensures that the shunt APF can very well achieve different compensation purposes. Moreover, it is very easy to implement this algorithm in a digital signal processor (DSP). Simulation results obtained with MATLAB and testing results on an experimental shunt APF are presented to validate the proposed algorithm.

Abstract: A novel procedure to approximate wavelet bases using analog circuitry is presented. First, an approximation is used to calculate the transfer function of the filter, whose impulse response is the required wavelet. Next, for low-power low-voltage applications, we optimize the state-space description of the filter for dynamic range, sensitivity and sparsity requirements. The filter design that follows is based on an orthonormal ladder structure with log-domain integrators as the main building blocks. Simulations demonstrate that it approximates the required wavelet base (i.e., Morlet) in an excellent way. The circuit operates from a 1.2-V supply voltage and a bias current of 1.2 /spl mu/A.

Abstract: Limitations in current backplane environments impede high-speed data transmission above 5 Gb/s. A system architecture to extend the transmission capacities of legacy backplanes is proposed. The incentives for using a four-level pulse amplitude modulation (4-PAM) scheme are also presented. The architecture is built from feed-forward equalizer and tunable filter elements for near-end crosstalk noise cancellation. Each of the circuits is implemented in a standard 0.18-/spl mu/m CMOS process. The building blocks of the architecture, which include an LC ladder, a modified Gilbert-cell multiplier with improved headroom, and a tunable active high-pass filter are described in detail. Results of the architecture are shown demonstrating 20-Gb/s 4-PAM signal transmission.

Abstract: The performance of an active power filter (APF) depends on the inverter characteristics, applied control method, and the accuracy of the reference signal generator. The accuracy of the reference generator is the most critical item in determining the performance of APFs. This paper introduces an efficient reference signal generator composed of an improved adaptive predictive filter. The performance of the proposed reference signal generator was first verified through a simulation with MATLAB. Furthermore, the application of feasibility was evaluated through experimenting with a single-phase APF prototype based on the proposed reference generator, which was implemented using the TMS320C31 floating-point signal processor. Both simulations and experimental results confirm that our reference signal generator can be used successfully in practical APFs.

Abstract: This paper reviews and analyzes two reported image-rejection (IR) low-noise amplifier (LNA) design techniques based on CMOS technology, i.e., the second-order active notch filer and third-order passive notch filter. The analyses and discussions are based on the quality factor of filters and the ability of the frequency control. As the solution to deal with the suitable on-chip filter, this paper proposes a new notch-filter topology that can overcome the limitations of the two previous reported studies. In addition, the LNA design method satisfying the power-cons-trained simultaneous noise and input matching, as well as the linearity optimization conditions is introduced. By using the proposed notch filter and proposed design methodology, an IR LNA used in the superheterodyne architecture is implemented. The proposed IR LNA, designed based on 0.18-mum CMOS technology with total current dissipation of 4 mA under 3-V supply voltage, is optimized for a 5.25-GHz wireless local area network with IF frequency of 500-MHz applications. The measurement results show 20.5-dB power gain, lower than 1.5-dB noise figure, -5-dBm input-referred third-order intercept point and an IR of 26 dB

Abstract: This paper introduces two different current differencing buffered amplifier (CDBA)-based synthetic floating inductance circuits. Both configurations use a grounded capacitor. They are fully integrable and provide the advantages of electronic tuning.

Abstract: Three-phase voltage-source converters are used as a utility interface. In such a case, the converter line currents are required to track sinusoidal references synchronized with the utility grid without steady-state error. In this paper a current control method based on a sinusoidal internal model is employed. The method uses a sine transfer function with a specified resonant frequency, which is called an S compensator. The combination of a conventional PI compensator and an S compensator is called a PIS compensator. The PIS compensator ensures that the steady-state error in response to any step changes in a reference signal at the resonant frequency and zero hertz reduces to zero. An experiment was carried out using a 1-kVA prototype of three utility interface converters, a voltage-source rectifier, an active power filter, and STATCOM. Almost perfect current tracking performance can be observed. © 2004 Wiley Periodicals, Inc. Electr Eng Jpn, 150(3): 54–61, 2005; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/eej.20064

Abstract: This paper presents a novel dynamic model in the stationary reference frame for a diode bridge rectifier with a dc-link filter directly connected to an induction generator (IG). Moreover, a hybrid excitation system consisting of a capacitor bank with a small-scale active power filter (APF) regulates the stand-alone IG systems output voltages by controlling its reactive current component and cancels the harmonic currents generated by a nonlinear diode rectifier load. A deadbeat current control strategy for the small-scale APF is used to enhance the operating performances of the stand-alone IG. This power generating system can be used for small hydro and wind energy applications, where its generated electrical power is supplied to different load types, i.e., dc and ac loads. The measurement results validate the proposed power generating system with the deadbeat current controller as a good application for the IG to reduce the total system cost and the required number of sensors.

Abstract: Given terminal constraints of unity power factor in ac drive applications, two ac drives are possible: one with a pulse-width modulation voltage source rectifier (PWM-VSR) and the other using a diode rectifier and an active power filter. Despite numerous publications for the two drives, the features and advantages between them have not been clearly explained. This paper presents a theoretical analysis and systematic comparison between the two drive topologies. Converter kVA ratings, dc-link voltage requirements, switch ratings, semiconductor losses, and reactive component designs are considered for the evaluations.

Abstract: None of the previously reported voltage-mode universal biquad filters with three inputs and a single output offers either of the following two important advantages: (i) the use of only one active element and (ii) independent control of ω0 and ω0/Q. In this paper, a novel biquad filter, achieving both of these advantages, is presented. HSPICE simulation results using TSMC025 process and ±1.25 V supply voltages validate the theoretical predictions.