Abstract: This paper proposes a control algorithm for parallel active power filters, based on current-controlled pulsewidth-modulated converters, which allows precise compensation of selected harmonic currents produced by distorting loads. The approach is based on the measurement of line currents and performs the compensation of the selected harmonics using closed-loop synchronous frame controllers. Thanks to the closed-loop operation, full compensation of the desired harmonics is achieved even in the presence of a significant delay in the current control. Thanks to the selective approach, active filter interactions with possible dynamic components of the load are minimized. Moreover, the complexity of the synchronous frame controllers is overcome using equivalent stationary frame controllers. Experimental results confirm the theoretical expectations.

Abstract: A new current control method based on the internal model principle in control theory is proposed. It introduces a sinusoidal internal model into the control system. It does not use any coordinate transformations. The method can be used for tracking an arbitrary number of harmonics: a DC component or fundamental frequency component signal. It is applied to a single-phase pulsewidth modulation inverter and active filter. The validity is confirmed by simulation and experimental results.

Abstract: An active power filter (APF) is a device that is connected in parallel to and cancels the reactive and harmonic currents from a group of nonlinear loads so that the resulting total current drawn from the AC mains is sinusoidal. This paper presents a unified constant-frequency integration (UCI) APF control method based on one-cycle control. This method employs an integrator with reset as its core component to control the pulse width of an AC-DC converter so that its current draw is precisely opposite to the reactive and harmonic current draw of the nonlinear loads. In contrast to previously proposed methods, there is no need to generate a current reference for the control of the converter current, thus no need for a multiplier and no need to sense the AC line voltage, the APF current, or the nonlinear load current. Only one AC current sensor is used to sense the AC main current and one DC voltage sensor is used to sense the DC capacitor voltage. The control method features constant switching frequency operation, minimum reactive and harmonic current generation, and simple analog circuitry. It provides a low cost and high performance solution for power quality control. Steady-state and dynamic study is presented in this paper. Design example is given using a two-level AC-DC boost topology. A prototype was developed to demonstrate the performance of the proposed APF. This control method is generalized to control a family of converters that are suitable for APF applications. All findings are supported by experiments and simulation.

Abstract: This paper presents a three-phase line-interactive uninterruptible power supply (UPS) system with series-parallel active power-line conditioning capabilities, using a synchronous reference frame (SRF) based controller, which allows an effective power factor correction, load harmonic current suppression and output voltage regulation. The three-phase UPS system is composed of two active power filter topologies. The first one is a series active power filter, which works as a sinusoidal current source in phase with the input voltage. The other is a parallel active power filter, which works as a sinusoidal voltage source in phase with the input voltage, providing to the load a regulated and sinusoidal voltage with low total harmonic distortion (THD). Operation of a three-phase phase-locked loop (PLL) structure, used in the proposed line-interactive UPS implementation, is presented and experimentally verified under distorted utility conditions. The control algorithm using SRF method and the active power flow through the UPS system are described and analytically studied. Design procedures, digital simulations and experimental results for a prototype are presented to verify the good performance of the proposed three-phase line-interactive UPS system.

Abstract: This paper deals with a curious phenomenon referred to as the "whack-a-mole" that may occur in a long-distance distribution feeder having many capacitors for power-factor correction. The idea of whack-a-mole is that installation of an active or passive filter on the feeder makes voltage harmonics increase on some buses, whereas it makes voltage harmonics decrease on other buses, especially at the point of installation. The distributed-parameter representation is applied to a simplified feeder, thus making it possible to perform analysis of the whack-a-mole. As a result, this analysis yields such a basic way as to avoid the whack-a-mole. Moreover, both theory and experiment clarify that installation of the active filter acting as a harmonic terminator on the end bus of the feeder can damp out harmonic propagation throughout the feeder without causing any whack-a-mole.

Abstract: This paper presents the analysis and design of a single-phase voltage regulator (VR) and its multinodule parallel control. The VR employs the pulsewidth modulation three-arm rectifier-inverter topology. The inverter side adjusts the load voltage with the series regulating structure aiming to minimize converter capacity and attain higher efficiency. The rectifier side regenerates the load power and executes the active power filter function to achieve unity power factor. Based on such high-performance VR, a resistive droop method combined with the P-V droop and Q-/spl delta/ shift scheme is then proposed to control the current sharing such that multiple VRs can be paralleled directly without any control interconnection. The proposed parallel control technique possesses the features of fast response, precise voltage regulation, equal fundamental and harmonic current sharing, tolerance for parameter mismatch, and so on. Two prototype 1 KVA VRs are implemented, and the effectiveness is demonstrated by some simulation and experimental results.

Abstract: A new three-input single-output voltage-mode universal biquadratic filter with high-input impedance using only three plus-type second-generation current conveyors (CCIIs) is presented. The proposed configuration uses only two capacitors and two resistors and can realize all the standard filter functions, that is, high-pass, bandpass, low-pass, notch, and allpass filters without changing the passive elements. The proposed circuit has no requirements for component matching conditions. The use of only plus-type CCIIs simplifies the configuration.

Abstract: We present the fully balanced version of the differential difference amplifier (DDA) as an essential building block for implementing fully differential architectures of analog CMOS integrated circuits (ICs). It is demonstrated that the fully balanced differential difference amplifier (FBDDA) provides the solution for systematically developing fully differential versions of any single-ended op-amp based circuit. It is also shown that, unlike the DDA, the FBDDA exhibits a wide input range without demanding complex circuitry. A low-power class AB CMOS realization of the proposed circuit has been designed and fabricated in a 1.2 /spl mu/m technology. All proposed design techniques and circuits were experimentally verified.

Abstract: The design and implementation of a harmonic current computation technique based on a modified Fourier analysis, suitable for active power filters incorporating DSPs is presented. The proposed technique is suitable for the monitoring and control of load current harmonics for real-time applications. The derivation of the basic equations based on the proposed technique and the system implementation using the Analogue Devices SHARC processor are presented. The steady state and dynamic performance of the system are evaluated for a range of loading conditions.

Abstract: This paper presents a hybrid series passive/shunt active power filter system for high power nonlinear loads. This work is motivated by the fact that the ability of a converter to perform effectively as an active filter is limited by the power and the frequency distribution of the distortion for which it must compensate. This system is comprised of a three-phase shunt active filter and series AC line smoothing reactance installed in front of the target load. The proposed system significantly reduces the required shunt active filter bandwidth. The space-vector pulse width modulation (PWM) controller is based on a dead-beat control model. It is implemented digitally using a single 16-bit microcontroller. This controller requires only the supply current to be monitored, an approach different from conventional methods. The paper provides background on the operation of the filter, the details of the power circuit, the details of the control design, representative waveforms, and spectral performance for a filter which supports a 15 kVA phase controlled rectifier load. Experimental data indicate that the active filter typically consumes 2% or less of the average load power, suggesting that a parallel filter is an efficient compensation approach. The spectral performance shows that the active filter brings the system into compliance with IEEE519-1992 up to the 33rd harmonic for an AC line smoothing reactance of 0.13 p.u.

Abstract: In this paper, a new hybrid active power filter topology is presented. A higher-voltage, low-switching frequency IGBT inverter and a lower-voltage high-switching frequency MOSFET inverter are used in combination to achieve harmonic current compensation. The function of the IGBT inverter is to support utility fundamental voltage and to compensate for the fundamental reactive power. The MOSFET inverter fulfils the function of harmonic current compensation. To further reduce cost and to simplify control, the IGBT and MOSFET inverters share the same DC-link via a split capacitor bank. With this approach, harmonics can be cancelled over a wide frequency range. Compared to the conventional APF topology, the proposed approach employs lower DC-link voltage and generates less noise. Simulation and experimental results show that the proposed active power filter topology is capable of compensating for the load harmonics.

Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver.

Abstract: The development of microstrip filters has been in great demand due to the rapid growth of wireless communication systems in this decade. Quasi-elliptic response filters are very popular in communication systems because of their high selectivity, which is introduced by a pair of transmission zeros. A number of ways of implementing the quasi-elliptic response filter on microstrip have been studied over the last two decades, i.e., the cascaded quadruplet filter, canonical filter, and extracted-pole filter. However, there is very little information in the literature giving the design details for microstrip extracted-pole filters. In this paper, design equations of the extracted-pole filter for microstrip are reviewed. A new class of microstrip filter is also presented here. This class of filter will have a quasi-elliptic function response and at the same time linear phase in the passband. The linear phase of the filter is introduced by an in-phase cross coupling, while the transmission zero is realized using an extracted-pole technique. Experimental results, together with a theoretical comparison between the group delay of this design, and the conventional quasi-elliptic six-pole filter are also presented.

Abstract: Shunt-connected trilevel power inverter in three-phase four-wired system as an active filter or individual current supply (peak-load supply) is studied by a novel technique: three-dimensional (3-D) voltage vectors pulse width modulation (PWM). In past decades, almost all the study for PWM is limited to the two-dimensional (2-D) domain, /spl alpha/ and /spl beta/ frames, in a three-phase three-wired system. However, in practical operation, there are many three-phase four-wired systems in distribution sites. The generalized study of 3-D two-level and three-level inverters is achieved in this paper so as to perform the basic theory of 3-D multilevel space vector switching PWM technique. The sign cubical hysteresis control strategy is proposed and studied with simulation results in 3-D aspect. The 3-D PWM technique in three-level inverters is accomplished.

Abstract: There have been a number of harmonic current detecting methods for the active power filter (APF), including the filtration approach by fixed frequency filters, the composition method of the imaginary and the real power based on the instantaneous reactive power theory, etc. In this paper, firstly, according to the adaptive noise canceling technology in signal processing, an adaptive detecting approach of harmonic current based on a neuron is presented. Then, on the basis of the configuration and learning algorithm for the developed system, the realization scheme of an analog circuit of the system is discussed. Thirdly, using PSPICE software, computer simulation studies of the circuit are performed. Finally, experimental studies are carried out. The performance and feasibility of the approach are tested and verified by the simulation and experimental results.

Abstract: This paper describes the development of a low cost shunt active power filter with digital control, which allows dynamic power factor correction and both harmonics and zero-sequence current compensation. The active filter controller is based on the instantaneous power theory (p-q theory) and was implemented using a standard 16 bits microcontroller. The p-q theory is introduced followed by the presentation of some active power filters topologies. Then a brief description of the implemented solution is made, including references to software tools used for simulation and system development. Experimental results are also presented, showing the good performance of the developed active filter.

Abstract: This paper describes a low-jitter phase-locked loop (PLL) implemented in a 0.18-/spl mu/m CMOS process. A sample-reset loop filter architecture is used that averages the oscillator proportional control current which provides the feedforward zero over an entire update period and hence leads to a ripple-free control signal. The ripple-free control current eliminates the need for an additional filtering pole, leading to a nearly 90/spl deg/ phase margin which minimizes input jitter peaking and transient locking overshoot. The PLL damping factor is made insensitive to process variations by making it dependent only upon a bandgap voltage and ratios of circuit elements. This ensures tracking between the natural frequency and the stabilizing zero. The PLL has a frequency range of 125-1250 MHz, frequency resolution better than 500 kHz, and rms jitter less than 0.9% of the oscillator period.

Abstract: A new transadmittance multifunction filter with single input and three outputs employing only three positive-type second-generation current conveyors and five passive elements is presented. The proposed filter realizes three basic filter functions simultaneously, all at high impedance outputs. No component matching is required and all the passive sensitivities are low. Experimental verification is also performed.

Abstract: Current distortion of 12-pulse rectifier loads is significantly lower compared to six-pulse rectifier loads. However, in passive filtering of the lowest and dominant characteristic 11th and 13th harmonics, the use of 5th and 7th filters is often required in order to prevent possible parallel and series resonance between the passive filter and source impedance which can be excited by source background distortion or by load current residual noncharacteristic harmonics at the 5th and 7th harmonic frequencies. In hybrid filter systems, an active filter (AF) can be added in series with the passive filter in order to isolate the source and load. In most proposed hybrid filter systems, AF control is based on the detection of total current distortion and high-frequency inverters. With a selective AF control system and voltage-controlled inverter, the AF can be controlled to isolate the load at the critical frequencies only while at all other frequencies the passive filter function is preserved so that lower switching frequency and AF rating is required. In this paper, the authors present a selective AF filter control system and simple hybrid filter topology suitable for the compensation of high-power 12-pulse rectifier loads. Harmonic current controllers based on the second-order infinite-impulse response digital resonant filters are used, as they can be considered as simple digital algorithms for more complex double cascaded synchronous-reference-frame-based proportional plus integral controllers. They are centered to the targeted harmonic frequencies by using an adaptive fundamental frequency tracking filter. This approach gives good results, even if the reference waveform (in our case, a load voltage) is highly distorted or unbalanced and no separate phaselocked loop is required. Test results for a laboratory model of this system and stability analysis are presented and the importance of delay-time compensation is discussed.

Abstract: AC railway traction systems are particularly susceptible to harmonic distortion. They are weak single phase networks often loaded with severely distorting SCR-based locomotive drives which continually change their point of physical connection to the network. For a public distribution system the total harmonic distortion is a clear measure of supply quality. However, for a traction system the more important parameter is the voltage form factor, which is directly related to the maximum power a locomotive can deliver. To minimise this form factor, this paper proposes the use of a shunt active filter that minimises the 3rd, 5th and 7th harmonic voltage components at the point of filter coupling. It is shown that the filter is effective in both compensating the pantograph voltage form factor, and providing reactive power to maintain the feeder voltage. The results are confirmed by detailed simulation using the EMTDC package.

Abstract: Two types of tunable filters have been developed at 400- and 800-MHz frequency bands, respectively. These filters have been fabricated with low-temperature co-fired-ceramics multilayer technologies assisted by varactor diodes. The filter size is 5.6 /spl times/ 5.6 /spl times/ 3.0 mm. Each filter has approximately 11% and 13% tuning range of frequency with a controlling voltage of 1-4 V, IL < 2.0 dB, and has an attenuation over 40 dB at fo /spl plusmn/ 30%, respectively. Temperature stability data is also discussed.

Abstract: Nanosized tin oxide powders were obtained using microwave procedure for their application on gas sensor technology. This technology allows taking advantage of low cost and high volume mass production for the easy in situ introduction of the palladium catalytic additive. The effects of a controlled high palladium catalysation, reaching active filter properties, are reported showing an enhancement of the selectivity for CO and CH 4 . In this work, electrical results of the sensor performances are discussed and correlated with their structural parameters and the used technological procedures. Especial emphasis has been devoted to the active filter efficiency deduced from CO consumption measurements. The applicability to the present state of the art in sensor technology of such active-filter catalysed SnO 2 is shown by means of its implementation in micromachined substrates operated in pulsed mode.

Abstract: This paper presents the input filter design for sliding mode controlled matrix converters. A global sliding mode control approach is considered for the converter with input filter to guarantee near unity input power factor operation and voltage or output current control. The sliding surfaces are directly obtained from the global system equations (matrix converter and input filter) written in the phase canonical form. The association of these sliding surfaces with the state-space vectors technique allows the choice of the most appropriate switching strategy. The proposed new input filter design considers the maximum allowed displacement factor introduced by the filter, as well as the ripple present at the capacitor voltages. Simulation results are obtained and discussed.

Abstract: A new control scheme for the line-current-detection-type active filter (AF) is proposed to improve the current regulation capability based on the digital deadbeat (DB) control. The current control scheme is achieved by controlling the intermediate voltage of the inverter output filter so that the AF output current is regulated using the DB control law for the calculation of the pulsewidth of the pulsewidth-modulation inverter. In the proposed scheme, the current regulation performance is improved to be much better than the conventional one. The control method, mathematical analysis, the simulation results, and the experimental results are presented in this paper.

Abstract: A fluid filter increases the useful life of the filtered fluid by removing contaminants therefrom, and may optionally provide for in-line delivery of additives to the filtered fluid. The filter may be an oil filter, a fuel filter, or other fluid filter. The fluid filter includes a casing which defines a hollow space therein, a mechanically active filter element within that space, and a chemically active filter element also retained within the hollow space proximate the mechanically active filter element. The chemically active filter element includes a nonwoven web made up of a plurality of fibers. Each fiber has a longitudinally extending internal cavity formed therein, and a corresponding longitudinally extending slot opening from that internal cavity to the outer surface of the fiber. Preferably each fiber has multiple lobes extending radially outwardly from a central stem, and each lobe cooperates with an adjacent lobe to define a longitudinally extending internal cavity and a corresponding slot therebetween. In order to remove contaminants or to supply additives to lubricating oil, the internal cavities, of each of the chemically active filter fibers, are supplied with a chemical reagent therein.

Abstract: This paper presents a new nonlinear decoupling control method of a three-phase three-wire voltage source shunt active filter. The currents injected by the active filter are controlled in the synchronous orthogonal dq frame using a decoupled feedback linearization control method. The reference currents are extracted from the sensed nonlinear load currents by applying the synchronous reference frame method. The voltage level of the DC side is regulated using an output feedback linearization control. Integral compensators are added in both current and voltage loops in order to eliminate the steady state errors due to system parameters uncertainty. Simulation results confirm the performance considered theoretically for the shunt active filter.

Abstract: A new recursive filter structure is proposed which can be controlled on-line using a single parameter. The structure can be used for interpolation in timing synchronisation of digital communications receivers. The technique is illustrated with an example of the implementation of a tunable fractional delay allpass filter using the Thiran design technique.

Abstract: A technique for designing a low-voltage continuous-time active filter is presented in this paper. In this technique, current sources are added to the inverting or noninverting op-amp terminals such that the op-amp input common-mode voltages can be set close to one of the supply rails to allow low-voltage operation. An automatic frequency and Q tuning technique is proposed for tuning the active filter using programmable capacitor arrays (PCAs). The proposed tuning technique does not require any peak detectors, which are difficult to implement at a low supply voltage. Instead, it uses a few analog comparators, a digital comparator, and a few binary counters to adjust the PCAs. To demonstrate the proposed techniques, a 1-V 1-MHz second-order filter fabricated in a conventional 1.2-/spl mu/m CMOS process is presented. For a 5-kHz input signal, the filter achieves a THD of -60.2 dB for a peak-to-peak output voltage of 600 mV. The frequency tuning range is between 585 kHz and 1.325 MHz. The measured power consumption for the filter alone consumes about 0.52 mW and for the entire system consumes about 1.6 mW for a supply voltage of /spl plusmn/0.5 V.

Abstract: The frequency-tunable band-reject filter described in this paper is designed to suppress signal interference in receivers of frequency-agile systems, while offering maximum transparency at passband frequencies. The presented solution is based on a new channelized-active-filter architecture in which the portion of the circuit that determines passband behavior is free of semiconductor devices. This permits passband residual noise and intermodulation distortion to be reduced to that of a simple nonresonant passive network. The concept is demonstrated with a varactor-tuned hybrid-integrated filter whose 40-dB-deep rejection notch of constant 70-MHz width can be tuned over a 9.5-10.5-GHz frequency span. Included are measurements of pertinent small-signal transfer characteristics and noise properties, as well as detailed assessments of nonlinear effects, such as third-order intermodulation distortion and compression of notch depth as a function of drive level.