About: 3D XPoint is a research topic. Over the lifetime, 50 publications have been published within this topic receiving 542 citations. The topic is also known as: Optane & cross point.
TL;DR: The basic characteristics of Intel's new 3D XPoint DIMM are investigated, taking special note of the particular ways in which its performance is peculiar relative to traditional DRAM or other past methods used to emulate NVM.
Abstract: After nearly a decade of anticipation, scalable nonvolatile memory DIMMs are finally commercially available with the release of Intel's 3D XPoint DIMM. This new nonvolatile DIMM supports byte-granularity accesses with access times on the order of DRAM, while also providing data storage that survives power outages. Researchers have not idly waited for real nonvolatile DIMMs (NVDIMMs) to arrive. Over the past decade, they have written a slew of papers proposing new programming models, file systems, libraries, and applications built to exploit the performance and flexibility that NVDIMMs promised to deliver. Those papers drew conclusions and made design decisions without detailed knowledge of how real NVDIMMs would behave or how industry would integrate them into computer architectures. Now that 3D XPoint NVDIMMs are actually here, we can provide detailed performance numbers, concrete guidance for programmers on these systems, reevaluate prior art for performance, and reoptimize persistent memory software for the real 3D XPoint DIMM. In this paper, we explore the performance properties and characteristics of Intel's new 3D XPoint DIMM at the micro and macro level. First, we investigate the basic characteristics of the device, taking special note of the particular ways in which its performance is peculiar relative to traditional DRAM or other past methods used to emulate NVM. From these observations, we recommend a set of best practices to maximize the performance of the device. With our improved understanding, we then explore the performance of prior art in application-level software for persistent memory, taking note of where their performance was influenced by our guidelines.
TL;DR: With a combination of high performance and nonvolatility, the arrival of 3D XPoint memory promises to fundamentally change the memory-storage hierarchy at the hardware, system software, and application levels.
Abstract: With a combination of high performance and nonvolatility, the arrival of 3D XPoint memory promises to fundamentally change the memory-storage hierarchy at the hardware, system software, and application levels. This memory will be deployed first as a block addressable storage device, known as the Intel Optane SSD, and even in this familiar form it will drive basic system change. Access times consistently as fast, or faster, than the rest of the system will blur the line between storage and memory. The low latencies from these solid-state drives (SSDs) allow rethinking even basic storage methodologies to be more memory-like. For example, the manner in which storage performance is measured shifts from input–output operations (IOs) at a given queue depth to response time for a given load, like memory is typically measured. System changes to match the low latency of these SSDs are already advanced, and in many cases they enable the application to utilize the SSD’s performance. In other cases, additional work is required, particularly on policies set originally with slow storage in mind. On top of these already-capable systems are real applications. System-level tests show that applications such as key–value stores and real-time analytics can benefit immediately. These application benefits include significantly faster runtime (up to $3\times $ ) and access to larger data sets than supported in DRAM. Newly viable mechanisms for expanding application memory footprint include native application support or native operating system paging, a significant change in the use of SSDs. The next step in this convergence is 3D XPoint memory accessed through processor load/store operations. Significant operating system support is already in place. The implications of consistently low latency storage and fast persistent memory on computing are great, with applications and systems taking advantage of this new technology as storage as the first to benefit.
TL;DR: In this paper, the performance properties and characteristics of Intel's new 3D XPoint DIMM at the micro and macro level are investigated, taking special note of the particular ways in which its performance is peculiar relative to traditional DRAM.
Abstract: After nearly a decade of anticipation, scalable nonvolatile memory DIMMs are finally commercially available with the release of Intel's 3D XPoint DIMM. This new nonvolatile DIMM supports byte-granularity accesses with access times on the order of DRAM, while also providing data storage that survives power outages. Researchers have not idly waited for real nonvolatile DIMMs (NVDIMMs) to arrive. Over the past decade, they have written a slew of papers proposing new programming models, file systems, libraries, and applications built to exploit the performance and flexibility that NVDIMMs promised to deliver. Those papers drew conclusions and made design decisions without detailed knowledge of how real NVDIMMs would behave or how industry would integrate them into computer architectures. Now that 3D XPoint NVDIMMs are actually here, we can provide detailed performance numbers, concrete guidance for programmers on these systems, reevaluate prior art for performance, and reoptimize persistent memory software for the real 3D XPoint DIMM. In this paper, we explore the performance properties and characteristics of Intel's new 3D XPoint DIMM at the micro and macro level. First, we investigate the basic characteristics of the device, taking special note of the particular ways in which its performance is peculiar relative to traditional DRAM or other past methods used to emulate NVM. From these observations, we recommend a set of best practices to maximize the performance of the device. With our improved understanding, we then explore the performance of prior art in application-level software for persistent memory, taking note of where their performance was influenced by our guidelines.
TL;DR: In this article, the authors review recent developments in OTS materials and their performance in devices, especially current density and selectivity, and introduce the evolution of theoretical models for explaining the OTS behavior, including thermal runaway, field-induced nucleation and generation/recombination of charge carriers.
Abstract: High-current switching performance of ovonic threshold switching (OTS) selectors have successfully enabled the commercialization of high-density three-dimensional (3D) stackable phase-change memory in Intel’s 3D Xpoint technology. This bridges the huge performance gap between dynamic random access memory (DRAM) and Flash. Similar to phase-change memory, OTS uses chalcogenide-based materials, but whereas phase-change memory reversibly switches between a high-resistance amorphous phase and a low-resistance crystalline phase, OTS freezes in the amorphous phase. In this article, we review recent developments in OTS materials and their performance in devices, especially current density and selectivity. Advantages and challenges of OTS devices in the integration with the phase-change memory are discussed. We introduce the evolution of theoretical models for explaining the OTS behavior, including thermal runaway, field-induced nucleation, and generation/recombination of charge carriers.
TL;DR: In this review, the current state of V‐NAND is briefly looked into, the eventual limitation of memory density increase and performance boost are discussed, and the possible strategies of integrating the resistance‐based memories into the vertical architecture are discussed.