Patent
X-propagation in emulation using efficient memory
Alexander Rabinovitch,Ludovic Marc Larzul +1 more
- 22 Jan 2015
3
TL;DR: In this article, an unknown state of a signal is indicated and propagated through digital logic circuits represented in a disclosed semantic to enable prompt detection of improper operation of the DUT, for example, due to power shut down or inadequate initialization.
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Abstract: Embodiments relate to the emulation of circuits, and representation of unknown states of signals. A disclosed system (and method and computer program product) includes an emulation environment to convert a digital signal of a DUT in a form capable of representing an unknown state. In addition, the disclosed system converts digital logic circuits such as Boolean logic, flip flops, latches, and memory circuits to be operable with signals having unknown states. Thus, an unknown state of a signal is indicated and propagated through digital logic circuits represented in a disclosed semantic to enable prompt detection of improper operation of the DUT, for example, due to power shut down or inadequate initialization.
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Citations
Patent
Isolated debugging in an fpga based emulation environment
Ludovic Marc Larzul
- 19 Jun 2015
TL;DR: In this paper, a host system partitions a design under test (DUT) into multiple partitions and maps each partition to an FPGA of an emulator which will emulate the partition.
10
Patent
Efficient resolution of latch race conditions in emulation
Alexander Rabinovitch,Xavier Guerin +1 more
- 24 Sep 2015
TL;DR: In this paper, a computer-implemented method for configuring a hardware verification system is presented, which includes receiving, in the computer, a first code representing a first design including a first latch configured to be evaluated in accordance with a first signal, when the computer is invoked to configure the verification system.
6
Patent
Graph data processing method and system
Chaokun Wang,Lou Yunkai +1 more
- 30 Nov 2018
TL;DR: In this paper, the authors present a graph data processing method and a graph database system of a community structure based on graph data input by a user, and the intermediate information signifying the processing instruction is generated according to the processing instructions.
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Luc Bergun,David Reynier,Sebastien Delerse,Frederic Emirian,Francois Douezy +4 more
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TL;DR: In this paper, the authors propose a method of emulating the design under test associated with a test environment consisting of two distinct generating phases comprising a first phase of generating a first file (FCH1) for configuring the test environment, and a second phase of configuring at least a part of the test under test, and the delivery of the first configuration file to a first reconfigurable hardware part (BTR) forming a test bench so as to configure the test bench.
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