Work Function Engineering for Performance Improvement in Leaky Negative Capacitance FETs
86
TL;DR: In this paper, the effects of ferroelectric leakage on the performance of a negative capacitance field effect transistor (NCFET) have been analyzed, which has an intermediate metallic layer between the Ferroelectric and the high-K dielectric.
read more
Abstract: We analyze the effects of ferroelectric leakage on the performance of a negative capacitance field-effect transistor (NCFET), which has an intermediatemetallic layer between the ferroelectric and the high-K dielectric. We show that, when designed without taking the dielectric leakage into account, the NCFET performance can actually degrade significantlywith respect to that of the baseline FET. To overcome these detrimental effects of leakage, we propose the concept of work-function engineering, where metals of dissimilar work-functions are used for the external gate electrode and the intermediate metallic layer. Using this approach, the ferroelectric charge–voltage characteristic is shifted along the voltage axis, which results in superior performance of the NCFET.
read more
Chat with Paper
AI Agents for this Paper
Find similar papers on Google Scholar, PubMed and Arxiv
Write a critical review of this paper
Analyze citations of this paper to find unaddressed research gaps
Citations
Ferroelectric Negative Capacitance Field Effect Transistor
Abstract: With the progress in silicon circuit miniaturization, lowering power consumption becomes the major objective. Supply voltage scaling in ultralarge‐scale integration (ULSI) is limited by the physical barrier termed “Boltzmann Tyranny.” Moreover, considerable heat is inevitably generated from the ultrahighly integrated circuit. To solve these problems, a ferroelectric negative capacitance field‐effect transistor (Fe‐NCFET) is proposed in order to reduce the subthreshold swing (SS) through internal voltage amplification mechanism, thus effectively scaling the supply voltage and significantly lowering the power dissipation of ULSI. In this Review, representative research results on NCFET are comprehensively reviewed to offer benefits for further study. Here, the background and significance of NCFETs are introduced, and the physical essence of negative capacitance effect is reviewed. Then, physical models and simulation methods of NCFETs are classified and discussed under the consideration of three basic gate structures. Several influencing factors of device performance such as SS, on‐off ratio, and hysteresis, are also theoretically analyzed. Moreover, the experimental results of NCFETs based on different ferroelectric materials are summarized. Finally, with the combination of NC effect and two‐dimentional materials, FinFET, and tunneling FET, respectively, several novel and potential NCFETs are presented, and the outlook of NCFETs is proposed.
143
Physical Insights on Negative Capacitance Transistors in Nonhysteresis and Hysteresis Regimes: MFMIS Versus MFIS Structures
TL;DR: In this paper, a comprehensive comparison of the two different types of ferroelectric negative capacitance FET (NCFET) structures, namely metal-ferroelectric-metal-insulator-semiconductor (MFMIS) and metal-FERO-INSIS (MFIS), is presented.
121
Negative Differential Resistance in Negative Capacitance FETs
Jiuren Zhou,Genquan Han,Jing Li,Yan Liu,Yue Peng,Jincheng Zhang,Qing-Qing Sun,David Wei Zhang,Yue Hao +8 more
TL;DR: It is demonstrated that NDR strongly depends on the matching between the NC induced by ferroelectric capacitance and the positive capacitance associated with the underlying transistor capacitance.
120
Negative Capacitance Transistors
Justin C. Wong,Sayeef Salahuddin +1 more
- 01 Jan 2019
TL;DR: The central result of this paper is to associate the negative slope region in the S curve to a physically definable configuration of dipoles in the crystal structure.
113
Computing with ferroelectric FETs: Devices, models, systems, and applications
Ahmedullah Aziz,Evelyn T. Breyer,An Chen,Xiaoming Chen,Suman Datta,Sumeet Kumar Gupta,Michael J. Hoffmann,Xiaobo Sharon Hu,Adrian M. Ionescu,Matthew Jerry,Thomas Mikolajick,Halid Mulaosmanovic,Kai Ni,Michael Niemier,Ian O'Connor,Atanu K. Saha,Stefan Slesazeck,Sandeep Krishna Thirumala,Xunzhao Yin +18 more
- 19 Mar 2018
TL;DR: Transistors with integrated ferroelectrics with device-level characteristics offer unique opportunities at the circuit, architectural, and system-level, and are considered here from device, circuit/architecture, and foundry-level perspectives.
85
References
Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices
Sayeef Salahuddin,Supriyo Datta +1 more
TL;DR: By replacing the standard insulator with a ferroelectric insulator of the right thickness it should be possible to implement a step-up voltage transformer that will amplify the gate voltage thus leading to values of S lower than 60 mV/decade and enabling low voltage/low power operation.
2.1K
Ferroelectric negative capacitance MOSFET: Capacitance tuning & antiferroelectric operation
Asif Islam Khan,Chun Wing Yeung,Chenming Hu,Sayeef Salahuddin +3 more
- 01 Dec 2011
TL;DR: In this paper, a design methodology of ferroelectric (FE) negative capacitance FETs based on the concept of capacitance matching is presented, which, besides achieving sub-60mV/dec subthreshold swing, can significantly boost the oncurrent in exchange for a nominal hysteresis.
357
Sub-60mV-swing negative-capacitance FinFET without hysteresis
Kai-Shin Li,Pin-Guang Chen,Tung-Yan Lai,Chang-Hsien Lin,Cheng-Chih Cheng,Chun-Chi Chen,Yun-Jie Wei,Yun-Fang Hou,Ming-Han Liao,Min-Hung Lee,Min-Cheng Chen,Jia-Min Sheih,Wen-Kuan Yeh,Fu-Liang Yang,Sayeef Salahuddin,Chenming Hu +15 more
- 16 Feb 2015
TL;DR: In this article, negative-Capacitance FinFETs with a floating internal gate are reported, where ALD Hf042ZrO2 ferroelectricity is added on top of the gate stack.
319
Negative Capacitance in Short-Channel FinFETs Externally Connected to an Epitaxial Ferroelectric Capacitor
Asif Islam Khan,Korok Chatterjee,Juan Pablo Duarte,Zhongyuan Lu,Angada B. Sachid,Sourabh Khandelwal,Ramamoorthy Ramesh,Chenming Hu,Sayeef Salahuddin +8 more
TL;DR: In this paper, the authors report subthreshold swings as low as 8.5 mV/decade over as high as eight orders of magnitude of drain current in short-channel negative capacitance FinFETs with gate length $L_{g}=100$ nm.
245
Subthreshold swing improvement in MoS2 transistors by the negative-capacitance effect in a ferroelectric Al-doped-HfO2/HfO2 gate dielectric stack.
TL;DR: NC MoS2 FETs are demonstrated by incorporating a ferroelectric Al-doped HfO2, a technologically compatible material, in the FET gate stack by exploiting the negative-capacitance effect in ferroElectric materials.
143
Related Papers (5)
[...]