Open Access
Towards a Field-Programmable Physics Processor (FP?)
Muiris Woulfe,Michael Manzke +1 more
- 01 Jan 2006
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About: The article was published on 01 Jan 2006. and is currently open access. The article focuses on the topics: Computer graphics & Hardware architecture.
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Citations
Accelerating Physics Engine Components with Embedded FPGAs
Petros Toupas,Andreas Brokalakis,Ioannis Papaefstathiou +2 more
- 01 Sep 2019
TL;DR: This work demonstrates that by employing Zynq UltraScale+ devices featuring embedded ARM cores and FPGA fabric, it can accelerate physics computations of the popular Bullet library on highly demanding scenes up to 2.2x compared to high-end GPUs at a fraction of the energy required.
1
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Computer "Experiments" on Classical Fluids. I. Thermodynamical Properties of Lennard-Jones Molecules
TL;DR: In this article, the equilibrium properties of a system of 864 particles interacting through a Lennard-Jones potential have been integrated for various values of the temperature and density, relative, generally, to a fluid state.
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Realtime ray tracing of dynamic scenes on an FPGA chip
Jörg Schmittler,Sven Woop,Daniel Wagner,Wolfgang J. Paul,Philipp Slusallek +4 more
- 29 Aug 2004
TL;DR: A prototype implementation of the full ray tracing pipeline on a single FPGA chip that achieves realtime frame rates of 20 to 60 frames per second over a wide range of 3D scenes and includes support for texturing, multiple light sources, and multiple levels of reflection or transparency.
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Physics for Game Developers
David M. Bourg
- 15 Nov 2001
TL;DR: In this article, real-time Simulations Integrating the Equations of Motion Euler's Method Other Methods 12.2D and 3D Rigid Body Simulator Model Integration Flight Controls Rendering 13.3D Rotation Rotation Matrices Quaternions 15.
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Precision and error analysis of MATLAB applications during automated hardware synthesis for FPGAs
Anshuman Nayak,Malay Haldar,Alok Choudhary,Prithviraj Banerjee +3 more
- 13 Mar 2001
TL;DR: A compiler that takes high level signal and image processing algorithms described in MATLAB and generates an optimized hardware for an FPGA with external memory and a combined precision and error analysis algorithm to infer the minimum number of bits required by a floating point variable is presented.
A system for synthesizing optimized FPGA hardware from Matlab(R)
Malay Haldar,Anshuman Nayak,Alok Choudhary,Prith Banerjee +3 more
- 04 Nov 2001
TL;DR: A compiler that takes as input algorithms described in MATLAB and generates RTL VHDL, which can be mapped to FPGAs using existing commercial tools and exploits parallelism in the input algorithm by pipelining in the presence of resource constraints.