Thread-Local Scope Caching for Real-time Java
Andy Wellings,Martin Schoeberl +1 more
- 17 Mar 2009
- pp 275-282
TL;DR: This paper illustrates how Java augmented by the Real-timeSpecification for Java can be used to present the abstraction of athread-local scoped memory area and shows how to enforce access to thememory area to a single real-time thread.
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Abstract: There is increasing convergence between the fields of parallel andembedded computing. The demand for more functionality in embeddeddevices means that complex multicore architectures will be used. Inorder to promote scalability and obtain predictability, on-chipprocessor-local private memory subsystems will be used. Whilst atthe hardware level this is technical feasible, the more pressingproblem is how such memory is presented to the programmer and howits local access is policed.In this paper we illustrate how Java augmented by the Real-timeSpecification for Java can be used to present the abstraction of athread-local scoped memory area. We show how to enforce access to thememory area to a single real-time thread. We implement the model onthe JOP multiprocessor system and report on our experiences.
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Citations
Time-predictable Cache Organization
Martin Schoeberl
- 17 Mar 2009
TL;DR: This work proposes to adapt the cache organization to simplify the analysis of worst-case execution time (WCET) analysis, where unknown abstract cache states during the analysis result in conservative WCET bounds.
•Book
JOP Reference Handbook: Building Embedded Systems with a Java Processor
Martin Schoeberl
- 19 Aug 2009
TL;DR: This book complements the thesis and provides insight into the implementation of JOP and the accompanying JVM, and gives you an idea how to build an embedded real-time system based on JOP.
43
Data cache organization for accurate timing analysis
TL;DR: A static analysis for this cache is designed and implemented, and integrated into a worst-case execution time analysis tool, and a small, highly associative cache is proposed for the heap area.
A Single-Path Chip-Multiprocessor System
Martin Schoeberl,Peter Puschner,Raimund Kirner +2 more
- 11 Nov 2009
TL;DR: This paper explores the combination of a time-predictable chip-multiprocessor system with the single-path programming paradigm, and time-sliced arbitration of the main memory access provides time-Predictable memory load and store instructions.
Hardware Support for CSP on a Java Chip-Multiprocessor
Flavius Gruian,Martin Schoeberl +1 more
TL;DR: Hardware support for CSP is explored in the context of an embedded Java CMP with on-chip communication channels implemented by a ring-based network-on-chip (NoC), to reduce the memory bandwidth pressure on the shared memory.
6
References
An optimal memory allocation scheme for scratch-pad-based embedded systems
TL;DR: This article presents a compiler strategy that automatically partitions the data among the memory units, and shows that this strategy is optimal, relative to the profile run, among all static partitions for global and stack data.
The influence of processor architecture on the design and the results of WCET tools
Reinhold Heckmann,Marc Langenbach,Stephan Thesing,Reinhard Wilhelm +3 more
- 28 Jul 2003
TL;DR: The designs of WCET tools for a series of increasingly complex processors, including SuperSPARC, Motorola ColdFire 5307, and Motorola PowerPC 755, are described, and some advice is given as to the predictability of processor architectures.
287
A Java processor architecture for embedded real-time systems
TL;DR: It is demonstrated that a hardware implementation of the Java virtual machine results in a small design for resource-constrained devices.
250
WCET centric data allocation to scratchpad memory
Vivy Suhendra,Tulika Mitra,Abhik Roychoudhury,Ting Chen +3 more
- 05 Dec 2005
TL;DR: This paper develops an integer linear programming (ILP) based solution which constructs the optimal allocation assuming that all program paths are feasible, and designs fast heuristic searches that achieve near-optimal allocations for all the authors' benchmarks.
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