Patent
Task control manager
Jeff C. Carter,Anthony M. Federico,Christopher Comparetta +2 more
- 21 Sep 1982
86
TL;DR: In this paper, a plurality of tasks are operated on by providing a start instruction for the execution of tasks, identifying a first task to be started by said start instruction, initiating the first task by the start instruction and initiating the second task before the first one is complete.
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Abstract: A multiprocessor control for a machine including a first executing portion communicating with a first processor and a second executing portion communicating with a second processor. The processors execute a plurality of tasks with each of said tasks residing in one or the other of the processors. Each of the tasks is executed in one or the other of the processors and each of the tasks comprises a block of instructions. A plurality of tasks are operated on by providing a start instruction for the execution of tasks, identifying a first task to be started by said start instruction, initiating the execution of the first task by the start instruction, identifying a second task to be started by the start instruction, and initiating the execution of the second task by the start instruction before the execution of the first task is complete.
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Citations
Patent
Method and apparatus for user side scheduling in a multiprocessor operating system program that implements distributive scheduling of processes
George A. Spix,Diane M. Wengelski,Stuart W. Hawkinson,Mark D. Johnson,Jeremiah D. Burke,Keith J. Thompson,Gregory G. Gaertner,Giacomo G. Brussino,Richard E. Hessel,David M. Barkai,Steve S. Chen,Steven G. Oslon,Robert E. Ii Strout,Jon A. Masamitsu,David M. Cox,Linda J. O'gara,Kelly T. O'hair,David A. Seberger,James C. Rasbold,Timothy J. Cramer,Don A. Van Dyke,Ashok Chandramouli +21 more
- 11 Jan 1993
TL;DR: In this article, the anarchy-based scheduling model for the scheduling of processes and resources by allowing each processor to access a single image of the operating system stored in the common memory that operates on a common set of operating system shared resources.
340
Patent
System and method for controlling a highly parallel multiprocessor using an anarchy based scheduler for parallel execution thread scheduling
George A. Spix,Diane M. Wengelski,Stuart W. Hawkinson,Mark D. Johnson,Jeremiah D. Burke,Keith J. Thompson,Gregory G. Gaertner,Giacomo G. Brussino,Richard E. Hessel,David M. Barkai,Steve S. Chen,Steven G. Oslon,Robert E. Ii Strout,Jon A. Masamitsu,David M. Cox,Linda J. O'gara,Kelly T. O'hair,David A. Seberger,James C. Rasbold,Timothy J. Cramer,Don A. Van Dyke,Ashok Chandramouli +21 more
- 11 Jun 1990
TL;DR: In this article, the anarchy-based scheduling model for the scheduling of processes and resources by allowing each processor to access a single image of the operating system stored in the common memory that operates on a common set of operating system shared resources.
309
Patent
Task scheduler for a miltiprocessor system
Joel L. Wolf,Philip S. Yu,John Turek +2 more
- 19 Aug 1994
TL;DR: A task scheduler for use in a multiprocessor, multitasking system in which a plurality of processor complexes, each containing one or more processors, concurrently execute tasks into which jobs such as database queries are divided.
214
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Method for scheduling threads in a multithreaded processor
George Z. Chrysos,Jeffrey Dean,James W. Hicks,Carl A. Waldspurger,William E. Weihl +4 more
- 26 Nov 1997
TL;DR: In this article, a method for scheduling execution of a plurality of threads executed in a multithreaded processor is presented. But the method is limited to a single thread and it is not suitable for multi-threaded systems.
169
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Remote generation and distribution of command programs for programmable devices
Stephen J. Brown,David W. Brown +1 more
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TL;DR: In this paper, a motion control system including at least one patient device, a server, and a workstation is described, where each patient device is associated with a set of instruction phrases and one movement.
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Patent
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Donald E Wallis
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TL;DR: In this article, a distributed control architecture for a multiprocessor system includes a control processor operating on system programming instructions for executing system supervisory and task management functions, and a control bus over which it outputs execute instruction words containing a pointer address.
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