Proceedings Article10.1145/343647.343709
System level design using C
Diederik Verkest,J. Kunkel,F. Schrirrmeister +2 more
- 01 Jan 2000
- pp 74-83
TL;DR: This paper discusses the use of C++ for the design of digital systems and will discuss in more detail how C++ can be used for system modeling and refinement, for simulation, and for architecture design.
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Abstract: This paper discusses the use of C++ for the design of digital systems. The paper distinguishes a number of different approaches towards the use of programming languages for digital system design and will discuss in more detail how C++ can be used for system modeling and refinement, for simulation, and for architecture design.
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Citations
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TL;DR: A tool for exploring different parallelization options for an application that can be used to quickly find a high-quality match between an application and a multi-processor platform architecture by specifying the parallelization at a high abstraction level and leaving the actual source code transformations to the tool.
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Design Technology for Networked Reconfigurable FPGA Platforms
S. Guccione,Diederik Verkest,Ivo Bolsens +2 more
- 04 Mar 2002
TL;DR: This paper demonstrates that FPGAs are a realistic implementation platform for thin server or client applications, and can offer the same end-user experience as software based systems, combined with more computational power and lower cost.
A Priority Rate-Based Routing Protocol for Wireless Multimedia Sensor Networks
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TL;DR: This paper proposes a priority based rate routing protocol that assigns priorities to traffic depending on their service requirements, and initial results from the simulation show that the proposed algorithm performs better compared to two existing algorithms PCCP and CCF in terms of delay, loss and throughput.
A VHDL/SystemC Comparison in Handling Design Reuse
L. Charest,El Mostapha Aboulhamid +1 more
- 01 Jan 2003
TL;DR: This paper describes the use of the multi-paradigm aspects of SystemC to develop hardware libraries, to reuse designs, to accelerate simulation, and to allow efficient design space exploration both at the RTL and architectural levels.
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- 01 Jun 1999
TL;DR: A new specification environment for system-level design called ECL, which combines the Esterel and C languages to provide a more versatile means for specifying heterogeneous designs, and makes these operations easier to specify and more apparent.
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