Patent
System and method for improved logic simulation using a negative unknown boolean state
Richard Nicholas
- 14 Sep 2006
5
TL;DR: In this article, a system and method for simulating a circuit design using both an unknown Boolean state and a negative unknown boolean state is provided, where one or more initial simulated logic elements are initialized to the unknown Boolean states.
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Abstract: A system and method for simulating a circuit design using both an unknown Boolean state and a negative unknown Boolean state is provided. When the circuit is simulated, one or more initial simulated logic elements are initialized to the unknown Boolean state. The initialized unknown Boolean states are then fed to one or more simulated logic elements and the simulator simulates the handling of the unknown Boolean state by the simulated logic elements. Examples of simulated logic elements include gates and latches, such as flip-flops, inverters, and basic logic gates. The processing results in at least one negative unknown Boolean state. An example of when a negative unknown Boolean state would result would be when the unknown Boolean state is inverted by an inverter. The resulting negative unknown Boolean state is then fed to other simulated logic elements that generate further simulation results based on processing the negative unknown Boolean state.
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Citations
Patent
System and method for correcting gate-level simulation accuracy when unknowns exist
Kai-Hui Chang,Yen-Ting Liu,Christopher S. Browy,Chi-lai Huang +3 more
- 22 May 2012
TL;DR: In this paper, a system and method for correcting gate-level simulation commences by identifying unknown values (Xs) that are falsely generated during the simulation of a given trace for a design netlist.
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Patent
Structure for improved logic simulation using a negative unknown boolean state
Richard Nicholas
- 15 Aug 2008
TL;DR: In this article, a system and method for simulating a circuit design using both an unknown Boolean state and a negative unknown boolean state is provided, where one or more initial simulated logic elements are initialized to the unknown Boolean states.
2
Automated methods for eliminating X bugs
Kai-Hui Chang,Yen-Ting Liu,Chris Browy +2 more
- 03 Mar 2014
TL;DR: This work proposes a comprehensive methodology and several novel methods to detect masked Xs at the register transfer level and eliminate false XS at the gate level and shows that the proposed methods are both effective and efficient.
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TL;DR: In this paper, a computer executable processing component analyzes unknown (X) propagation from uninitialized latches in gate-level simulation and determines if the Xs cause false Xs to be generated due to X-pessimism.
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