Open Access
Spert-II: A Vector Microprocessor
John Wawrzynek,Krste Asanovic,Brian Kingsbury,David Johnson,James Beck,Nelson Morgan +5 more
- 01 Jan 1996
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About: The article was published on 01 Jan 1996. and is currently open access.
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Citations
•Proceedings Article
Second-order Recursive Oscillators for Musical Additive Synthesis Applications on SIMD and VLIW Processors.
Todd Hodes,Adrian Freed +1 more
- 01 Jan 1999
TL;DR: This paper summarizes the work adapting a recursive digital resonator for use on sixteen-bit fixed-point hardware with error properties expressly matched to use in the range of frequencies relevant to additive synthesis of digital audio.
8
Minimalistic Vector Extension for Image Detection on Edge Nodes Using ‘VGG16’
Sanjith Gowda,B S Rajeshwari,B. Bajarangbali +2 more
- 10 Nov 2022
TL;DR: In this article , the authors have implemented a highly parallelized vector core that takes care of computationally intensive mathematical operations using four lanes, each lane with nine vector registers with three vector elements in each register.
References
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Dan Hammerstrom
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265
The Ring Array Processor: a multiprocessing peripheral for connectionist applications
TL;DR: The motivation for the RAP is described and how the architecture matches the target algorithm is shown, which is to reduce peak performance on the error back-propagation algorithm to about 50% of a linear speedup.
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The design of a neuro-microprocessor
TL;DR: The architecture of a neuro-microprocessor is presented, which was designed using the results of careful analysis of a set of applications and extensive simulation of moderate-precision arithmetic for back-propagation networks.
56
•Book
MIPS RISC architecture
Gerry Kane,Joe Heinrich +1 more
- 01 Jan 1988
TL;DR: RISC Architecture: An Overview, MIPS Processor Architecture Overview, FPU Overview, Floating Point Exceptions, and Instruction Pipeline.